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Fix SCR data transfer 

git-svn-id: https://nuttx.svn.sourceforge.net/svnroot/nuttx/trunk@2276 7fd9a85b-ad96-42d3-883c-3090e2eb8679
This commit is contained in:
patacongo 2009-11-21 15:45:50 +00:00
parent 6e86086b4b
commit ead5b5a88f
2 changed files with 22 additions and 5 deletions
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5
nuttx/arch/arm/src/stm32/stm32_sdio.c
View File

@ -711,7 +711,7 @@ static void stm32_recvfifo(struct stm32_dev_s *priv)
*/
while (priv->remaining > 0 &&
(getreg32(STM32_SDIO_STA) & SDIO_STA_RXDAVL) == 0)
(getreg32(STM32_SDIO_STA) & SDIO_STA_RXDAVL) != 0)
{
/* Read the next word from the RX FIFO */
@ -775,6 +775,7 @@ static void stm32_eventtimeout(int argc, uint32 arg)
/* Yes.. wake up any waiting threads */
stm32_endwait(priv, SDIOWAIT_TIMEOUT);
flldbg("Timeout: remaining: %d\n", priv->remaining);
}
}
@ -1786,7 +1787,7 @@ static sdio_eventset_t stm32_eventwait(FAR struct sdio_dev_s *dev,
* we get here. In this case waitevents will be zero, but wkupevents will
* be non-zero (and, hopefully, the semaphore count will also be non-zero.
*/
DEBUGASSERT((priv->waitevents != 0 && priv->wkupevent == 0) ||
(priv->waitevents == 0 && priv->wkupevent != 0));

22
nuttx/drivers/mmcsd/mmcsd_sdio.c
View File

@ -674,7 +674,7 @@ static void mmcsd_decodeCSD(FAR struct mmcsd_state_s *priv, uint32 csd[4])
fvdbg("CSD:\n");
fvdbg(" CSD_STRUCTURE: %d SPEC_VERS: %d (MMC)\n",
decoded.csdstructure, decoded.mmcspecvers);
fvdbg(" TAAC {TIME_UNIT: %d TIME_UNIT: %d} NSAC: %d\n",
fvdbg(" TAAC {TIME_UNIT: %d TIME_VALUE: %d} NSAC: %d\n",
decoded.taac.timeunit, decoded.taac.timevalue, decoded.nsac);
fvdbg(" TRAN_SPEED {TRANSFER_RATE_UNIT: %d TIME_VALUE: %d}\n",
decoded.transpeed.transferrateunit, decoded.transpeed.timevalue);
@ -826,13 +826,28 @@ struct mmcsd_scr_s decoded;
* Reserved 47:32 16-bit SD reserved space
*/
#ifdef CONFIG_ENDIAN_BIG /* Card transfers SCR in big-endian order */
priv->buswidth = (scr[0] >> 16) & 15;
#else
priv->buswidth = (scr[0] >> 8) & 15;
#endif
#if defined(CONFIG_DEBUG) && defined (CONFIG_DEBUG_VERBOSE) && defined(CONFIG_DEBUG_FS)
#ifdef CONFIG_ENDIAN_BIG /* Card SCR is big-endian order / CPU also big-endian
* 60 56 52 48 44 40 36 32
* VVVV SSSS ESSS BBBB RRRR RRRR RRRR RRRR */
decoded.scrversion = scr[0] >> 28;
decoded.sdversion = (scr[0] >> 24) & 15;
decoded.erasestate = (scr[0] >> 23) & 1;
decoded.security = (scr[0] >> 20) & 7;
#else /* Card SCR is big-endian order / CPU is little-endian
* 36 32 44 40 52 48 60 56
* RRRR RRRR RRRR RRRR ESSS BBBB VVVV SSSS */
decoded.scrversion = (scr[0] >> 4) & 15;
decoded.sdversion = scr[0] & 15;
decoded.erasestate = (scr[0] >> 15) & 1;
decoded.security = (scr[0] >> 12) & 7;
#endif
decoded.buswidth = priv->buswidth;
#endif
@ -841,7 +856,7 @@ struct mmcsd_scr_s decoded;
*/
#if defined(CONFIG_DEBUG) && defined (CONFIG_DEBUG_VERBOSE) && defined(CONFIG_DEBUG_FS)
decoded.mfgdata = scr[1];
decoded.mfgdata = scr[1]; /* Might be byte reversed! */
fvdbg("SCR:\n");
fvdbg(" SCR_STRUCTURE: %d SD_VERSION: %d\n",
@ -1731,9 +1746,10 @@ static ssize_t mmcsd_read(FAR struct inode *inode, unsigned char *buffer,
FAR struct mmcsd_state_s *priv;
ssize_t ret = 0;
fvdbg("sector: %d nsectors: %d sectorsize: %d\n");
DEBUGASSERT(inode && inode->i_private);
priv = (FAR struct mmcsd_state_s *)inode->i_private;
fvdbg("startsector: %d nsectors: %d sectorsize: %d\n",
startsector, nsectors, priv->blocksize);
if (nsectors > 0)
{