Add STM32 Ethernet packet reception logic
git-svn-id: https://nuttx.svn.sourceforge.net/svnroot/nuttx/trunk@4160 7fd9a85b-ad96-42d3-883c-3090e2eb8679
This commit is contained in:
patacongo
parent
2a0d5870d4
commit
cd52ab2ea2
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@ -46,6 +46,7 @@
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#include <string.h>
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#include <debug.h>
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#include <wdog.h>
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#include <queue.h>
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#include <errno.h>
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#include <nuttx/irq.h>
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@ -139,19 +140,26 @@
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#undef CONFIG_STM32_ETH_ENHANCEDDESC
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#undef CONFIG_STM32_ETH_HWCHECKSUM
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/* Ethernet buffer sizes and numbers */
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/* Ethernet buffer sizes, nubmer of buffers, and number of descriptors */
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#ifndef CONFIG_STM32_ETH_RXBUFSIZE
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# define CONFIG_STM32_ETH_RXBUFSIZE CONFIG_NET_BUFSIZE
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#ifndef CONFIG_NET_MULTIBUFFER
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# error "CONFIG_NET_MULTIBUFFER is required"
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#endif
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#ifndef CONFIG_STM32_ETH_TXBUFSIZE
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# define CONFIG_STM32_ETH_TXBUFSIZE CONFIG_NET_BUFSIZE
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#ifndef CONFIG_STM32_ETH_BUFSIZE
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# define CONFIG_STM32_ETH_BUFSIZE CONFIG_NET_BUFSIZE
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#endif
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#ifndef CONFIG_STM32_ETH_RXNBUFFERS
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# define CONFIG_STM32_ETH_RXNBUFFERS 20
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#ifndef CONFIG_STM32_ETH_NRXDESC
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# define CONFIG_STM32_ETH_NRXDESC 8
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#endif
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#ifndef CONFIG_STM32_ETH_TXNBUFFERS
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# define CONFIG_STM32_ETH_TXNBUFFERS 5
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#ifndef CONFIG_STM32_ETH_NTXDESC
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# define CONFIG_STM32_ETH_NTXDESC 4
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#endif
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#if CONFIG_STM32_ETH_NTXDESC > 2
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# define STM32_ETH_NFREEBUFFERS CONFIG_STM32_ETH_NTXDESC
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#else
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# define STM32_ETH_NFREEBUFFERS 2
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#endif
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/* Clocking *****************************************************************/
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@ -463,48 +471,39 @@
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* Private Types
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****************************************************************************/
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struct eth_rxframe_info_s
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{
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volatile struct stm2_ethdesc_s *rxfirst; /* First Segment Rx Desc */
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volatile struct stm2_ethdesc_s *rxlast; /* Last Segment Rx Desc */
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volatile uint32_t segcount; /* Segment count */
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};
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/* The stm32_ethmac_s encapsulates all state information for a single hardware
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* interface
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*/
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struct stm32_ethmac_s
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{
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uint8_t ifup : 1; /* true:ifup false:ifdown */
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uint8_t mbps100 : 1; /* 100MBps operation (vs 10 MBps) */
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uint8_t fduplex : 1; /* Full (vs. half) duplex */
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WDOG_ID txpoll; /* TX poll timer */
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WDOG_ID txtimeout; /* TX timeout timer */
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uint8_t ifup : 1; /* true:ifup false:ifdown */
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uint8_t mbps100 : 1; /* 100MBps operation (vs 10 MBps) */
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uint8_t fduplex : 1; /* Full (vs. half) duplex */
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WDOG_ID txpoll; /* TX poll timer */
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WDOG_ID txtimeout; /* TX timeout timer */
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/* This holds the information visible to uIP/NuttX */
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struct uip_driver_s dev; /* Interface understood by uIP */
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struct uip_driver_s dev; /* Interface understood by uIP */
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/* Used to track transmit and receive descriptors */
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volatile struct eth_txdesc_s *txdesc;
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volatile struct eth_rxdesc_s *rxdesc;
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/* Frame info */
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struct eth_rxframe_info_s rxframe;
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volatile struct eth_rxframe_info_s *rxframeinfo;
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struct eth_txdesc_s *txdesc; /* Next TX descriptor */
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struct eth_rxdesc_s *rxdesc; /* Next RX descriptor */
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struct eth_rxdesc_s *rxfirst; /* First RX descriptor of the segment */
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uint32_t segcount; /* Segment count */
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sq_queue_t freeb; /* The free buffer list */
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/* Descriptor allocations */
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struct eth_rxdesc_s rxtable[CONFIG_STM32_ETH_RXNBUFFERS];
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struct eth_txdesc_s txtable[CONFIG_STM32_ETH_TXNBUFFERS];
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struct eth_rxdesc_s rxtable[CONFIG_STM32_ETH_NRXDESC];
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struct eth_txdesc_s txtable[CONFIG_STM32_ETH_NTXDESC];
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/* Buffer allocations */
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uint8_t rxbuffer[CONFIG_STM32_ETH_RXNBUFFERS*CONFIG_STM32_ETH_RXBUFSIZE];
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uint8_t txbuffer[CONFIG_STM32_ETH_TXNBUFFERS*CONFIG_STM32_ETH_TXBUFSIZE];
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uint8_t rxbuffer[CONFIG_STM32_ETH_NRXDESC*CONFIG_STM32_ETH_BUFSIZE];
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uint8_t alloc[STM32_ETH_NFREEBUFFERS*CONFIG_STM32_ETH_BUFSIZE];
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};
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/****************************************************************************
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@ -516,6 +515,12 @@ static struct stm32_ethmac_s g_stm32ethmac[STM32_NETHERNET];
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/****************************************************************************
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* Private Function Prototypes
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****************************************************************************/
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/* Free buffer management */
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static void stm32_initbuffer(FAR struct stm32_ethmac_s *priv);
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static inline uint8_t *stm32_allocbuffer(FAR struct stm32_ethmac_s *priv);
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static inline void stm32_freebuffer(FAR struct stm32_ethmac_s *priv, uint8_t *buffer);
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static inline bool stm32_isfreebuffer(FAR struct stm32_ethmac_s *priv);
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/* Common TX logic */
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@ -524,6 +529,9 @@ static int stm32_uiptxpoll(struct uip_driver_s *dev);
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/* Interrupt handling */
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static void stm32_freesegment(FAR struct stm32_ethmac_s *priv,
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FAR struct eth_rxdesc_s *rxfirst, int nsegments);
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static int stm32_recvframe(FAR struct stm32_ethmac_s *priv);
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static void stm32_receive(FAR struct stm32_ethmac_s *priv);
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static void stm32_txdone(FAR struct stm32_ethmac_s *priv);
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static int stm32_interrupt(int irq, FAR void *context);
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@ -566,6 +574,111 @@ static int stm32_ethconfig(FAR struct stm32_ethmac_s *priv);
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Function: stm32_initbuffer
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*
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* Description:
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* Initialize the free buffer list.
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*
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* Parameters:
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* priv - Reference to the driver state structure
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*
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* Returned Value:
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* None
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*
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* Assumptions:
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* Called during early driver initialization before Ethernet interrupts
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* are enabled.
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*
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****************************************************************************/
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static void stm32_initbuffer(FAR struct stm32_ethmac_s *priv)
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{
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uint8_t *buffer;
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int i;
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sq_init(&priv->freeb);
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for (i = 0, buffer = priv->alloc;
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i < STM32_ETH_NFREEBUFFERS;
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i++, buffer += CONFIG_STM32_ETH_BUFSIZE)
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{
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sq_addlast((FAR sq_entry_t *)buffer, &priv->freeb);
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}
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}
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/****************************************************************************
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* Function: stm32_allocbuffer
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*
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* Description:
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* Allocate one buffer from the free buffer list.
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*
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* Parameters:
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* priv - Reference to the driver state structure
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*
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* Returned Value:
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* Pointer to the allocated buffer on success; NULL on failure
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*
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* Assumptions:
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* May or may not be called from an interrupt handler. In either case,
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* global interrupts are disabled, either explicitly or indirectly through
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* interrupt handling logic.
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*
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****************************************************************************/
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static inline uint8_t *stm32_allocbuffer(FAR struct stm32_ethmac_s *priv)
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{
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return (uint8_t *)sq_remfirst(&priv->freeb);
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}
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/****************************************************************************
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* Function: stm32_freebuffer
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*
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* Description:
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* Return a buffer to the free buffer list.
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*
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* Parameters:
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* priv - Reference to the driver state structure
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* buffer - A pointer to the buffer to be freed
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*
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* Returned Value:
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* None
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*
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* Assumptions:
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* May or may not be called from an interrupt handler. In either case,
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* global interrupts are disabled, either explicitly or indirectly through
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* interrupt handling logic.
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*
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****************************************************************************/
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static inline void stm32_freebuffer(FAR struct stm32_ethmac_s *priv, uint8_t *buffer)
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{
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sq_addlast((FAR sq_entry_t *)buffer, &priv->freeb);
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}
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/****************************************************************************
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* Function: stm32_isfreebuffer
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*
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* Description:
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* Return TRUE if the free buffer list is not empty.
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*
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* Parameters:
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* priv - Reference to the driver state structure
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*
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* Returned Value:
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* True if there are one or more buffers in the free buffer list;
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* false if the free buffer list is empty
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*
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* Assumptions:
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* None.
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*
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****************************************************************************/
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static inline bool stm32_isfreebuffer(FAR struct stm32_ethmac_s *priv)
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{
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return !sq_empty(&priv->freeb);
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}
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/****************************************************************************
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* Function: stm32_transmit
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*
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@ -660,6 +773,197 @@ static int stm32_uiptxpoll(struct uip_driver_s *dev)
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return 0;
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}
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/****************************************************************************
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* Function: stm32_freesegment
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*
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* Description:
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* The function is called when a frame is received using the DMA receive
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* interrupt. It scans the RX descriptors to the the received frame.
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*
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* Parameters:
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* priv - Reference to the driver state structure
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*
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* Returned Value:
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* None
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*
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* Assumptions:
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* Global interrupts are disabled by interrupt handling logic.
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*
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****************************************************************************/
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static void stm32_freesegment(FAR struct stm32_ethmac_s *priv,
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FAR struct eth_rxdesc_s *rxfirst, int nsegments)
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{
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struct eth_rxdesc_s *rxdesc;
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int i;
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/* Set OWN bit in RX descriptors. This gives the buffers back to DMA */
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rxdesc = rxfirst;
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for (i = 0; i < nsegments; i++)
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{
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rxdesc->rdes0 = ETH_RDES0_OWN;
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rxdesc = (struct eth_rxdesc_s *)rxdesc->rdes3;
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}
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/* Reset the segment managment logic */
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priv->rxfirst = NULL;
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priv->segcount = 0;
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/* Check if the RX Buffer unavailable flag is set */
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if ((getreg32(STM32_ETH_DMASR) & ETH_DMAINT_RBUI) != 0)
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{
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/* Clear RBUS Ethernet DMA flag */
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putreg32(ETH_DMAINT_RBUI, STM32_ETH_DMASR);
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/* Resume DMA reception */
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putreg32(0, STM32_ETH_DMARPDR);
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}
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}
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/****************************************************************************
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* Function: stm32_recvframe
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*
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* Description:
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* The function is called when a frame is received using the DMA receive
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* interrupt. It scans the RX descriptors of the received frame.
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*
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* NOTE: This function will silently discard any packets containing errors.
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*
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* Parameters:
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* priv - Reference to the driver state structure
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*
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* Returned Value:
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* OK if a packet was successfully returned; -EAGAIN if there are no
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* further packets available
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*
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* Assumptions:
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* Global interrupts are disabled by interrupt handling logic.
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*
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****************************************************************************/
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static int stm32_recvframe(FAR struct stm32_ethmac_s *priv)
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{
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struct eth_rxdesc_s *rxdesc;
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struct eth_rxdesc_s *rxfirst;
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uint8_t *buffer;
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int i;
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/* Check if there are free buffers. We cannot receive new frames in this
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* design unless there is at least one free buffer.
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*/
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if (!stm32_isfreebuffer(priv))
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{
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nlldbg("No free buffers\n");
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return -ENOMEM;
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}
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/* Scan descriptors owned by the CPU */
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rxdesc = priv->rxdesc;
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for (i = 0;
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(rxdesc->rdes0 & ETH_RDES0_OWN) == 0 && i < CONFIG_STM32_ETH_NRXDESC;
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i++)
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{
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/* Check if this is the first segment in the frame */
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if ((rxdesc->rdes0 & ETH_RDES0_FS) != 0 &&
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(rxdesc->rdes0 & ETH_RDES0_LS) == 0)
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{
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priv->rxfirst = rxdesc;
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priv->segcount = 1;
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}
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/* Check if this is an intermediate segment in the frame */
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else if (((rxdesc->rdes0 & ETH_RDES0_LS) == 0)&&
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((rxdesc->rdes0 & ETH_RDES0_FS) == 0))
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{
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priv->segcount++;
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}
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/* Otherwise, it is the last segment in the frame */
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else
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{
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priv->segcount++;
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/* Check if the there is only one segment in the frame */
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if (priv->segcount == 1)
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{
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rxfirst = rxdesc;
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}
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else
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{
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rxfirst = priv->rxfirst;
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}
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/* Check if any errors are reported in the frame */
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if ((rxdesc->rdes0 & ETH_RDES0_ES) == 0)
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{
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struct uip_driver_s *dev = &priv->dev;
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/* Get the Frame Length of the received packet: substruct 4
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* bytes of the CRC
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*/
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dev->d_len = ((rxdesc->rdes0 & ETH_RDES0_FL_MASK) >> ETH_RDES0_FL_SHIFT) - 4;
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/* Get a buffer from the free list. We don't even check if
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* this is successful because we already assure the the free
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* list is not empty above.
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*/
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buffer = stm32_allocbuffer(priv);
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/* Take the buffer from the RX descriptor of the first free
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* segment, put it into the uIP device structure, then replace
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* the buffer in the RX descriptor with the newly allocated
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* buffer.
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*/
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dev->d_buf = (uint8_t*)rxfirst->rdes2;
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rxfirst->rdes2 = (uint32_t)buffer;
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/* Return success, remebering where we should re-start scanning
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* and resetting the segment scanning logic
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*/
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priv->rxdesc = (struct eth_rxdesc_s*)rxdesc->rdes3;
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stm32_freesegment(priv, rxfirst, priv->segcount);
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return OK;
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}
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else
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{
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/* Drop the frame that contains the errors, reset the segment
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* scanning logic, and continue scanning with the next frame.
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*/
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nlldbg("DROPPED: RX descriptor errors: %08x\n", rxdesc->rdes0);
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stm32_freesegment(priv, rxfirst, priv->segcount);
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}
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}
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/* Try the next descriptor */
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rxdesc = (struct eth_rxdesc_s*)rxdesc->rdes3;
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}
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/* We get here after all of the descriptors have been scanned. Remember
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* where we left off.
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*/
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priv->rxdesc = rxdesc;
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return -EAGAIN;
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}
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/****************************************************************************
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* Function: stm32_receive
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*
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@ -679,16 +983,23 @@ static int stm32_uiptxpoll(struct uip_driver_s *dev)
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static void stm32_receive(FAR struct stm32_ethmac_s *priv)
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{
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do
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struct uip_driver_s *dev = &priv->dev;
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/* Loop while while stm32_recvframe() successfully retrieves valid
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* Ethernet frames.
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*/
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while (stm32_recvframe(priv) == OK)
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{
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/* Check for errors and update statistics */
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/* Check if the packet is a valid size for the uIP buffer configuration */
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/* Copy the data data from the hardware to priv->dev.d_buf. Set
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* amount of data in priv->dev.d_len
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/* Check if the packet is a valid size for the uIP buffer configuration
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* (this should not happen)
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*/
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if (dev->d_len > CONFIG_NET_BUFSIZE)
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{
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nlldbg("DROPPED: Too big: %d\n", dev->d_len);
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}
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/* We only accept IP packets of the configured type and ARP packets */
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#ifdef CONFIG_NET_IPv6
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@ -724,7 +1035,6 @@ static void stm32_receive(FAR struct stm32_ethmac_s *priv)
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}
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}
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}
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while (false); /* While there are more packets to be processed */
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}
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/****************************************************************************
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@ -1151,7 +1461,7 @@ static void stm32_txdescinit(FAR struct stm32_ethmac_s *priv)
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/* Initialize each TX descriptor */
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for (i = 0; i < CONFIG_STM32_ETH_TXNBUFFERS; i++)
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for (i = 0; i < CONFIG_STM32_ETH_NTXDESC; i++)
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{
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txdesc = &priv->txtable[i];
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@ -1159,13 +1469,21 @@ static void stm32_txdescinit(FAR struct stm32_ethmac_s *priv)
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|
||||
txdesc->tdes0 = ETH_TDES0_TCH;
|
||||
|
||||
/* Set Buffer1 address pointer */
|
||||
#ifdef CHECKSUM_BY_HARDWARE
|
||||
/* Enable the checksum insertion for the Tx frames */
|
||||
|
||||
txdesc->tdes2 = (uint32_t)(&priv->txbuffer[i*CONFIG_STM32_ETH_TXBUFSIZE]);
|
||||
txdesc->tdes0 |= ETH_TDES0_CIC_ALL;
|
||||
#endif
|
||||
|
||||
/* Clear Buffer1 address pointer (buffers will be assigned as they
|
||||
* are used)
|
||||
*/
|
||||
|
||||
txdesc->tdes2 = 0;;
|
||||
|
||||
/* Initialize the next descriptor with the Next Descriptor Polling Enable */
|
||||
|
||||
if( i < (CONFIG_STM32_ETH_TXNBUFFERS-1))
|
||||
if( i < (CONFIG_STM32_ETH_NTXDESC-1))
|
||||
{
|
||||
/* Set next descriptor address register with next descriptor base
|
||||
* address
|
||||
|
|
@ -1182,6 +1500,10 @@ static void stm32_txdescinit(FAR struct stm32_ethmac_s *priv)
|
|||
txdesc->tdes3 = (uint32_t)priv->txtable;
|
||||
}
|
||||
}
|
||||
|
||||
/* Set Transmit Desciptor List Address Register */
|
||||
|
||||
putreg32((uint32_t)priv->txtable, STM32_ETH_DMATDLAR);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
|
|
@ -1211,7 +1533,7 @@ static void stm32_rxdescinit(FAR struct stm32_ethmac_s *priv)
|
|||
|
||||
/* Initialize each TX descriptor */
|
||||
|
||||
for (i = 0; i < CONFIG_STM32_ETH_RXNBUFFERS; i++)
|
||||
for (i = 0; i < CONFIG_STM32_ETH_NRXDESC; i++)
|
||||
{
|
||||
rxdesc = &priv->rxtable[i];
|
||||
|
||||
|
|
@ -1219,17 +1541,19 @@ static void stm32_rxdescinit(FAR struct stm32_ethmac_s *priv)
|
|||
|
||||
rxdesc->rdes0 = ETH_RDES0_OWN;
|
||||
|
||||
/* Set Buffer1 size and Second Address Chained bit */
|
||||
/* Set Buffer1 size and Second Address Chained bit and enabled DMA
|
||||
* RX desc receive interrupt
|
||||
*/
|
||||
|
||||
rxdesc->rdes1 = ETH_RDES1_RCH | (uint32_t)CONFIG_STM32_ETH_RXBUFSIZE;
|
||||
rxdesc->rdes1 = ETH_RDES1_RCH | (uint32_t)CONFIG_STM32_ETH_BUFSIZE;
|
||||
|
||||
/* Set Buffer1 address pointer */
|
||||
|
||||
rxdesc->rdes2 = (uint32_t)&priv->rxbuffer[i*CONFIG_STM32_ETH_RXBUFSIZE];
|
||||
rxdesc->rdes2 = (uint32_t)&priv->rxbuffer[i*CONFIG_STM32_ETH_BUFSIZE];
|
||||
|
||||
/* Initialize the next descriptor with the Next Descriptor Polling Enable */
|
||||
|
||||
if( i < (CONFIG_STM32_ETH_RXNBUFFERS-1))
|
||||
if( i < (CONFIG_STM32_ETH_NRXDESC-1))
|
||||
{
|
||||
/* Set next descriptor address register with next descriptor base
|
||||
* address
|
||||
|
|
@ -1250,8 +1574,6 @@ static void stm32_rxdescinit(FAR struct stm32_ethmac_s *priv)
|
|||
/* Set Receive Descriptor List Address Register */
|
||||
|
||||
putreg32((uint32_t)priv->rxtable, STM32_ETH_DMARDLAR);
|
||||
|
||||
priv->rxframeinfo = &priv->rxframe;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
|
|
@ -1776,31 +2098,7 @@ static int stm32_macconfig(FAR struct stm32_ethmac_s *priv)
|
|||
static int stm32_macenable(FAR struct stm32_ethmac_s *priv)
|
||||
{
|
||||
uint32_t regval;
|
||||
int i;
|
||||
|
||||
/* Enable Ethernet Rx interrrupt */
|
||||
|
||||
for (i = 0; i < CONFIG_STM32_ETH_RXNBUFFERS; i++)
|
||||
{
|
||||
/* Enable the DMA Rx Desc receive interrupt */
|
||||
|
||||
priv->rxtable[i].rdes1 &= ~ETH_RDES1_DIC;
|
||||
}
|
||||
|
||||
#ifdef CHECKSUM_BY_HARDWARE
|
||||
/* Enable the checksum insertion for the Tx frames */
|
||||
|
||||
for (i = 0; i < CONFIG_STM32_ETH_TXNBUFFERS; i++)
|
||||
{
|
||||
/* Set the selected DMA Tx desc checksum insertion control */
|
||||
|
||||
priv->txtable[i].tdes0 |= ETH_TDES0_CIC_ALL;
|
||||
}
|
||||
#endif
|
||||
|
||||
/* Enable RX and TX */
|
||||
#warning "Missing Logic"
|
||||
|
||||
/* Enable transmit state machine of the MAC for transmission on the MII */
|
||||
|
||||
regval = getreg32(STM32_ETH_MACCR);
|
||||
|
|
@ -1901,6 +2199,10 @@ static int stm32_ethconfig(FAR struct stm32_ethmac_s *priv)
|
|||
return ret;
|
||||
}
|
||||
|
||||
/* Initialize the free buffer list */
|
||||
|
||||
stm32_initbuffer(priv);
|
||||
|
||||
/* Initialize Tx Descriptors list: Chain Mode */
|
||||
|
||||
stm32_txdescinit(priv);
|
||||
|
|
|
|||
|
|
@ -686,6 +686,8 @@ CONFIG_MMCSD_HAVECARDDETECT=n
|
|||
# TCP/IP and UDP support via uIP
|
||||
#
|
||||
# CONFIG_NET - Enable or disable all network features
|
||||
# CONFIG_NET_NOINTS - uIP not called from interrupt level.
|
||||
# CONFIG_NET_MULTIBUFFER - Use multiple input/output buffers (probably no)
|
||||
# CONFIG_NET_IPv6 - Build in support for IPv6
|
||||
# CONFIG_NSOCKET_DESCRIPTORS - Maximum number of socket descriptors per task/thread.
|
||||
# CONFIG_NET_SOCKOPTS - Enable or disable support for socket options
|
||||
|
|
@ -710,6 +712,8 @@ CONFIG_MMCSD_HAVECARDDETECT=n
|
|||
# CONFIG_NET_FWCACHE_SIZE - number of packets to remember when looking for duplicates
|
||||
#
|
||||
CONFIG_NET=n
|
||||
CONFIG_NET_NOINTS=n
|
||||
CONFIG_NET_MULTIBUFFER=y
|
||||
CONFIG_NET_IPv6=n
|
||||
CONFIG_NSOCKET_DESCRIPTORS=10
|
||||
CONFIG_NET_SOCKOPTS=y
|
||||
|
|
|
|||
|
|
@ -650,6 +650,8 @@ CONFIG_MMCSD_HAVECARDDETECT=n
|
|||
#
|
||||
# TCP/IP and UDP support via uIP
|
||||
# CONFIG_NET - Enable or disable all network features
|
||||
# CONFIG_NET_NOINTS - uIP not called from interrupt level.
|
||||
# CONFIG_NET_MULTIBUFFER - Use multiple input/output buffers (probably no)
|
||||
# CONFIG_NET_IPv6 - Build in support for IPv6
|
||||
# CONFIG_NSOCKET_DESCRIPTORS - Maximum number of socket descriptors per task/thread.
|
||||
# CONFIG_NET_SOCKOPTS - Enable or disable support for socket options
|
||||
|
|
@ -674,6 +676,8 @@ CONFIG_MMCSD_HAVECARDDETECT=n
|
|||
# CONFIG_NET_FWCACHE_SIZE - number of packets to remember when looking for duplicates
|
||||
#
|
||||
CONFIG_NET=n
|
||||
CONFIG_NET_NOINTS=n
|
||||
CONFIG_NET_MULTIBUFFER=y
|
||||
CONFIG_NET_IPv6=n
|
||||
CONFIG_NSOCKET_DESCRIPTORS=0
|
||||
CONFIG_NET_SOCKOPTS=y
|
||||
|
|
|
|||
Loading…
Reference in New Issue