Add support for the Sure DB-DP11212 PIC32 board
git-svn-id: https://nuttx.svn.sourceforge.net/svnroot/nuttx/trunk@4476 7fd9a85b-ad96-42d3-883c-3090e2eb8679
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@ -2552,3 +2552,5 @@
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6.17 2012-xx-xx Gregory Nutt <gnutt@nuttx.org>
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* configs/sure-pic32mx: Add support for the Sure DB-DP11212 PIC32 General
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Purpose Demo Board
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@ -8,7 +8,7 @@
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<tr align="center" bgcolor="#e4e4e4">
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<td>
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<h1><big><font color="#3c34ec"><i>NuttX RTOS</i></font></big></h1>
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<p>Last Updated: March 10, 2012</p>
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<p>Last Updated: March 11, 2012</p>
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</td>
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</tr>
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</table>
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@ -478,7 +478,7 @@
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<td>
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<p>
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<li>
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Network, USB (host), USB (device), serial, CAN, ADC, DAC, and PWM driver architectures.
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Network, USB (host), USB (device), serial, CAN, ADC, DAC, PWM, and Quadrature Encoder driver architectures.
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</li>
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</p>
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</tr>
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@ -1790,7 +1790,7 @@
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<a href="http://www.nuttx.org/NuttShell.html">NSH User Guide</a>) as well as several other configurations.
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Additional drivers and configurations were added in NuttX 6.13-6.16.
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Drivers include an Ethernet driver, ADC driver, DAC driver, PWM driver, CAN driver, F4 RTC driver, Quadrature Encoder, DMA, SDIO with DMA
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(most of these are compatible with the F1 family as well).
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(these should all be compatible with the STM32 F2 family and many should also be compatible with the STM32 F1 family as well).
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The NuttX6.16 release also includes and logic for saving/restoring F4 FPU registers in context switches.
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Networking intensions include support for Telnet NSH sessions and new configurations for DHPCD and the networking test (nettest).
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A more complete port would include support for SDIO and USB OTG which are not available in NuttX 6.13.
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@ -12,7 +12,7 @@
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<h1><big><font color="#3c34ec">
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<i>NuttX RTOS Porting Guide</i>
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</font></big></h1>
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<p>Last Updated: March 3, 2011</p>
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<p>Last Updated: March 11, 2011</p>
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</td>
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</tr>
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</table>
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@ -128,7 +128,8 @@
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<a href="#usbdevdrivers">6.3.10 USB Device-Side Drivers</a><br>
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<a href="#analogdrivers">6.3.11 Analog (ADC/DAC) Drivers</a><br>
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<a href="#pwmdrivers">6.3.12 PWM Drivers</a><br>
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<a href="#candrivers">6.3.13 CAN Drivers</a>
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<a href="#candrivers">6.3.13 CAN Drivers</a><br>
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<a href="#quadencoder">6.3.14 Quadrature Encoder Drivers</a>
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</ul>
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<a href="#pwrmgmt">6.4 Power Management</a>
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<ul>
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@ -3258,6 +3259,35 @@ extern void up_ledoff(int led);
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</li>
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</ul>
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<h3><a name="quadencoder">6.3.14 Quadrature Encoder Drivers</a></h3>
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<p>
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NuttX supports only a low-level, two-part Quadrature Driver driver.
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</p>
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<ol>
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<li>
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An "upper half", generic driver that provides the comman Quadrature Encoder interface to application level code, and
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</li>
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<li>
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A "lower half", platform-specific driver that implements the low-level timer controls to implement the Quadrature Encoder functionality.
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</li>
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</ol>
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<p>
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Files supporting the Quadrature Encoder can be found in the following locations:
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</p>
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<ul>
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<li><b>Interface Definition</b>.
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The header file for the NuttX Quadrature Encoder driver reside at <code>include/nuttx/sensors/qencoder.h</code>.
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This header file includes both the application level interface to the Quadrature Encoder driver as well as the interface between the "upper half" and "lower half" drivers.
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The Quadrature Encoder module uses a standard character driver framework.
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</li>
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<li><b>"Upper Half" Driver</b>.
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The generic, "upper half" Quadrature Encoder driver resides at <code>drivers/sensors/qencoder.c</code>.
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</li>
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<li><b>"Lower Half" Drivers</b>.
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Platform-specific Quadrature Encoder drivers reside in <code>arch/</code><i><architecture></i><code>/src/</code><i><chip></i> directory for the specific processor <i><architecture></i> and for the specific <i><chip></i> Quadrature Encoder peripheral devices.
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</li>
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</ul>
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<h2><a name="pwrmgmt">6.4 Power Management</a></h2>
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<h3><a name="pmoverview">6.4.1 Overview</a></h3>
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@ -42,7 +42,10 @@ Contents
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PIC32MX440F512H Pin Out
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=======================
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PIC32MX440F512H 64-Pin QFN (USB) Pin Out.
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DB_DP11215 PIC32 Storage Demo Board
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-----------------------------------
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PIC32MX440F512H 64-Pin QFN (USB) Pin Out as used on the DB_DP11215 PIC32 Storage
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Demo Board.
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LEFT SIDE, TOP-TO-BOTTOM (if pin 1 is in upper left)
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PIN NAME SIGNAL NOTES
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@ -65,7 +68,8 @@ PIC32MX440F512H Pin Out
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RB1
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16 PGED1/AN0/VREF+/CVREF+/PMA6/ N/C Not connected
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CN2/RB0
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*FLASH (U1, SOIOC) not populated
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*FLASH (U1, SOIC) not populated
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BOTTOM SIDE, LEFT-TO-RIGHT (if pin 1 is in upper left)
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PIN NAME SIGNAL NOTES
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@ -88,7 +92,7 @@ PIC32MX440F512H Pin Out
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31 SDA2/U2RX/PMA9/CN17/RF4 RXD2_MCU J5 DB9 via RS232 driver
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32 SCL2/U2TX/PMA8/CN18/RF5 TXD2_MCU J5 DB9 via RS232 driver
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*FLASH (U1, SOIOC) not populated
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*FLASH (U1, SOIC) not populated
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RIGHT SIDE, TOP-TO-BOTTOM (if pin 1 is in upper left)
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PIN NAME SIGNAL NOTES
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@ -133,6 +137,96 @@ PIC32MX440F512H Pin Out
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*USB-to-UART bridge (U1, CP2102) not populated
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DB-DP11212 PIC32 General Purpose Demo Board
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-------------------------------------------
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PIC32MX440F512H 64-Pin QFN (USB) Pin Out as used on the DB-DP11212 PIC32 General
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Purpose Demo Board
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LEFT SIDE, TOP-TO-BOTTOM (if pin 1 is in upper left)
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PIN NAME SIGNAL NOTES
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---- ----------------------------- -------------- -------------------------------
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1 PMD5/RE5 PMPD5 Display, JP1-12, DB5
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2 PMD6/RE6 PMPD6 Display, JP1-13, DB6
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3 PMD7/RE7 PMPD7 Display, JP1-14, DB7
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4 SCK2/PMA5/CN8/RG6 SCK FLASH (U4) SCK*
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5 SDI2/PMA4/CN9/RG7 SDI FLASH (U4) SO*
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6 SDO2/PMA3/CN10/RG8 SDO FLASH (U4) SI*
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7 MCLR\ PIC_MCLR Pulled high, J2-1, ICSP
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8 SS2/PMA2/CN11/RG9 N/C Not connected
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9 Vss Grounded
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10 Vdd +3.3V ---
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11 Vbuson/AN5/CN7/RB5 RB5 LCD SEG5 (F), U5-10
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12 AN4/CN6/RB4 RB4 LCD SEG4 (E), U5-1
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13 AN3/CN5/RB3 RB3 LCD SEG3 (D), U5-2
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14 AN2/CN4/RB2 RB2 LCD SEG2 (C), U5-4
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15 PGEC1/AN1/Vref-/CN3/RB1 RB1 LCD SEG1 (B), U5-7
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16 PGED1/AN0/VREF+/CVREF+/PMA6/ RB0 LCD SEG0 (A), U5-11
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CN2/RB0
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*FLASH (U4, SOIC) not populated
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BOTTOM SIDE, LEFT-TO-RIGHT (if pin 1 is in upper left)
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PIN NAME SIGNAL NOTES
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---- ----------------------------- -------------- -------------------------------
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17 PGEC2/AN6/OCFA/RB6 PIC_PGC2 J2-5, ICSP
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18 PGED2/AN7/RB7 PIC_PGD2 J2-4, ICSP
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19 AVdd +3.3V ---
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20 AVss Grounded
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21 AN8/U2CTS/RB8 RB8 LCD SEG6 (G), U5-5
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22 AN9/PMA7/RB9 RB9 LCD SEG7 (DP), U5-3
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23 TMS/AN10/PMA13/RB10 UTIL_WP FLASH (U4) WP*
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24 TDO/AN11/PMA12/RB11 UTIL_CS FLASH (U4) CS*
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25 Vss Grounded
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26 Vdd +3.3V ---
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27 TCK/AN12/PMA11/RB12 N/C Not connected
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28 TDI/AN13/PMA10/RB13 N/C Not connected
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29 AN14/U2RTS/PMA1/RB14 temp_AD temp_AD
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30 AN15/PMA0/CN12/RB15 PMPA0 Display, JP1-4, RS
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31 SDA2/U2RX/PMA9/CN17/RF4 SDA LM75/SO, U3-1, SDA
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32 SCL2/U2TX/PMA8/CN18/RF5 SCL LM75/SO, U3-2, SCL
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*FLASH (U4, SOIC) not populated
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RIGHT SIDE, TOP-TO-BOTTOM (if pin 1 is in upper left)
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PIN NAME SIGNAL NOTES
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---- ----------------------------- -------------- -------------------------------
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48 SOSCO/T1CK/CN0/RC14 SOSCO 32.768KHz XTAL (Y1)
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47 SOSCI/CN1/RC13 SOSCI 32.768KHz XTAL (Y1)
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46 OC1/INT0/RD0 RD0 LCD DIG1, U5-12
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45 IC4/PMCS1/PMA14/RD11 PMCS1 Display, JP1-6, E
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44 SCL1/PMCS2/PMA15 RD10 LCD DIG2, U5-9
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43 SDA1/RD9 RD9 LCD DIG3, U5-8
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42 RTCC/RD8 RD8 LCD DIG4, U5-6
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41 Vss Grounded
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40 OSC2/CLKO/RC15 OSC2 20MHz XTAL (Y2)
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39 OSC1/CLKI/RC12 OSC1 20MHz XTAL (Y2)
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38 Vdd +3.3V ---
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37 D+ MCU_D+ USB connectors via PHY
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36 D- MCU_D- USB connectors via PHY
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35 Vusb +3.3V ---
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34 Vbus +5V_DUSB Display, USB Mini-B, USB Type A, JP1-1, +5V
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33 USBID/RF3 N/C Not connected
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TOP SIDE, LEFT-TO-RIGHT (if pin 1 is in upper left)
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PIN NAME SIGNAL NOTES
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---- ----------------------------- -------------- -------------------------------
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64 PMPD4/RD4 PMPD4 Display, JP1-11, DB4
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63 PMPD3/RD3 PMPD3 Display, JP1-10, DB3
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62 PMPD2/RD2 PMPD2 Display, JP1-9, DB2
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61 PMPD1/RD1 PMPD1 Display, JP1-8, DB1
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60 PMPD0/RE0 PMPD0 Display, JP1-7, DB0
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59 RF1 Key3 SW3-1
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58 RF0 Key2 SW2-1
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57 ENVREG ENVREG Pulled high
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56 Vcap/Vddcore VDDCORE Capacitors to ground
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55 CN16/RD7 N/C Not connected
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54 CN15/RD6 Key5 SW5-1
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53 PMRD/CN14/RD5 PMPRD ---
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52 OC5/PMWR/CN13/RD4 PWM2 Used to control backlight level (Vo)
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51 U1TX/OC4/RD3 N/C Not connected
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50 U1RX/OC3/RD2 N/C Not connected
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49 OC2/RD1 PWM1 Used to control backlight level (K)
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Toolchains
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==========
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@ -2,7 +2,7 @@
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* configs/sure-pic32mx/include/board.h
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* include/arch/board/board.h
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*
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* Copyright (C) 2011 Gregory Nutt. All rights reserved.
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* Copyright (C) 2011-2012 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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@ -91,8 +91,9 @@
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#undef BOARD_TIMER1_SOSC
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/* LED definitions **********************************************************/
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/* The Sure PIC32MX board has five LEDs. One (D4, lablel "Power") is not
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* controllable by software. Four are controllable by software:
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/* The Sure DB_DP11215 PIC32 Storage Demo Board board has five LEDs. One
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* (D4, lablel "Power") is not controllable by software. Four are
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* controllable by software:
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*
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* D7 "USB" Yellow RD7 Low illuminates
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* D8 "SD" Yellow RD6 Low illuminates
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#define LED_PANIC 5 /* N/C N/C N/C ON N/C N/C N/C OFF */
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#define LED_NVALUES 6
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/* The Sure DB-DP11212 PIC32 General Purpose Demo Board does not have any user
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* controllable LEDs, but does does have a segment LED display. That display is
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* however, obscured by the larger segment display attached to the board and, so,
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* is not supported.
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*/
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/* For distinguishing individual LEDs */
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#define LED_USB 0
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@ -40,9 +40,14 @@ CFLAGS += -I$(TOPDIR)/sched
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ASRCS =
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CSRCS = up_boot.c up_spi.c
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# Only the DB_DP11215 PIC32 Storage Demo Board board has user controllable
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# LEDs
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ifeq ($(CONFIG_ARCH_DBDP11215),y)
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ifeq ($(CONFIG_ARCH_LEDS),y)
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CSRCS += up_leds.c
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endif
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endif
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ifeq ($(CONFIG_ARCH_BUTTONS),y)
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CSRCS += up_buttons.c
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/****************************************************************************
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* Definitions
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****************************************************************************/
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/* The Sure PIC32MX board has three buttons.
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/* The Sure DB_DP11215 PIC32 Storage Demo Board has three buttons.
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*
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* SW1 (SW_UP, left arrow) RB3 Pulled high, Grounded/low when depressed
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* SW2 (SW_DOWN, down/right arrow) RB2 Pulled high, Grounded/low when depressed
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* SW3 (SW_OK, right arrow) RB4 Pulled high, Grounded/low when depressed
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*
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* The Sure DB-DP11212 PIC32 General Purpose Demo Board also has three buttons,
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* but these are connected differently:
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*
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* SW2-1 RF0 Pulled high, Grounded/low when depressed
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* SW3-1 RF1 Pulled high, Grounded/low when depressed
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* SW5-1 RD6 Pulled high, Grounded/low when depressed
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*
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* Internal pull-ups are not required since the LEDs are pull-up externally.
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* Change notification interrupts are not *automatically* enabled. Change
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* notification will be enabled when pic32mx_gpioattach() is called.
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*/
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#define GPIO_SW1 (GPIO_INPUT|GPIO_INT|GPIO_PORTB|GPIO_PIN3)
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#define GPIO_SW2 (GPIO_INPUT|GPIO_INT|GPIO_PORTB|GPIO_PIN2)
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#define GPIO_SW3 (GPIO_INPUT|GPIO_INT|GPIO_PORTB|GPIO_PIN4)
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#ifdef CONFIG_ARCH_DBDP11215
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# define GPIO_SW1 (GPIO_INPUT|GPIO_INT|GPIO_PORTB|GPIO_PIN3)
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# define GPIO_SW2 (GPIO_INPUT|GPIO_INT|GPIO_PORTB|GPIO_PIN2)
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# define GPIO_SW3 (GPIO_INPUT|GPIO_INT|GPIO_PORTB|GPIO_PIN4)
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#else /* CONFIG_ARCH_DBDP11212 */
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# define GPIO_SW1 (GPIO_INPUT|GPIO_INT|GPIO_PORTF|GPIO_PIN0)
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# define GPIO_SW2 (GPIO_INPUT|GPIO_INT|GPIO_PORTF|GPIO_PIN1)
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# define GPIO_SW3 (GPIO_INPUT|GPIO_INT|GPIO_PORTD|GPIO_PIN6)
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#endif
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/* Change notification numbers:
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* RB3 -> CN5
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@ -57,9 +57,11 @@
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/************************************************************************************
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* Definitions
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************************************************************************************/
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/* The Sure PIC32MX has an SD slot connected on SPI2:
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#ifdef CONFIG_ARCH_DBDP11215
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/* The Sure DB_DP11215 PIC32 Storage Demo Board has an SD slot connected on SPI2:
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*
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* SPI
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* SCK2/PMA5/CN8/RG6 SCK SD connector SCK, FLASH (U1) SCK*
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* SDI2/PMA4/CN9/RG7 SDI SD connector DO, FLASH (U1) SO*
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* SDO2/PMA3/CN10/RG8 SDO SD connector DI, FLASH (U1) SI*
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@ -73,12 +75,51 @@
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* TDI/AN13/PMA10/RB13 SD_WD SD connector WD
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*/
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#define GPIO_SD_CS (GPIO_OUTPUT|GPIO_VALUE_ONE|GPIO_PORTB|GPIO_PIN11)
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#define GPIO_SD_CD (GPIO_INPUT|GPIO_INT|GPIO_PORTB|GPIO_PIN12)
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#define GPIO_SD_WD (GPIO_INPUT|GPIO_PORTB|GPIO_PIN13)
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# define PIC32_HAVE_SD 1
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# define GPIO_SD_CS (GPIO_OUTPUT|GPIO_VALUE_ONE|GPIO_PORTB|GPIO_PIN11)
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# define GPIO_SD_CD (GPIO_INPUT|GPIO_INT|GPIO_PORTB|GPIO_PIN12)
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# define GPIO_SD_WD (GPIO_INPUT|GPIO_PORTB|GPIO_PIN13)
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/* The Sure DB_DP11215 PIC32 Storage Demo Board has pads an SOIC (Flash or
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* EEPROM) connected on SPI2, however, U4 is not populated on my board.
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*
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*
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* TMS/AN10/CVREFOUT/PMA13/RB10 UTIL_WP FLASH (U1) WP
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* SS2/PMA2/CN11/RG9 UTIL_CS FLASH (U1) CS
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*/
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# undef PIC32_HAVE_SOIC
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# define GPIO_SOIC_WP (GPIO_INPUT|GPIO_PORTB|GPIO_PIN10)
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# define GPIO_SOIC_CS (GPIO_OUTPUT|GPIO_VALUE_ONE|GPIO_PORTG|GPIO_PIN0)
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/* Change notification numbers -- Not available for SD_CD. */
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#endif
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#ifdef CONFIG_ARCH_DBDP11212
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/* The Sure DB-DP11212 PIC32 General Purpose Demo Board does not have an
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* SD slot.
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*/
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# undef PIC32_HAVE_SD
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/* The Sure DB-DP11212 PIC32 General Purpose Demo Board has an SOIC (Flash or
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* EEPROM) connected on SPI2:
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*
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*
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* TMS/AN10/PMA13/RB10 UTIL_WP FLASH (U4) WP
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* TDO/AN11/PMA12/RB11 UTIL_CS FLASH (U4) CS
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*/
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# define PIC32_HAVE_SOIC 1
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# define GPIO_SOIC_WP (GPIO_INPUT|GPIO_PORTB|GPIO_PIN10)
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# define GPIO_SOIC_CS (GPIO_OUTPUT|GPIO_VALUE_ONE|GPIO_PORTB|GPIO_PIN11)
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#endif
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||||
|
||||
/* The following enable debug output from this file.
|
||||
*
|
||||
* CONFIG_DEBUG_SPI && CONFIG_DEBUG - Define to enable basic SPI debug
|
||||
|
|
@ -124,9 +165,16 @@ void weak_function pic32mx_spiinitialize(void)
|
|||
* write protect (WP) inputs.
|
||||
*/
|
||||
|
||||
#ifdef PIC32_HAVE_SD
|
||||
pic32mx_configgpio(GPIO_SD_CS);
|
||||
pic32mx_configgpio(GPIO_SD_CD);
|
||||
pic32mx_configgpio(GPIO_SD_WD);
|
||||
#endif
|
||||
|
||||
#ifdef PIC32_HAVE_SOIC
|
||||
pic32mx_configgpio(GPIO_SOIC_WP);
|
||||
pic32mx_configgpio(GPIO_SOIC_CS);
|
||||
#endif
|
||||
}
|
||||
|
||||
/************************************************************************************
|
||||
|
|
@ -161,32 +209,62 @@ void pic32mx_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool se
|
|||
|
||||
/* The SD card chip select is pulled high and active low */
|
||||
|
||||
#ifdef PIC32_HAVE_SD
|
||||
if (devid == SPIDEV_MMCSD)
|
||||
{
|
||||
pic32mx_gpiowrite(GPIO_SD_CS, !selected);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef PIC32_HAVE_SOIC
|
||||
if (devid == SPIDEV_FLASH)
|
||||
{
|
||||
pic32mx_gpiowrite(GPIO_SOIC_CS, !selected);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
uint8_t pic32mx_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
|
||||
{
|
||||
uint8_t ret = 0;
|
||||
|
||||
/* Card detect is pull up on-board. If a low value is sensed then the card must
|
||||
* be present.
|
||||
/* Card detect is pull up on-board. If a low value is sensed then the
|
||||
* card must be present.
|
||||
*/
|
||||
|
||||
if (!pic32mx_gpioread(GPIO_SD_CD))
|
||||
#ifdef PIC32_HAVE_SD
|
||||
if (devid == SPIDEV_MMCSD)
|
||||
{
|
||||
if (!pic32mx_gpioread(GPIO_SD_CD))
|
||||
{
|
||||
ret = SPI_STATUS_PRESENT;
|
||||
|
||||
/* It seems that a high value indicates the the card is write
|
||||
* protected.
|
||||
*/
|
||||
|
||||
if (pic32mx_gpioread(GPIO_SD_WD))
|
||||
{
|
||||
ret |= SPI_STATUS_WRPROTECTED;
|
||||
}
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef PIC32_HAVE_SOIC
|
||||
if (devid == SPIDEV_FLASH)
|
||||
{
|
||||
ret = SPI_STATUS_PRESENT;
|
||||
|
||||
/* It seems that a high value indicatest the the card is write protected. */
|
||||
/* Write protect is indicated with a low value. */
|
||||
|
||||
if (pic32mx_gpioread(GPIO_SD_WD))
|
||||
if (pic32mx_gpioread(GPIO_SOIC_WP))
|
||||
{
|
||||
ret |= SPI_STATUS_WRPROTECTED;
|
||||
}
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
spivdbg("Returning %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -56,7 +56,10 @@
|
|||
/************************************************************************************
|
||||
* Definitions
|
||||
************************************************************************************/
|
||||
/*
|
||||
/* The Sure DB_DP11215 PIC32 Storage Demo Board has a CP2102 PHY that is shared
|
||||
* between the USB and the UART-to-USB logic. That PHY must be programmed during
|
||||
* boot up for USB functionality (since the UART-to-USB is not populated).
|
||||
*
|
||||
* PIN NAME SIGNAL NOTES
|
||||
* ---- ------------------------------- -------------- ------------------------------
|
||||
* 11 AN5/C1IN+/Vbuson/CN7/RB5 Vbuson/AN5/RB5 To USB VBUS circuitry
|
||||
|
|
@ -64,9 +67,11 @@
|
|||
* 44 SCL1/IC3/PMCS2/PMA15/INT3/RD10 USB_OPT USB PHY
|
||||
*/
|
||||
|
||||
#define GPIO_USB_VBUSON (GPIO_INPUT|GPIO_PORTB|GPIO_PIN5)
|
||||
#define GPIO_USB_OPTEN (GPIO_OUTPUT|GPIO_VALUE_ZERO|GPIO_PORTD|GPIO_PIN9)
|
||||
#define GPIO_USB_OPT (GPIO_OUTPUT|GPIO_VALUE_ONE|GPIO_PORTD|GPIO_PIN10)
|
||||
#ifdef CONFIG_ARCH_DBDP11215
|
||||
# define GPIO_USB_VBUSON (GPIO_INPUT|GPIO_PORTB|GPIO_PIN5)
|
||||
# define GPIO_USB_OPTEN (GPIO_OUTPUT|GPIO_VALUE_ZERO|GPIO_PORTD|GPIO_PIN9)
|
||||
# define GPIO_USB_OPT (GPIO_OUTPUT|GPIO_VALUE_ONE|GPIO_PORTD|GPIO_PIN10)
|
||||
#endif
|
||||
|
||||
/************************************************************************************
|
||||
* Private Functions
|
||||
|
|
@ -88,8 +93,10 @@ void weak_function pic32mx_usbdevinitialize(void)
|
|||
{
|
||||
/* Connect the PHY to the USB mini-B port. Order and timing matter! */
|
||||
|
||||
#ifdef CONFIG_ARCH_DBDP11215
|
||||
pic32mx_configgpio(GPIO_USB_OPTEN);
|
||||
pic32mx_configgpio(GPIO_USB_OPT);
|
||||
#endif
|
||||
|
||||
/* Notes from the Sure Electronics sample code:
|
||||
*
|
||||
|
|
|
|||
Loading…
Reference in New Issue