Add logic to support a ROM'ed MMU page table
git-svn-id: https://nuttx.svn.sourceforge.net/svnroot/nuttx/trunk@2470 7fd9a85b-ad96-42d3-883c-3090e2eb8679
This commit is contained in:
patacongo
parent
b5b949bbde
commit
c63d93e7f0
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@ -148,6 +148,7 @@ __start:
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/* Clear the 16K level 1 page table */
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ldr r4, .LCppgtable /* r4=phys. page table */
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#ifndef CONFIG_ARCH_ROMPGTABLE
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mov r0, r4
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mov r1, #0
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add r2, r0, #PGTABLE_SIZE
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@ -179,6 +180,7 @@ __start:
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ldr r2, .LCvpgtable /* r2=virt. page table */
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mksection r0, r2 /* r0=virt. base section */
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str r3, [r4, r0, lsr #18] /* identity mapping */
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#endif /* CONFIG_ARCH_ROMPGTABLE */
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/* The following logic will set up the ARM920/ARM926 for normal operation */
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@ -213,7 +215,7 @@ __start:
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orr r0, r0, #(CR_M|CR_P|CR_D)
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/* In most architectures, vectors are reloated to 0xffff0000.
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/* In most architectures, vectors are relocated to 0xffff0000.
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* -- but not all
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*/
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@ -253,15 +255,22 @@ __start:
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.type .LCvstart, %object
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.LCvstart:
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.long .Lvstart
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#ifndef CONFIG_ARCH_ROMPGTABLE
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.type .LCmmuflags, %object
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.LCmmuflags:
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.long MMU_MEMFLAGS
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#endif
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.type .LCppagetable, %object
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.LCppgtable:
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.long CONFIG_DRAM_START /* Physical start of DRAM */
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.long PGTABLE_BASE_PADDR /* Physical start of DRAM */
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#ifndef CONFIG_ARCH_ROMPGTABLE
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.type .LCvpagetable, %object
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.LCvpgtable:
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.long CONFIG_DRAM_VSTART /* Virtual start of DRAM */
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.long PGTABLE_BASE_VADDR /* Virtual start of DRAM */
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#endif
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.size _start, .-_start
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/****************************************************************************
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@ -278,6 +287,7 @@ __start:
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/* Remove the temporary null mapping */
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#ifndef CONFIG_ARCH_ROMPGTABLE
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ldr r4, .LCvpgtable /* r4=virtual page table */
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ldr r1, .LCppgtable /* r1=phys. page table */
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mksection r3, r1 /* r2=phys. base addr */
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@ -306,6 +316,7 @@ __start:
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add r3, r3, #SECTION_SIZE
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str r3, [r0], #4
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.endr
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#endif /* CONFIG_ARCH_ROMPGTABLE */
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/* Zero BSS and set up the stack pointer */
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@ -82,13 +82,17 @@ extern uint32_t _vector_end; /* End+1 of vector block */
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* space of the LPCD313x.
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*/
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#ifndef CONFIG_ARM_ROMPGTABLE
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#ifndef CONFIG_ARCH_ROMPGTABLE
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static const struct section_mapping_s section_mapping[] =
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{
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{ LPC313X_SHADOWSPACE_PSECTION, LPC313X_SHADOWSPACE_VSECTION,
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LPC313X_SHADOWSPACE_MMUFLAGS, LPC313X_SHADOWSPACE_NSECTIONS},
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{ LPC313X_INTSRAM_PSECTION, LPC313X_INTSRAM_VSECTION,
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LPC313X_INTSRAM_MMUFLAGS, LPC313X_INTSRAM_NSECTIONS},
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#ifdef CONFIG_ARCH_ROMPGTABLE
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{ LPC313X_INTSROM0_PSECTION, LPC313X_INTSROM0_VSECTION,
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LPC313X_INTSROM_MMUFLAGS, LPC313X_INTSROM0_NSECTIONS},
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#endif
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{ LPC313X_APB0_PSECTION, LPC313X_APB0_VSECTION,
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LPC313X_APB0_MMUFLAGS, LPC313X_APB0_NSECTIONS},
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{ LPC313X_APB1_PSECTION, LPC313X_APB1_VSECTION,
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@ -129,7 +133,7 @@ static const struct section_mapping_s section_mapping[] =
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* Name: up_setlevel1entry
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************************************************************************************/
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#ifndef CONFIG_ARM_ROMPGTABLE
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#ifndef CONFIG_ARCH_ROMPGTABLE
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static inline void up_setlevel1entry(uint32_t paddr, uint32_t vaddr, uint32_t mmuflags)
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{
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uint32_t *pgtable = (uint32_t*)PGTABLE_BASE_VADDR;
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@ -167,7 +171,7 @@ static inline void up_setlevel2coarseentry(uint32_t ctabvaddr, uint32_t paddr,
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* Name: up_setupmappings
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************************************************************************************/
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#ifndef CONFIG_ARM_ROMPGTABLE
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#ifndef CONFIG_ARCH_ROMPGTABLE
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static void up_setupmappings(void)
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{
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int i, j;
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@ -201,7 +205,7 @@ static void up_setupmappings(void)
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*
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************************************************************************************/
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#if !defined(CONFIG_ARM_ROMPGTABLE) && !defined(CONFIG_ARM_LOWVECTORS)
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#if !defined(CONFIG_ARCH_ROMPGTABLE) && !defined(CONFIG_ARCH_LOWVECTORS)
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static void up_vectormapping(void)
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{
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uint32_t vector_paddr = LPC313X_VECTOR_PADDR;
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@ -254,14 +258,14 @@ void up_boot(void)
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* IO regions (Including the vector region).
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*/
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#ifndef CONFIG_ARM_ROMPGTABLE
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#ifndef CONFIG_ARCH_ROMPGTABLE
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up_setupmappings();
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/* Provide a special mapping for the IRAM interrupt vector positioned in high
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* memory.
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*/
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#ifndef CONFIG_ARM_LOWVECTORS
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#ifndef CONFIG_ARCH_LOWVECTORS
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up_vectormapping();
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#endif
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#endif
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@ -92,8 +92,8 @@ void up_decodeirq(uint32_t *regs)
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index = getreg32(LPC313X_INTC_VECTOR0) & INTC_VECTOR_INDEX_MASK;
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if (index != 0)
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{
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/* Shift the index so that the range of IRQ numbers are in bits 0-7 (up
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* 0-127 and back off the IRQ number by 1 so that the numbering is zero-based
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/* Shift the index so that the range of IRQ numbers are in bits 0-7 (values
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* 1-127) and back off the IRQ number by 1 so that the numbering is zero-based
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*/
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irq = (index >> INTC_VECTOR_INDEX_SHIFT) -1;
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@ -154,6 +154,7 @@
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#define LPC313X_SHADOWSPACE_NSECTIONS 1 /* 4Kb - <1 section */
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#define LPC313X_INTSRAM_NSECTIONS 1 /* 96 or 192Kb - <1 section */
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#define LPC313X_APB0_NSECTIONS 1 /* 32Kb - <1 section */
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#define LPC313X_INTSROM0_NSECTIONS 1 /* 128Kb - <1 section */
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#define LPC313X_APB1_NSECTIONS 1 /* 16Kb - <1 section */
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#define LPC313X_APB2_NSECTIONS 1 /* 16Kb - <1 section */
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#define LPC313X_APB3_NSECTIONS 1 /* 1Kb - <1 section */
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@ -176,6 +177,7 @@
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#define LPC313X_SHADOWSPACE_MMUFLAGS MMU_MEMFLAGS
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#define LPC313X_INTSRAM_MMUFLAGS MMU_MEMFLAGS
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#define LPC313X_INTSROM_MMUFLAGS MMU_MEMFLAGS
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#define LPC313X_APB0_MMUFLAGS MMU_IOFLAGS
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#define LPC313X_APB1_MMUFLAGS MMU_IOFLAGS
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#define LPC313X_APB2_MMUFLAGS MMU_IOFLAGS
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@ -188,13 +190,20 @@
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#define LPC313X_INTC_MMUFLAGS MMU_IOFLAGS
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#define LPC313X_NAND_MMUFLAGS MMU_IOFLAGS
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/* board_memorymap.h contains special mappings that are needed when a ROM
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* memory map is used. It is included in this odd location becaue it depends
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* on some the virtual address definitions provided above.
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*/
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#include <arch/board/board_memorymap.h>
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/* LPC313X Virtual (mapped) Memory Map. These are the mappings that will
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* be created if the page table lies in RAM. If the platform has another,
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* read-only, pre-initialized page table (perhaps in ROM), then the board.h
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* file must provide these definitions.
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*/
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#ifndef CONFIG_ARM_ROMPGTABLE
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#ifndef CONFIG_ARCH_ROMPGTABLE
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# define LPC313X_SHADOWSPACE_VSECTION 0x00000000 /* 0x00000000-0x00000fff: Shadow Area 4Kb */
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# define LPC313X_INTSRAM_VSECTION 0x11028000 /* Internal SRAM 96Kb-192Kb */
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# define LPC313X_INTSRAM0_VADDR 0x11028000 /* 0x11028000-0x1103ffff: Internal SRAM 0 96Kb */
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@ -249,18 +258,19 @@
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# endif
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/* A sanity check, if the configuration says that the page table is read-only
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* and pre-initialized (maybe ROM), then it should have also defined CONFIG_PGTABLE_BASE
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* and pre-initialized (maybe ROM), then it should have also defined both of
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* the page table base addresses.
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*/
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# ifdef CONFIG_ARM_ROMPGTABLE
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# error "CONFIG_ARM_ROMPGTABLE defined; CONFIG_PGTABLE_BASE not defined"
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# ifdef CONFIG_ARCH_ROMPGTABLE
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# error "CONFIG_ARCH_ROMPGTABLE defined; PGTABLE_BASE_P/VADDR not defined"
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# else
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/* We must declare the page table in ISRAM0 or 1. We decide depending upon
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* where the vector table was place.
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*/
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# ifdef CONFIG_ARM_ROMPGTABLE /* Vectors located at 0x0000:0000 */
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# ifdef CONFIG_ARCH_ROMPGTABLE /* Vectors located at 0x0000:0000 */
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/* In this case, ISRAM0 will be shadowed at address 0x0000:0000. The page
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* table must lie at the top 16Kb of ISRAM1 (or ISRAM0 if this is a LPC3130)
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@ -311,7 +321,7 @@
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/* Determine the base address of the vector table */
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#define VECTOR_TABLE_SIZE 0x00010000
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#ifdef CONFIG_ARM_LOWVECTORS /* Vectors located at 0x0000:0000 */
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#ifdef CONFIG_ARCH_LOWVECTORS /* Vectors located at 0x0000:0000 */
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# define LPC313X_VECTOR_PADDR LPC313X_SHADOWSPACE_PSECTION
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# define LPC313X_VECTOR_VADDR 0x00000000
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# define LPC313X_VECTOR_VCOARSE 0x00000000
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@ -100,7 +100,6 @@
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#define BOARD_CLKS_64_92 \
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(0)
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/* LED definitions ******************************************************************/
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#define LED_STARTED 0
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@ -0,0 +1,116 @@
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/************************************************************************************
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* configs/ea3131/include/board_memorymap.h
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* include/arch/board/board_memorymap.h
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*
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* Copyright (C) 2009 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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#ifndef __ARCH_BOARD_BOARD_MEMORYMAP_H
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#define __ARCH_BOARD_BOARD_MEMORYMAP_H
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/* This file should never be included directly, but only indirectly via
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* lpc313x_memorymap.h.
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*/
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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/************************************************************************************
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* Definitions
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************************************************************************************/
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/* If the LPC313x ROM page table is selected, then the board-logic is required
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* to provide:
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*
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* PGTABLE_BASE_PADDR - The physical address of the page table in ROM,
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* PGTABLE_BASE_VADDR - The mapped address of the page table in ROM, and
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* Mappings for each of the PSECTIONS in lpc313x_memorymap.h
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*/
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#ifdef CONFIG_ARCH_ROMPGTABLE
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/* The LPC313x ROM page table uses a 1-1 physical to virtual memory mapping */
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# define LPC313X_SHADOWSPACE_VSECTION 0x00000000 /* 0x00000000-0x00000fff: Shadow Area 4Kb */
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# define LPC313X_INTSRAM_VSECTION 0x11028000 /* Internal SRAM 96Kb-192Kb */
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# define LPC313X_INTSRAM0_VADDR 0x11028000 /* 0x11028000-0x1103ffff: Internal SRAM 0 96Kb */
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# define LPC313X_INTSRAM1_VADDR 0x11040000 /* 0x11040000-0x11057fff: Internal SRAM 1 96Kb */
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# define LPC313X_INTSROM0_VSECTION 0x12000000 /* 0x12000000-0x1201ffff: Internal SROM 0 128Kb */
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# define LPC313X_APB0_VSECTION 0x13000000 /* 0x13000000-0x13007fff: APB0 32Kb */
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# define LPC313X_APB1_VSECTION 0x13008000 /* 0x13008000-0x1300bfff: APB1 16Kb */
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# define LPC313X_APB2_VSECTION 0x15000000 /* 0x15000000-0x15003fff: APB2 16Kb */
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# define LPC313X_APB3_VSECTION 0x16000000 /* 0x16000000-0x160003ff: APB3 1Kb */
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# define LPC313X_APB4MPMC_VSECTION 0x17000000 /* 8Kb */
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# define LPC313X_APB4_VADDR 0x17000000 /* 0x17000000-0x17000fff: APB4 4Kb */
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# define LPC313X_MPMC_VADDR 0x17008000 /* 0x17008000-0x17008fff: MPMC cfg 4Kb */
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# define LPC313X_MCI_VSECTION 0x18000000 /* 0x18000000 0x180003ff: MCI/SD/SDIO 1Kb */
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# define LPC313X_USBOTG_VSECTION 0x19000000 /* 0x19000000-0x19000fff: USB OTG 4Kb */
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# define LPC313X_EXTSRAM_VSECTION 0x20020000 /* 64-128Kb */
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# define LPC313X_EXTSRAM0_VADDR 0x20000000 /* 0x20000000-0x2001ffff: External SRAM 0 64-128Kb */
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# define LPC313X_EXTSRAM1_VADDR 0x20020000 /* 0x20020000-0x2003ffff: External SRAM 1 64-128Kb */
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# define LPC313X_EXTSDRAM0_VSECTION 0x30000000 /* 0x30000000-0x37ffffff: External SDRAM 0 128Mb */
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# define LPC313X_INTC_VSECTION 0x60000000 /* 0x60000000-0x60000fff: Interrupt controller 4Kb */
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# define LPC313X_NAND_VSECTION 0x70000000 /* 0x70000000-0x700007ff: NANDFLASH Ctrl 2Kb */
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/* Define the address of the page table within the ROM */
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# define ROMPGTABLE_OFFSET 0x0001c00 /* Offset of the ROM page table in ROM */
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# define PGTABLE_BASE_PADDR (LPC313X_INTSROM0_PSECTION+ROMPGTABLE_OFFSET)
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# define PGTABLE_BASE_VADDR (LPC313X_INTSROM0_VSECTION+ROMPGTABLE_OFFSET)
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#endif
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/************************************************************************************
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* Public Data
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************************************************************************************/
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#ifndef __ASSEMBLY__
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#undef EXTERN
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#if defined(__cplusplus)
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#define EXTERN extern "C"
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extern "C" {
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#else
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#define EXTERN extern
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#endif
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/************************************************************************************
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* Public Function Prototypes
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************************************************************************************/
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#undef EXTERN
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#if defined(__cplusplus)
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}
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#endif
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#endif /* __ASSEMBLY__ */
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#endif /* __ARCH_BOARD_BOARD_MEMORYMAP_H */
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@ -96,17 +96,15 @@ CONFIG_ARCH_DMA=n
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#
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# ARM-specific configuration
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#
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# CONFIG_ARM_LOWVECTORS - define if vectors reside at address 0x0000:00000
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# CONFIG_ARCH_LOWVECTORS - define if vectors reside at address 0x0000:00000
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# Undefine if vectors reside at address 0xffff:0000
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# CONFIG_ARM_ROMPGTABLE - A pre-initialized, read-only page table is available
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# CONFIG_PGTABLE_BASE must also be defined in this case.
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# CONFIG_PGTABLE_BASE - The (physical) base address of the pre-initialized
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# read-only page table vector. This must be provided if CONFIG_ARM_ROMPGTABLE
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# is defined.
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# CONFIG_ARCH_ROMPGTABLE - A pre-initialized, read-only page table is available.
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# If defined, then board-specific logic must also define PGTABLE_BASE_PADDR,
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# PGTABLE_BASE_VADDR, and all memory section mapping in a file named
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# board_memorymap.h.
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#
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CONFIG_ARM_LOWVECTORS=y
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CONFIG_ARM_ROMPGTABLE=n
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#CONFIG_PGTABLE_BASE=
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CONFIG_ARCH_LOWVECTORS=y
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CONFIG_ARCH_ROMPGTABLE=y
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# Identify toolchain and linker options
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#
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@ -52,8 +52,6 @@
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# CONFIG_DRAM_SIZE - Describes the installed DRAM.
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# CONFIG_DRAM_START - The start address of DRAM (physical)
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# CONFIG_DRAM_VSTART - The startaddress of DRAM (virtual)
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# CONFIG_ARCH_LOWVECTORS - Leave ARM interrupt vectors at 0x0000:0000
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# instead of moving to 0xffff:0000
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# CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt
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# stack. If defined, this symbol is the size of the interrupt
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# stack in bytes. If not defined, the user task stacks will be
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@ -72,24 +70,20 @@ CONFIG_DRAM_SIZE=0x01000000
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CONFIG_DRAM_START=0x08000000
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CONFIG_DRAM_VSTART=0x00000000
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CONFIG_DRAM_NUTTXENTRY=0x01004000
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CONFIG_ARCH_LOWVECTORS=y
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CONFIG_ARCH_INTERRUPTSTACK=n
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CONFIG_ARCH_STACKDUMP=y
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||||
#
|
||||
# ARM-specific configuration
|
||||
#
|
||||
# CONFIG_ARM_LOWVECTORS - define if vectors reside at address 0x0000:00000
|
||||
# CONFIG_ARCH_LOWVECTORS - define if vectors reside at address 0x0000:00000
|
||||
# Undefine if vectors reside at address 0xffff:0000
|
||||
# CONFIG_ARM_ROMPGTABLE - A pre-initialized, read-only page table is available
|
||||
# CONFIG_PGTABLE_BASE must also be defined in this case.
|
||||
# CONFIG_PGTABLE_BASE - The (physical) base address of the pre-initialized
|
||||
# read-only page table vector. This must be provided if CONFIG_ARM_ROMPGTABLE
|
||||
# is defined.
|
||||
# CONFIG_ARCH_ROMPGTABLE - A pre-initialized, read-only page table is available.
|
||||
# If defined, then board-specific logic must also define PGTABLE_BASE_PADDR,
|
||||
# PGTABLE_BASE_VADDR, and all memory section mapping, possibly in board.h
|
||||
#
|
||||
CONFIG_ARM_LOWVECTORS=n
|
||||
CONFIG_ARM_ROMPGTABLE=n
|
||||
#CONFIG_PGTABLE_BASE=
|
||||
CONFIG_ARCH_LOWVECTORS=y
|
||||
CONFIG_ARCH_ROMPGTABLE=n
|
||||
|
||||
#
|
||||
# IMX specific serial device driver settings
|
||||
|
|
|
|||
|
|
@ -76,17 +76,14 @@ CONFIG_ARCH_STACKDUMP=n
|
|||
#
|
||||
# ARM-specific configuration
|
||||
#
|
||||
# CONFIG_ARM_LOWVECTORS - define if vectors reside at address 0x0000:00000
|
||||
# CONFIG_ARCH_LOWVECTORS - define if vectors reside at address 0x0000:00000
|
||||
# Undefine if vectors reside at address 0xffff:0000
|
||||
# CONFIG_ARM_ROMPGTABLE - A pre-initialized, read-only page table is available
|
||||
# CONFIG_PGTABLE_BASE must also be defined in this case.
|
||||
# CONFIG_PGTABLE_BASE - The (physical) base address of the pre-initialized
|
||||
# read-only page table vector. This must be provided if CONFIG_ARM_ROMPGTABLE
|
||||
# is defined.
|
||||
# CONFIG_ARCH_ROMPGTABLE - A pre-initialized, read-only page table is available.
|
||||
# If defined, then board-specific logic must also define PGTABLE_BASE_PADDR,
|
||||
# PGTABLE_BASE_VADDR, and all memory section mapping, possibly in board.h
|
||||
#
|
||||
CONFIG_ARM_LOWVECTORS=n
|
||||
CONFIG_ARM_ROMPGTABLE=n
|
||||
#CONFIG_PGTABLE_BASE=
|
||||
CONFIG_ARCH_LOWVECTORS=n
|
||||
CONFIG_ARCH_ROMPGTABLE=n
|
||||
|
||||
#
|
||||
# DM320 specific device driver settings
|
||||
|
|
|
|||
|
|
@ -76,17 +76,14 @@ CONFIG_ARCH_STACKDUMP=n
|
|||
#
|
||||
# ARM-specific configuration
|
||||
#
|
||||
# CONFIG_ARM_LOWVECTORS - define if vectors reside at address 0x0000:00000
|
||||
# CONFIG_ARCH_LOWVECTORS - define if vectors reside at address 0x0000:00000
|
||||
# Undefine if vectors reside at address 0xffff:0000
|
||||
# CONFIG_ARM_ROMPGTABLE - A pre-initialized, read-only page table is available
|
||||
# CONFIG_PGTABLE_BASE must also be defined in this case.
|
||||
# CONFIG_PGTABLE_BASE - The (physical) base address of the pre-initialized
|
||||
# read-only page table vector. This must be provided if CONFIG_ARM_ROMPGTABLE
|
||||
# is defined.
|
||||
# CONFIG_ARCH_ROMPGTABLE - A pre-initialized, read-only page table is available.
|
||||
# If defined, then board-specific logic must also define PGTABLE_BASE_PADDR,
|
||||
# PGTABLE_BASE_VADDR, and all memory section mapping, possibly in board.h
|
||||
#
|
||||
CONFIG_ARM_LOWVECTORS=n
|
||||
CONFIG_ARM_ROMPGTABLE=n
|
||||
#CONFIG_PGTABLE_BASE=
|
||||
CONFIG_ARCH_LOWVECTORS=n
|
||||
CONFIG_ARCH_ROMPGTABLE=n
|
||||
|
||||
#
|
||||
# DM320 specific device driver settings
|
||||
|
|
|
|||
|
|
@ -76,17 +76,14 @@ CONFIG_ARCH_STACKDUMP=y
|
|||
#
|
||||
# ARM-specific configuration
|
||||
#
|
||||
# CONFIG_ARM_LOWVECTORS - define if vectors reside at address 0x0000:00000
|
||||
# CONFIG_ARCH_LOWVECTORS - define if vectors reside at address 0x0000:00000
|
||||
# Undefine if vectors reside at address 0xffff:0000
|
||||
# CONFIG_ARM_ROMPGTABLE - A pre-initialized, read-only page table is available
|
||||
# CONFIG_PGTABLE_BASE must also be defined in this case.
|
||||
# CONFIG_PGTABLE_BASE - The (physical) base address of the pre-initialized
|
||||
# read-only page table vector. This must be provided if CONFIG_ARM_ROMPGTABLE
|
||||
# is defined.
|
||||
# CONFIG_ARCH_ROMPGTABLE - A pre-initialized, read-only page table is available.
|
||||
# If defined, then board-specific logic must also define PGTABLE_BASE_PADDR,
|
||||
# PGTABLE_BASE_VADDR, and all memory section mapping, possibly in board.h
|
||||
#
|
||||
CONFIG_ARM_LOWVECTORS=n
|
||||
CONFIG_ARM_ROMPGTABLE=n
|
||||
#CONFIG_PGTABLE_BASE=
|
||||
CONFIG_ARCH_LOWVECTORS=n
|
||||
CONFIG_ARCH_ROMPGTABLE=n
|
||||
|
||||
#
|
||||
# DM320 specific device driver settings
|
||||
|
|
|
|||
|
|
@ -76,17 +76,14 @@ CONFIG_ARCH_STACKDUMP=n
|
|||
#
|
||||
# ARM-specific configuration
|
||||
#
|
||||
# CONFIG_ARM_LOWVECTORS - define if vectors reside at address 0x0000:00000
|
||||
# CONFIG_ARCH_LOWVECTORS - define if vectors reside at address 0x0000:00000
|
||||
# Undefine if vectors reside at address 0xffff:0000
|
||||
# CONFIG_ARM_ROMPGTABLE - A pre-initialized, read-only page table is available
|
||||
# CONFIG_PGTABLE_BASE must also be defined in this case.
|
||||
# CONFIG_PGTABLE_BASE - The (physical) base address of the pre-initialized
|
||||
# read-only page table vector. This must be provided if CONFIG_ARM_ROMPGTABLE
|
||||
# is defined.
|
||||
# CONFIG_ARCH_ROMPGTABLE - A pre-initialized, read-only page table is available.
|
||||
# If defined, then board-specific logic must also define PGTABLE_BASE_PADDR,
|
||||
# PGTABLE_BASE_VADDR, and all memory section mapping, possibly in board.h
|
||||
#
|
||||
CONFIG_ARM_LOWVECTORS=n
|
||||
CONFIG_ARM_ROMPGTABLE=n
|
||||
#CONFIG_PGTABLE_BASE=
|
||||
CONFIG_ARCH_LOWVECTORS=n
|
||||
CONFIG_ARCH_ROMPGTABLE=n
|
||||
|
||||
#
|
||||
# DM320 specific device driver settings
|
||||
|
|
|
|||
|
|
@ -76,17 +76,14 @@ CONFIG_ARCH_STACKDUMP=n
|
|||
#
|
||||
# ARM-specific configuration
|
||||
#
|
||||
# CONFIG_ARM_LOWVECTORS - define if vectors reside at address 0x0000:00000
|
||||
# CONFIG_ARCH_LOWVECTORS - define if vectors reside at address 0x0000:00000
|
||||
# Undefine if vectors reside at address 0xffff:0000
|
||||
# CONFIG_ARM_ROMPGTABLE - A pre-initialized, read-only page table is available
|
||||
# CONFIG_PGTABLE_BASE must also be defined in this case.
|
||||
# CONFIG_PGTABLE_BASE - The (physical) base address of the pre-initialized
|
||||
# read-only page table vector. This must be provided if CONFIG_ARM_ROMPGTABLE
|
||||
# is defined.
|
||||
# CONFIG_ARCH_ROMPGTABLE - A pre-initialized, read-only page table is available.
|
||||
# If defined, then board-specific logic must also define PGTABLE_BASE_PADDR,
|
||||
# PGTABLE_BASE_VADDR, and all memory section mapping, possibly in board.h
|
||||
#
|
||||
CONFIG_ARM_LOWVECTORS=n
|
||||
CONFIG_ARM_ROMPGTABLE=n
|
||||
#CONFIG_PGTABLE_BASE=
|
||||
CONFIG_ARCH_LOWVECTORS=n
|
||||
CONFIG_ARCH_ROMPGTABLE=n
|
||||
|
||||
#
|
||||
# DM320 specific device driver settings
|
||||
|
|
|
|||
|
|
@ -76,17 +76,14 @@ CONFIG_ARCH_STACKDUMP=n
|
|||
#
|
||||
# ARM-specific configuration
|
||||
#
|
||||
# CONFIG_ARM_LOWVECTORS - define if vectors reside at address 0x0000:00000
|
||||
# CONFIG_ARCH_LOWVECTORS - define if vectors reside at address 0x0000:00000
|
||||
# Undefine if vectors reside at address 0xffff:0000
|
||||
# CONFIG_ARM_ROMPGTABLE - A pre-initialized, read-only page table is available
|
||||
# CONFIG_PGTABLE_BASE must also be defined in this case.
|
||||
# CONFIG_PGTABLE_BASE - The (physical) base address of the pre-initialized
|
||||
# read-only page table vector. This must be provided if CONFIG_ARM_ROMPGTABLE
|
||||
# is defined.
|
||||
# CONFIG_ARCH_ROMPGTABLE - A pre-initialized, read-only page table is available.
|
||||
# If defined, then board-specific logic must also define PGTABLE_BASE_PADDR,
|
||||
# PGTABLE_BASE_VADDR, and all memory section mapping, possibly in board.h
|
||||
#
|
||||
CONFIG_ARM_LOWVECTORS=n
|
||||
CONFIG_ARM_ROMPGTABLE=n
|
||||
#CONFIG_PGTABLE_BASE=
|
||||
CONFIG_ARCH_LOWVECTORS=n
|
||||
CONFIG_ARCH_ROMPGTABLE=n
|
||||
|
||||
#
|
||||
# DM320 specific device driver settings
|
||||
|
|
|
|||
|
|
@ -76,17 +76,14 @@ CONFIG_ARCH_STACKDUMP=n
|
|||
#
|
||||
# ARM-specific configuration
|
||||
#
|
||||
# CONFIG_ARM_LOWVECTORS - define if vectors reside at address 0x0000:00000
|
||||
# CONFIG_ARCH_LOWVECTORS - define if vectors reside at address 0x0000:00000
|
||||
# Undefine if vectors reside at address 0xffff:0000
|
||||
# CONFIG_ARM_ROMPGTABLE - A pre-initialized, read-only page table is available
|
||||
# CONFIG_PGTABLE_BASE must also be defined in this case.
|
||||
# CONFIG_PGTABLE_BASE - The (physical) base address of the pre-initialized
|
||||
# read-only page table vector. This must be provided if CONFIG_ARM_ROMPGTABLE
|
||||
# is defined.
|
||||
# CONFIG_ARCH_ROMPGTABLE - A pre-initialized, read-only page table is available.
|
||||
# If defined, then board-specific logic must also define PGTABLE_BASE_PADDR,
|
||||
# PGTABLE_BASE_VADDR, and all memory section mapping, possibly in board.h
|
||||
#
|
||||
CONFIG_ARM_LOWVECTORS=n
|
||||
CONFIG_ARM_ROMPGTABLE=n
|
||||
#CONFIG_PGTABLE_BASE=
|
||||
CONFIG_ARCH_LOWVECTORS=n
|
||||
CONFIG_ARCH_ROMPGTABLE=n
|
||||
|
||||
#
|
||||
# DM320 specific device driver settings
|
||||
|
|
|
|||
Loading…
Reference in New Issue