Fix AVR clock setup; add SPI driver
git-svn-id: https://nuttx.svn.sourceforge.net/svnroot/nuttx/trunk@3721 7fd9a85b-ad96-42d3-883c-3090e2eb8679
This commit is contained in:
parent
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15
nuttx/TODO
15
nuttx/TODO
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@ -29,7 +29,7 @@ nuttx/
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(3) ARM/STR71x (arch/arm/src/str71x/)
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(3) ARM/STR71x (arch/arm/src/str71x/)
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(4) ARM/LM3S6918 (arch/arm/src/lm3s/)
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(4) ARM/LM3S6918 (arch/arm/src/lm3s/)
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(4) ARM/STM32 (arch/arm/src/stm32/)
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(4) ARM/STM32 (arch/arm/src/stm32/)
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(3) AVR (arch/avr)
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(2) AVR (arch/avr)
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(0) Intel x86 (arch/x86)
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(0) Intel x86 (arch/x86)
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(4) 8051 / MCS51 (arch/8051/)
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(4) 8051 / MCS51 (arch/8051/)
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(2) Hitachi/Renesas SH-1 (arch/sh/src/sh1)
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(2) Hitachi/Renesas SH-1 (arch/sh/src/sh1)
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@ -882,19 +882,6 @@ o ARM/STM32 (arch/arm/src/stm32/)
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o AVR (arch/avr)
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o AVR (arch/avr)
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^^^^^^^^^^^^^^
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^^^^^^^^^^^^^^
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Description: The serial console for the Micropendous3 AT90USB is configured for
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38400 BAUD. However, I get serial output at more or less exactly 4800
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BAUD (/8 less). From what I can see the setup looks correct but I don't
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have a compatible AVR emulator to check things out in detail. I am
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thinking that there is some fuse setting that divides the input clock
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by 8??? but that is just a fantasy.
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Update: No, something else is wrong; the Teensy AT90USB behaves in
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exactly the same way.
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Status: Open
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Priority: Low. Setting the terminal BAUD to 4800 solves the issues. However,
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I suspect that this means that there are other lurking timing issues
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as well.
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Description: There is a port for the Amber Web Server ATMega128, however this is
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Description: There is a port for the Amber Web Server ATMega128, however this is
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completely untested due to the lack to compatible, functional test
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completely untested due to the lack to compatible, functional test
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equipment.
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equipment.
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@ -54,6 +54,10 @@ ifeq ($(CONFIG_ARCH_STACKDUMP),y)
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CMN_CSRCS += up_dumpstate.c
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CMN_CSRCS += up_dumpstate.c
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endif
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endif
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ifeq ($(CONFIG_AVR_SPI),y)
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CMN_CSRCS += up_spi.c
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endif
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# Required AT90USB files
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# Required AT90USB files
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CHIP_ASRCS = at90usb_exceptions.S
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CHIP_ASRCS = at90usb_exceptions.S
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@ -39,6 +39,7 @@
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#include <nuttx/config.h>
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#include <nuttx/config.h>
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#include <avr/wdt.h>
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#include <avr/wdt.h>
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#include <avr/power.h>
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#include "at90usb_config.h"
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#include "at90usb_config.h"
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#include "up_internal.h"
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#include "up_internal.h"
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@ -127,6 +128,10 @@ void up_lowinit(void)
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up_wdtinit();
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up_wdtinit();
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/* Set the system clock divider to 1 */
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clock_prescale_set(clock_div_1);
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/* Initialize a console (probably a serial console) */
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/* Initialize a console (probably a serial console) */
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up_consoleinit();
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up_consoleinit();
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@ -46,12 +46,6 @@
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* Pre-processor Definitions
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* Pre-processor Definitions
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************************************************************************************/
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************************************************************************************/
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/* Physical memory map */
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# warning "Missing Definitions"
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/* Peripheral Address Map */
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# warning "Missing Definitions"
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/************************************************************************************
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/************************************************************************************
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* Public Types
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* Public Types
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************************************************************************************/
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************************************************************************************/
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@ -48,7 +48,7 @@
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/* Define features for supported chip in the ATMEGA family */
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/* Define features for supported chip in the ATMEGA family */
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#if 0
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#if 1
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#else
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#else
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# error "Unsupported AVR chip"
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# error "Unsupported AVR chip"
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#endif
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#endif
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@ -54,6 +54,10 @@ ifeq ($(CONFIG_ARCH_STACKDUMP),y)
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CMN_CSRCS += up_dumpstate.c
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CMN_CSRCS += up_dumpstate.c
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endif
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endif
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ifeq ($(CONFIG_AVR_SPI),y)
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CMN_CSRCS += up_spi.c
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endif
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# Required ATMEGA files
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# Required ATMEGA files
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CHIP_ASRCS = atmega_exceptions.S
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CHIP_ASRCS = atmega_exceptions.S
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@ -39,6 +39,7 @@
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#include <nuttx/config.h>
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#include <nuttx/config.h>
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#include <avr/wdt.h>
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#include <avr/wdt.h>
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#include <avr/power.h>
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#include "atmega_config.h"
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#include "atmega_config.h"
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#include "up_internal.h"
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#include "up_internal.h"
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@ -127,6 +128,10 @@ void up_lowinit(void)
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up_wdtinit();
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up_wdtinit();
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/* Set the system clock divider to 1 */
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clock_prescale_set(clock_div_1);
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/* Initialize a console (probably a serial console) */
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/* Initialize a console (probably a serial console) */
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up_consoleinit();
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up_consoleinit();
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@ -46,12 +46,6 @@
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* Pre-processor Definitions
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* Pre-processor Definitions
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************************************************************************************/
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************************************************************************************/
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/* Physical memory map */
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# warning "Missing Definitions"
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/* Peripheral Address Map */
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# warning "Missing Definitions"
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/************************************************************************************
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/************************************************************************************
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* Public Types
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* Public Types
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************************************************************************************/
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************************************************************************************/
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@ -48,7 +48,7 @@
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/* Define features for supported chip in the ATMEGA family */
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/* Define features for supported chip in the ATMEGA family */
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#if 0
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#if 1
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#else
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#else
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# error "Unsupported AVR chip"
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# error "Unsupported AVR chip"
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#endif
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#endif
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@ -42,6 +42,7 @@
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#ifndef __ASSEMBLY__
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#ifndef __ASSEMBLY__
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# include <stdint.h>
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# include <stdint.h>
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# include <stdbool.h>
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#endif
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#endif
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/****************************************************************************
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/****************************************************************************
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@ -90,12 +91,96 @@ extern uint16_t g_heapbase;
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#ifndef __ASSEMBLY__
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#ifndef __ASSEMBLY__
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/************************************************************************************
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* Name: up_copystate
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*
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* Description:
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* Copy the contents of a register state save structure from one location to
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* another.
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*
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************************************************************************************/
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extern void up_copystate(uint8_t *dest, uint8_t *src);
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extern void up_copystate(uint8_t *dest, uint8_t *src);
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/************************************************************************************
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* Name: up_saveusercontext
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*
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* Description:
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* Save the register context of the currently executing (user) thread.
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*
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************************************************************************************/
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extern int up_saveusercontext(uint8_t *saveregs);
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extern int up_saveusercontext(uint8_t *saveregs);
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/************************************************************************************
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* Name: up_fullcontextrestore
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*
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* Description:
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* Restore the full context of a saved thread/task.
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*
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************************************************************************************/
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extern void up_fullcontextrestore(uint8_t *restoreregs) __attribute__ ((noreturn));
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extern void up_fullcontextrestore(uint8_t *restoreregs) __attribute__ ((noreturn));
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/************************************************************************************
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* Name: up_switchcontext
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*
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* Description:
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* Switch from one thread/task context to another.
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*
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************************************************************************************/
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extern void up_switchcontext(uint8_t *saveregs, uint8_t *restoreregs);
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extern void up_switchcontext(uint8_t *saveregs, uint8_t *restoreregs);
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/************************************************************************************
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* Name: up_doirq
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*
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* Description:
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* Dispatch an interrupt.
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*
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************************************************************************************/
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extern uint8_t *up_doirq(uint8_t irq, uint8_t *regs);
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extern uint8_t *up_doirq(uint8_t irq, uint8_t *regs);
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/************************************************************************************
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* Name: avr_spiselect, avr_spitatus, and avr_spicmddata
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*
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* Description:
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* These external functions must be provided by board-specific logic. They are
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* implementations of the select, status, and cmddata methods of the SPI interface
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* defined by struct spi_ops_s (see include/nuttx/spi.h). All other methods
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* including up_spiinitialize()) are provided by common LPC17xx logic. To use
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* this common SPI logic on your board:
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*
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* 1. Provide logic in up_boardinitialize() to configure SPI chip select
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* pins.
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* 2. Provide avr_spiselect() and avr_spistatus() functions in your board-specific
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* logic. These functions will perform chip selection and status operations
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* using GPIOs in the way your board is configured.
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* 2. If CONFIG_SPI_CMDDATA is defined in the NuttX configuration, provide the
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* avr_spicmddata() function in your board-specific logic. This functions will
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* perform cmd/data selection operations using GPIOs in the way your board is
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* configured.
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* 3. Add a call to up_spiinitialize() in your low level application
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* initialization logic
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* 4. The handle returned by up_spiinitialize() may then be used to bind the
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* SPI driver to higher level logic (e.g., calling
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* mmcsd_spislotinitialize(), for example, will bind the SPI driver to
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* the SPI MMC/SD driver).
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*
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************************************************************************************/
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struct spi_dev_s;
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enum spi_dev_e;
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#ifdef CONFIG_AVR_SPI
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extern void avr_spiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
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extern uint8_t avr_spistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
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#ifdef CONFIG_SPI_CMDDATA
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extern int avr_spicmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
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#endif
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#endif
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#endif /* __ASSEMBLY__ */
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#endif /* __ASSEMBLY__ */
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#endif /* __ARCH_AVR_SRC_AVR_AVR_INTERNAL_H */
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#endif /* __ARCH_AVR_SRC_AVR_AVR_INTERNAL_H */
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@ -0,0 +1,537 @@
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/****************************************************************************
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* arch/arm/src/avr/up_spi.c
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*
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* Copyright (C) 2011 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <sys/types.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include <semaphore.h>
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#include <errno.h>
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#include <debug.h>
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#include <arch/board/board.h>
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#include <nuttx/arch.h>
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#include <nuttx/spi.h>
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#include <avr/io.h>
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#include <avr/power.h>
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#include "up_internal.h"
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#include "up_arch.h"
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#include "chip.h"
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#include "avr_internal.h"
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#ifdef CONFIG_AVR_SPI
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/****************************************************************************
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* Definitions
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****************************************************************************/
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/* Enables debug output from this file (needs CONFIG_DEBUG too) */
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#undef SPI_DEBUG /* Define to enable debug */
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#undef SPI_VERBOSE /* Define to enable verbose debug */
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#ifdef SPI_DEBUG
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# define spidbg lldbg
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# ifdef SPI_VERBOSE
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# define spivdbg lldbg
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# else
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# define spivdbg(x...)
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# endif
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#else
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# undef SPI_VERBOSE
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# define spidbg(x...)
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# define spivdbg(x...)
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#endif
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/****************************************************************************
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* Private Types
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****************************************************************************/
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struct avr_spidev_s
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{
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struct spi_dev_s spidev; /* Externally visible part of the SPI interface */
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#ifndef CONFIG_SPI_OWNBUS
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sem_t exclsem; /* Held while chip is selected for mutual exclusion */
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uint32_t frequency; /* Requested clock frequency */
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uint32_t actual; /* Actual clock frequency */
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uint8_t mode; /* Mode 0,1,2,3 */
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#endif
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};
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/****************************************************************************
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* Private Function Prototypes
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****************************************************************************/
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/* SPI methods */
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#ifndef CONFIG_SPI_OWNBUS
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static int spi_lock(FAR struct spi_dev_s *dev, bool lock);
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#endif
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static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency);
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static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode);
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static void spi_setbits(FAR struct spi_dev_s *dev, int nbits);
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static uint16_t spi_send(FAR struct spi_dev_s *dev, uint16_t ch);
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static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, size_t nwords);
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static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, size_t nwords);
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/****************************************************************************
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* Private Data
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
static const struct spi_ops_s g_spiops =
|
||||||
|
{
|
||||||
|
#ifndef CONFIG_SPI_OWNBUS
|
||||||
|
.lock = spi_lock,
|
||||||
|
#endif
|
||||||
|
.select = avr_spiselect,
|
||||||
|
.setfrequency = spi_setfrequency,
|
||||||
|
.setmode = spi_setmode,
|
||||||
|
.setbits = spi_setbits,
|
||||||
|
.status = avr_spistatus,
|
||||||
|
#ifdef CONFIG_SPI_CMDDATA
|
||||||
|
.cmddata = avr_spicmddata,
|
||||||
|
#endif
|
||||||
|
.send = spi_send,
|
||||||
|
.sndblock = spi_sndblock,
|
||||||
|
.recvblock = spi_recvblock,
|
||||||
|
.registercallback = 0, /* Not implemented */
|
||||||
|
};
|
||||||
|
|
||||||
|
static struct avr_spidev_s g_spidev =
|
||||||
|
{
|
||||||
|
.spidev = { &g_spiops },
|
||||||
|
};
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Public Data
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Private Functions
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Name: spi_lock
|
||||||
|
*
|
||||||
|
* Description:
|
||||||
|
* On SPI busses where there are multiple devices, it will be necessary to
|
||||||
|
* lock SPI to have exclusive access to the busses for a sequence of
|
||||||
|
* transfers. The bus should be locked before the chip is selected. After
|
||||||
|
* locking the SPI bus, the caller should then also call the setfrequency,
|
||||||
|
* setbits, and setmode methods to make sure that the SPI is properly
|
||||||
|
* configured for the device. If the SPI buss is being shared, then it
|
||||||
|
* may have been left in an incompatible state.
|
||||||
|
*
|
||||||
|
* Input Parameters:
|
||||||
|
* dev - Device-specific state data
|
||||||
|
* lock - true: Lock spi bus, false: unlock SPI bus
|
||||||
|
*
|
||||||
|
* Returned Value:
|
||||||
|
* None
|
||||||
|
*
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
#ifndef CONFIG_SPI_OWNBUS
|
||||||
|
static int spi_lock(FAR struct spi_dev_s *dev, bool lock)
|
||||||
|
{
|
||||||
|
FAR struct avr_spidev_s *priv = (FAR struct avr_spidev_s *)dev;
|
||||||
|
|
||||||
|
if (lock)
|
||||||
|
{
|
||||||
|
/* Take the semaphore (perhaps waiting) */
|
||||||
|
|
||||||
|
while (sem_wait(&priv->exclsem) != 0)
|
||||||
|
{
|
||||||
|
/* The only case that an error should occur here is if the wait was awakened
|
||||||
|
* by a signal.
|
||||||
|
*/
|
||||||
|
|
||||||
|
ASSERT(errno == EINTR);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
(void)sem_post(&priv->exclsem);
|
||||||
|
}
|
||||||
|
return OK;
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Name: spi_setfrequency
|
||||||
|
*
|
||||||
|
* Description:
|
||||||
|
* Set the SPI frequency.
|
||||||
|
*
|
||||||
|
* Input Parameters:
|
||||||
|
* dev - Device-specific state data
|
||||||
|
* frequency - The SPI frequency requested
|
||||||
|
*
|
||||||
|
* Returned Value:
|
||||||
|
* Returns the actual frequency selected
|
||||||
|
*
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
|
||||||
|
{
|
||||||
|
uint32_t actual;
|
||||||
|
#ifndef CONFIG_SPI_OWNBUS
|
||||||
|
FAR struct avr_spidev_s *priv = (FAR struct avr_spidev_s *)dev;
|
||||||
|
|
||||||
|
/* Has the request frequency changed? */
|
||||||
|
|
||||||
|
if (frequency != priv->frequency)
|
||||||
|
{
|
||||||
|
#endif
|
||||||
|
/* Read the SPI status and control registers, clearing all divider bits */
|
||||||
|
|
||||||
|
uint8_t spcr = SPCR & ~((1 << SPR0) | (1 << SPR1));
|
||||||
|
uint8_t spsr = SPSR & ~(1 << SPI2X);
|
||||||
|
|
||||||
|
/* Select the best divider bits */
|
||||||
|
|
||||||
|
if (frequency >= BOARD_CPU_CLOCK / 2)
|
||||||
|
{
|
||||||
|
spsr |= (1 << SPI2X);
|
||||||
|
actual = BOARD_CPU_CLOCK / 2;
|
||||||
|
}
|
||||||
|
else if (frequency >= BOARD_CPU_CLOCK / 4)
|
||||||
|
{
|
||||||
|
actual = BOARD_CPU_CLOCK / 4;
|
||||||
|
}
|
||||||
|
else if (frequency >= BOARD_CPU_CLOCK / 8)
|
||||||
|
{
|
||||||
|
spcr |= (1 << SPR0);
|
||||||
|
spsr |= (1 << SPI2X);
|
||||||
|
actual = BOARD_CPU_CLOCK / 8;
|
||||||
|
}
|
||||||
|
else if (frequency >= BOARD_CPU_CLOCK / 16)
|
||||||
|
{
|
||||||
|
spcr |= (1 << SPR0);
|
||||||
|
actual = BOARD_CPU_CLOCK / 16;
|
||||||
|
}
|
||||||
|
else if (frequency >= BOARD_CPU_CLOCK / 32)
|
||||||
|
{
|
||||||
|
spcr |= (1 << SPR1);
|
||||||
|
spsr |= (1 << SPI2X);
|
||||||
|
actual = BOARD_CPU_CLOCK / 32;
|
||||||
|
}
|
||||||
|
else if (frequency >= BOARD_CPU_CLOCK / 64)
|
||||||
|
{
|
||||||
|
spcr |= (1 << SPR1);
|
||||||
|
actual = BOARD_CPU_CLOCK / 64;
|
||||||
|
}
|
||||||
|
else /* if (frequency >= BOARD_CPU_CLOCK / 128) */
|
||||||
|
{
|
||||||
|
spcr |= (1 << SPR0)|(1 << SPR1);
|
||||||
|
actual = BOARD_CPU_CLOCK / 128;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Save the frequency setting */
|
||||||
|
|
||||||
|
#ifndef CONFIG_SPI_OWNBUS
|
||||||
|
priv->frequency = frequency;
|
||||||
|
priv->actual = actual;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
actual = priv->actual;
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
spidbg("Frequency %d->%d\n", frequency, actual);
|
||||||
|
return actual;
|
||||||
|
}
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Name: spi_setmode
|
||||||
|
*
|
||||||
|
* Description:
|
||||||
|
* Set the SPI mode. Optional. See enum spi_mode_e for mode definitions
|
||||||
|
*
|
||||||
|
* Input Parameters:
|
||||||
|
* dev - Device-specific state data
|
||||||
|
* mode - The SPI mode requested
|
||||||
|
*
|
||||||
|
* Returned Value:
|
||||||
|
* none
|
||||||
|
*
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
|
||||||
|
{
|
||||||
|
#ifndef CONFIG_SPI_OWNBUS
|
||||||
|
FAR struct avr_spidev_s *priv = (FAR struct avr_spidev_s *)dev;
|
||||||
|
|
||||||
|
/* Has the mode changed? */
|
||||||
|
|
||||||
|
if (mode != priv->mode)
|
||||||
|
{
|
||||||
|
#endif
|
||||||
|
uint8_t regval;
|
||||||
|
|
||||||
|
/* Yes... Set SPI CR appropriately */
|
||||||
|
|
||||||
|
regval = SPCR;
|
||||||
|
regval &= ~((1 << CPOL) | (1 << CPHA));
|
||||||
|
|
||||||
|
switch (mode)
|
||||||
|
{
|
||||||
|
case SPIDEV_MODE0: /* CPOL=0; CPHA=0 */
|
||||||
|
break;
|
||||||
|
|
||||||
|
case SPIDEV_MODE1: /* CPOL=0; CPHA=1 */
|
||||||
|
regval |= (1 << CPHA);
|
||||||
|
break;
|
||||||
|
|
||||||
|
case SPIDEV_MODE2: /* CPOL=1; CPHA=0 */
|
||||||
|
regval |= (1 << CPOL);
|
||||||
|
break;
|
||||||
|
|
||||||
|
case SPIDEV_MODE3: /* CPOL=1; CPHA=1 */
|
||||||
|
regval |= ((1 << CPOL) | (1 << CPHA));
|
||||||
|
break;
|
||||||
|
|
||||||
|
default:
|
||||||
|
DEBUGASSERT(FALSE);
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
SPSR = regval;
|
||||||
|
|
||||||
|
/* Save the mode so that subsequent re-configuratins will be faster */
|
||||||
|
|
||||||
|
#ifndef CONFIG_SPI_OWNBUS
|
||||||
|
priv->mode = mode;
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Name: spi_setbits
|
||||||
|
*
|
||||||
|
* Description:
|
||||||
|
* Set the number if bits per word.
|
||||||
|
*
|
||||||
|
* Input Parameters:
|
||||||
|
* dev - Device-specific state data
|
||||||
|
* nbits - The number of bits requests (only nbits == 8 is supported)
|
||||||
|
*
|
||||||
|
* Returned Value:
|
||||||
|
* none
|
||||||
|
*
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
static void spi_setbits(FAR struct spi_dev_s *dev, int nbits)
|
||||||
|
{
|
||||||
|
DEBUGASSERT(dev && nbits == 8);
|
||||||
|
}
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Name: spi_send
|
||||||
|
*
|
||||||
|
* Description:
|
||||||
|
* Exchange one word on SPI
|
||||||
|
*
|
||||||
|
* Input Parameters:
|
||||||
|
* dev - Device-specific state data
|
||||||
|
* wd - The word to send. the size of the data is determined by the
|
||||||
|
* number of bits selected for the SPI interface.
|
||||||
|
*
|
||||||
|
* Returned Value:
|
||||||
|
* response
|
||||||
|
*
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
static uint16_t spi_send(FAR struct spi_dev_s *dev, uint16_t wd)
|
||||||
|
{
|
||||||
|
/* Write the data to transmitted to the SPI Data Register */
|
||||||
|
|
||||||
|
SPDR = (uint8_t)wd;
|
||||||
|
|
||||||
|
/* Wait for transmission to complete */
|
||||||
|
|
||||||
|
while (!(SPSR & (1<<SPIF)));
|
||||||
|
|
||||||
|
/* Then return the received value */
|
||||||
|
|
||||||
|
return (uint16_t)SPDR;
|
||||||
|
}
|
||||||
|
|
||||||
|
/*************************************************************************
|
||||||
|
* Name: spi_sndblock
|
||||||
|
*
|
||||||
|
* Description:
|
||||||
|
* Send a block of data on SPI
|
||||||
|
*
|
||||||
|
* Input Parameters:
|
||||||
|
* dev - Device-specific state data
|
||||||
|
* buffer - A pointer to the buffer of data to be sent
|
||||||
|
* nwords - the length of data to send from the buffer in number of words.
|
||||||
|
* The wordsize is determined by the number of bits-per-word
|
||||||
|
* selected for the SPI interface. If nbits <= 8, the data is
|
||||||
|
* packed into uint8_t's; if nbits >8, the data is packed into
|
||||||
|
* uint16_t's
|
||||||
|
*
|
||||||
|
* Returned Value:
|
||||||
|
* None
|
||||||
|
*
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, size_t nwords)
|
||||||
|
{
|
||||||
|
FAR uint8_t *ptr = (FAR uint8_t*)buffer;
|
||||||
|
|
||||||
|
spidbg("nwords: %d\n", nwords);
|
||||||
|
while (nwords-- > 0)
|
||||||
|
{
|
||||||
|
(void)spi_send(dev, (uint16_t)*ptr++);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Name: spi_recvblock
|
||||||
|
*
|
||||||
|
* Description:
|
||||||
|
* Revice a block of data from SPI
|
||||||
|
*
|
||||||
|
* Input Parameters:
|
||||||
|
* dev - Device-specific state data
|
||||||
|
* buffer - A pointer to the buffer in which to recieve data
|
||||||
|
* nwords - the length of data that can be received in the buffer in number
|
||||||
|
* of words. The wordsize is determined by the number of bits-
|
||||||
|
* per-wordselected for the SPI interface. If nbits <= 8, the
|
||||||
|
* data is packed into uint8_t's; if nbits >8, the data is packed
|
||||||
|
* into uint16_t's
|
||||||
|
*
|
||||||
|
* Returned Value:
|
||||||
|
* None
|
||||||
|
*
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, size_t nwords)
|
||||||
|
{
|
||||||
|
FAR uint8_t *ptr = (FAR uint8_t*)buffer;
|
||||||
|
|
||||||
|
spidbg("nwords: %d\n", nwords);
|
||||||
|
while (nwords-- > 0)
|
||||||
|
{
|
||||||
|
*ptr++ = spi_send(dev, (uint16_t)0xff);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Public Functions
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Name: up_spiinitialize
|
||||||
|
*
|
||||||
|
* Description:
|
||||||
|
* Initialize the selected SPI port
|
||||||
|
*
|
||||||
|
* Input Parameter:
|
||||||
|
* Port number (for hardware that has mutiple SPI interfaces)
|
||||||
|
*
|
||||||
|
* Returned Value:
|
||||||
|
* Valid SPI device structure reference on succcess; a NULL on failure
|
||||||
|
*
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
FAR struct spi_dev_s *up_spiinitialize(int port)
|
||||||
|
{
|
||||||
|
FAR struct avr_spidev_s *priv = &g_spidev;
|
||||||
|
irqstate_t flags;
|
||||||
|
uint8_t regval;
|
||||||
|
|
||||||
|
/* Make sure that clocks are provided to the SPI module */
|
||||||
|
|
||||||
|
flags = irqsave();
|
||||||
|
power_spi_enable();
|
||||||
|
|
||||||
|
/* Set MOSI and SCK as outputs, all others are inputs (default on reset):
|
||||||
|
*
|
||||||
|
* PB3: PDO/MISO/PCINT3
|
||||||
|
* PB2: PDI/MOSI/PCINT2
|
||||||
|
* PB1: SCK/PCINT1
|
||||||
|
* PB0: SS/PCINT0
|
||||||
|
*/
|
||||||
|
|
||||||
|
DDRB |= (1 << 2) | (1 << 1);
|
||||||
|
|
||||||
|
/* - Enable SPI
|
||||||
|
* - Set Master
|
||||||
|
* - Set clock rate oscillator/4
|
||||||
|
* - Set CPOL for SPI clock mode 0
|
||||||
|
*/
|
||||||
|
|
||||||
|
SPCR = (1 << SPE) | (1 << MSTR);
|
||||||
|
|
||||||
|
/* Set clock rate to f(osc)/8 */
|
||||||
|
/* SPSR |= (1 << 0); */
|
||||||
|
|
||||||
|
/* Clear status flags by reading them */
|
||||||
|
|
||||||
|
regval = SPSR;
|
||||||
|
regval = SPDR;
|
||||||
|
|
||||||
|
/* Set the initial SPI configuration */
|
||||||
|
|
||||||
|
#ifndef CONFIG_SPI_OWNBUS
|
||||||
|
priv->frequency = 0;
|
||||||
|
priv->mode = SPIDEV_MODE0;
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Select a default frequency of approx. 400KHz */
|
||||||
|
|
||||||
|
spi_setfrequency((FAR struct spi_dev_s *)priv, 400000);
|
||||||
|
|
||||||
|
/* Initialize the SPI semaphore that enforces mutually exclusive access */
|
||||||
|
|
||||||
|
#ifndef CONFIG_SPI_OWNBUS
|
||||||
|
sem_init(&priv->exclsem, 0, 1);
|
||||||
|
#endif
|
||||||
|
return &priv->spidev;
|
||||||
|
}
|
||||||
|
#endif /* CONFIG_AVR_SPI */
|
||||||
|
|
|
@ -90,10 +90,55 @@ extern uint32_t g_heapbase;
|
||||||
|
|
||||||
#ifndef __ASSEMBLY__
|
#ifndef __ASSEMBLY__
|
||||||
|
|
||||||
|
/************************************************************************************
|
||||||
|
* Name: up_copystate
|
||||||
|
*
|
||||||
|
* Description:
|
||||||
|
* Copy the contents of a register state save structure from one location to
|
||||||
|
* another.
|
||||||
|
*
|
||||||
|
************************************************************************************/
|
||||||
|
|
||||||
extern void up_copystate(uint32_t *dest, uint32_t *src);
|
extern void up_copystate(uint32_t *dest, uint32_t *src);
|
||||||
|
|
||||||
|
/************************************************************************************
|
||||||
|
* Name: up_saveusercontext
|
||||||
|
*
|
||||||
|
* Description:
|
||||||
|
* Save the register context of the currently executing (user) thread.
|
||||||
|
*
|
||||||
|
************************************************************************************/
|
||||||
|
|
||||||
extern int up_saveusercontext(uint32_t *saveregs);
|
extern int up_saveusercontext(uint32_t *saveregs);
|
||||||
|
|
||||||
|
/************************************************************************************
|
||||||
|
* Name: up_fullcontextrestore
|
||||||
|
*
|
||||||
|
* Description:
|
||||||
|
* Restore the full context of a saved thread/task.
|
||||||
|
*
|
||||||
|
************************************************************************************/
|
||||||
|
|
||||||
extern void up_fullcontextrestore(uint32_t *restoreregs) __attribute__ ((noreturn));
|
extern void up_fullcontextrestore(uint32_t *restoreregs) __attribute__ ((noreturn));
|
||||||
|
|
||||||
|
/************************************************************************************
|
||||||
|
* Name: up_switchcontext
|
||||||
|
*
|
||||||
|
* Description:
|
||||||
|
* Switch from one thread/task context to another.
|
||||||
|
*
|
||||||
|
************************************************************************************/
|
||||||
|
|
||||||
extern void up_switchcontext(uint32_t *saveregs, uint32_t *restoreregs);
|
extern void up_switchcontext(uint32_t *saveregs, uint32_t *restoreregs);
|
||||||
|
|
||||||
|
/************************************************************************************
|
||||||
|
* Name: up_doirq
|
||||||
|
*
|
||||||
|
* Description:
|
||||||
|
* Dispatch an interrupt.
|
||||||
|
*
|
||||||
|
************************************************************************************/
|
||||||
|
|
||||||
extern uint32_t *up_doirq(int irq, uint32_t *regs);
|
extern uint32_t *up_doirq(int irq, uint32_t *regs);
|
||||||
|
|
||||||
#endif /* __ASSEMBLY__ */
|
#endif /* __ASSEMBLY__ */
|
||||||
|
|
|
@ -69,6 +69,15 @@
|
||||||
# define CONFIG_PRINT_TASKNAME 1
|
# define CONFIG_PRINT_TASKNAME 1
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
/* If there is going to be stackdump output, then we should turn on output
|
||||||
|
* here unconditionally as well.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifdef CONFIG_ARCH_STACKDUMP
|
||||||
|
# undef lldbg
|
||||||
|
# define lldbg lib_lowprintf
|
||||||
|
#endif
|
||||||
|
|
||||||
/****************************************************************************
|
/****************************************************************************
|
||||||
* Private Data
|
* Private Data
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
|
@ -49,8 +49,10 @@
|
||||||
/* Configuration ************************************************************/
|
/* Configuration ************************************************************/
|
||||||
|
|
||||||
/* Clocking *****************************************************************/
|
/* Clocking *****************************************************************/
|
||||||
|
/* Assume default CLKDIV8 fuse setting is overridden to CLKDIV1 */
|
||||||
|
|
||||||
#define BOARD_CPU_CLOCK 14745600 /* F_CPU = 14.7456MHz */
|
#define BOARD_XTAL_FREQ 14745600 /* 14.7456MHz crystal */
|
||||||
|
#define BOARD_CPU_CLOCK BOARD_XTAL_FREQ /* F_CPU = 14.7456MHz */
|
||||||
#define BOARD_TOSCK_CLOCK 32768 /* TOSC = 32.768KHz */
|
#define BOARD_TOSCK_CLOCK 32768 /* TOSC = 32.768KHz */
|
||||||
|
|
||||||
/* LED definitions **********************************************************/
|
/* LED definitions **********************************************************/
|
||||||
|
|
|
@ -49,8 +49,10 @@
|
||||||
/* Configuration ************************************************************/
|
/* Configuration ************************************************************/
|
||||||
|
|
||||||
/* Clocking *****************************************************************/
|
/* Clocking *****************************************************************/
|
||||||
|
/* Assume default CLKDIV8 fuse setting is overridden to CLKDIV1 */
|
||||||
|
|
||||||
#define BOARD_CPU_CLOCK 16000000 /* F_CPU = 16MHz */
|
#define BOARD_XTAL_FREQ 16000000 /* 16MHz crystal */
|
||||||
|
#define BOARD_CPU_CLOCK BOARD_XTAL_FREQ /* F_CPU = 16MHz */
|
||||||
|
|
||||||
/* LED definitions **********************************************************/
|
/* LED definitions **********************************************************/
|
||||||
/* The Micropendous 3 has no on-board LEDs */
|
/* The Micropendous 3 has no on-board LEDs */
|
||||||
|
|
|
@ -49,8 +49,10 @@
|
||||||
/* Configuration ************************************************************/
|
/* Configuration ************************************************************/
|
||||||
|
|
||||||
/* Clocking *****************************************************************/
|
/* Clocking *****************************************************************/
|
||||||
|
/* Assume default CLKDIV8 fuse setting is overridden to CLKDIV1 */
|
||||||
|
|
||||||
#define BOARD_CPU_CLOCK 16000000 /* F_CPU = 16MHz */
|
#define BOARD_XTAL_FREQ 16000000 /* 16MHz crystal */
|
||||||
|
#define BOARD_CPU_CLOCK BOARD_XTAL_FREQ /* F_CPU = 16MHz */
|
||||||
|
|
||||||
/* LED definitions **********************************************************/
|
/* LED definitions **********************************************************/
|
||||||
/* The Teensy++ 2.0 has a single on-board LEDs connected to PortD, Pin 6 */
|
/* The Teensy++ 2.0 has a single on-board LEDs connected to PortD, Pin 6 */
|
||||||
|
|
|
@ -792,7 +792,7 @@ CONFIG_BOOT_COPYTORAM=n
|
||||||
CONFIG_CUSTOM_STACK=n
|
CONFIG_CUSTOM_STACK=n
|
||||||
CONFIG_STACK_POINTER=
|
CONFIG_STACK_POINTER=
|
||||||
CONFIG_IDLETHREAD_STACKSIZE=512
|
CONFIG_IDLETHREAD_STACKSIZE=512
|
||||||
CONFIG_USERMAIN_STACKSIZE=512
|
CONFIG_USERMAIN_STACKSIZE=1024
|
||||||
CONFIG_PTHREAD_STACK_MIN=256
|
CONFIG_PTHREAD_STACK_MIN=256
|
||||||
CONFIG_PTHREAD_STACK_DEFAULT=512
|
CONFIG_PTHREAD_STACK_DEFAULT=512
|
||||||
CONFIG_HEAP_BASE=
|
CONFIG_HEAP_BASE=
|
||||||
|
|
|
@ -204,7 +204,7 @@ void mm_givesemaphore(void)
|
||||||
|
|
||||||
/* I better be holding at least one reference to the semaphore */
|
/* I better be holding at least one reference to the semaphore */
|
||||||
|
|
||||||
ASSERT(g_holder == my_pid);
|
DEBUGASSERT(g_holder == my_pid);
|
||||||
|
|
||||||
/* Do I hold multiple references to the semphore */
|
/* Do I hold multiple references to the semphore */
|
||||||
|
|
||||||
|
|
Loading…
Reference in New Issue