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Add support for SPI NOR chip select 

git-svn-id: https://nuttx.svn.sourceforge.net/svnroot/nuttx/trunk@2938 7fd9a85b-ad96-42d3-883c-3090e2eb8679
This commit is contained in:
patacongo 2010-09-11 02:53:07 +00:00
parent 2794f1b7f8
commit c3a53b2dc9
3 changed files with 86 additions and 47 deletions
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112
nuttx/arch/arm/src/lpc313x/lpc313x_internal.h
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@ -1,7 +1,7 @@
/************************************************************************************
* arch/arm/src/lpc313x/lpc313x_internal.h
*
* Copyright (C) 2009 Gregory Nutt. All rights reserved.
* Copyright (C) 2009-2010 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
@ -47,7 +47,9 @@
#include <stdbool.h>
#include "up_internal.h"
#include "up_arch.h"
#include "chip.h"
#include "lpc313x_ioconfig.h"
/************************************************************************************
* Definitions
@ -79,6 +81,70 @@ extern "C" {
#define EXTERN extern
#endif
/************************************************************************************
* Inline Functions
************************************************************************************/
/* Configure a pin as an input */
static inline void gpio_configinput(uint32_t ioconfig, uint32_t bit)
{
uint32_t regaddr;
regaddr = ioconfig + LPC313X_IOCONFIG_MODE0RESET_OFFSET;
putreg32(bit, regaddr);
regaddr = ioconfig + LPC313X_IOCONFIG_MODE1RESET_OFFSET;
putreg32(bit, regaddr);
}
/* Return the current state of an input GPIO pin */
static inline bool lpc313x_gpioread(uint32_t ioconfig, uint32_t bit)
{
uint32_t regaddr = ioconfig + LPC313X_IOCONFIG_PINS_OFFSET;
return (getreg32(regaddr) & bit) != 0;
}
/* Configure the pin so that it is driven by the device */
static inline void gpio_configdev(uint32_t ioconfig, uint32_t bit)
{
uint32_t regaddr;
regaddr = ioconfig + LPC313X_IOCONFIG_MODE1RESET_OFFSET;
putreg32(bit, regaddr);
regaddr = ioconfig + LPC313X_IOCONFIG_MODE0SET_OFFSET;
putreg32(bit, regaddr);
}
/* Configure a pin as a low output */
static inline void gpio_outputlow(uint32_t ioconfig, uint32_t bit)
{
uint32_t regaddr;
regaddr = ioconfig + LPC313X_IOCONFIG_MODE1SET_OFFSET;
putreg32(bit, regaddr);
regaddr = ioconfig + LPC313X_IOCONFIG_MODE0RESET_OFFSET;
putreg32(bit, regaddr);
}
/* Configure a pin as a high output */
static inline void gpio_outputhigh(uint32_t ioconfig, uint32_t bit)
{
uint32_t regaddr;
regaddr = ioconfig + LPC313X_IOCONFIG_MODE1SET_OFFSET;
putreg32(bit, regaddr);
regaddr = ioconfig + LPC313X_IOCONFIG_MODE0SET_OFFSET;
putreg32(bit, regaddr);
}
/************************************************************************************
* Public Function Prototypes
************************************************************************************/
@ -103,50 +169,6 @@ EXTERN void lpc313x_lowsetup(void);
EXTERN void lpc313x_clockconfig(void);
/************************************************************************************
* Name: lpc313x_configgpio
*
* Description:
* Configure a GPIO pin based on bit-encoded description of the pin.
*
************************************************************************************/
EXTERN int lpc313x_configgpio(uint32_t cfgset);
/************************************************************************************
* Name: lpc313x_gpiowrite
*
* Description:
* Write one or zero to the selected GPIO pin
*
************************************************************************************/
EXTERN void lpc313x_gpiowrite(uint32_t pinset, bool value);
/************************************************************************************
* Name: lpc313x_gpioread
*
* Description:
* Read one or zero from the selected GPIO pin
*
************************************************************************************/
EXTERN bool lpc313x_gpioread(uint32_t pinset);
/************************************************************************************
* Function: lpc313x_dumpgpio
*
* Description:
* Dump all GPIO registers associated with the provided base address
*
************************************************************************************/
#ifdef CONFIG_DEBUG
EXTERN int lpc313x_dumpgpio(uint32_t pinset, const char *msg);
#else
# define lpc313x_dumpgpio(p,m)
#endif
/************************************************************************************
* Name: lpc313x_spiselect and lpc313x_spistatus
*

8
nuttx/configs/ea3131/src/ea3131_internal.h
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@ -45,20 +45,24 @@
#include <nuttx/compiler.h>
#include <stdint.h>
#include "lpc313x_ioconfig.h"
/************************************************************************************
* Definitions
************************************************************************************/
/* EA3131L GPIOs ********************************************************************/
/* LEDs */
/* LEDs -- interface through an I2C GPIO expander */
/* BUTTONS -- NOTE that some have EXTI interrupts configured */
/* SPI Chip Selects */
/* SPI NOR flash is the only device on SPI. SPI_CS_OUT0 is its chip select */
/* USB Soft Connect Pullup*/
#define SPINOR_CS IOCONFIG_SPI_CSOUT0
/* USB Soft Connect Pullup -- NONE */
/************************************************************************************
* Public Types

13
nuttx/configs/ea3131/src/up_spi.c
View File

@ -100,6 +100,7 @@ void weak_function lpc313x_spiinitialize(void)
* architecture.
*/
gpio_outputhigh(LPC313X_IOCONFIG_SPI, SPINOR_CS);
}
/****************************************************************************
@ -130,6 +131,18 @@ void weak_function lpc313x_spiinitialize(void)
void lpc313x_spiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
{
spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
if (devid == SPIDEV_FLASH)
{
if (selected)
{
gpio_outputlow(LPC313X_IOCONFIG_SPI, SPINOR_CS);
}
else
{
gpio_outputhigh(LPC313X_IOCONFIG_SPI, SPINOR_CS);
}
}
}
uint8_t lpc313x_spistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid)