From bdf638546df35ade533661b5478b716fb060f771 Mon Sep 17 00:00:00 2001 From: patacongo Date: Mon, 10 Oct 2011 22:40:59 +0000 Subject: [PATCH] PIC32 start kit port builds successfully git-svn-id: https://nuttx.svn.sourceforge.net/svnroot/nuttx/trunk@4037 7fd9a85b-ad96-42d3-883c-3090e2eb8679 --- nuttx/ChangeLog | 7 +- nuttx/arch/mips/include/pic32mx/chip.h | 114 +- nuttx/arch/mips/src/pic32mx/pic32mx-config.h | 1675 ++++++++--------- .../mips/src/pic32mx/pic32mx-lowconsole.c | 15 +- .../configs/pcblogic-pic32mx/include/board.h | 4 +- nuttx/configs/pic32-starterkit/README.txt | 125 +- .../configs/pic32-starterkit/include/board.h | 22 +- .../configs/pic32-starterkit/ostest/defconfig | 4 + nuttx/configs/sure-pic32mx/include/board.h | 4 +- 9 files changed, 1035 insertions(+), 935 deletions(-) diff --git a/nuttx/ChangeLog b/nuttx/ChangeLog index 5c8b5c535..137fd2d9e 100644 --- a/nuttx/ChangeLog +++ b/nuttx/ChangeLog @@ -2150,11 +2150,12 @@ * arch/arm/stm32/Make.defs: Don't build stm32_rtc.c if CONFIG_RTC is not selected. Doing so will cause errors if other configuration dependencies - are not met + are not met. * configs/stm3210e-eval/src/up_lcd.c: Color corrections for SPFD5408B LCD do not work with R61580 LCD. - * configs/pic32-starterkit: Beginning of a configuratin for the Microchip - PIC32 Ethernet Starter Kit. + * configs/pic32-starterkit: Beginning of a configuration for the Microchip + PIC32 Ethernet Starter Kit. Hmmm.. I don't have a clue how to test this + with no serial port?! * lib/stdio/lib_fclose.c: fclose() always returns an error (EOF) when it closes a read-only file. This is because it calls flush() which will fail on read-only files. No harm is done other that a bad value is diff --git a/nuttx/arch/mips/include/pic32mx/chip.h b/nuttx/arch/mips/include/pic32mx/chip.h index f29f10512..34202d183 100644 --- a/nuttx/arch/mips/include/pic32mx/chip.h +++ b/nuttx/arch/mips/include/pic32mx/chip.h @@ -67,7 +67,7 @@ # undef CHIP_TRACE /* No trace capability */ # define CHIP_NUARTS 2 /* 2 UARTS */ -# define CHIP_UARTFIFOD 4 +# define CHIP_UARTFIFOD 8 /* 4 level deep UART FIFOs */ # define CHIP_NSPI 2 /* 2 SPI interfaces */ # define CHIP_NI2C 2 /* 2 I2C interfaces */ # define CHIP_NCAN 0 /* No CAN interface */ @@ -97,7 +97,7 @@ # undef CHIP_TRACE /* No trace capability */ # define CHIP_NUARTS 2 /* 2 UARTS */ -# define CHIP_UARTFIFOD 4 +# define CHIP_UARTFIFOD 8 /* 4 level deep UART FIFOs */ # define CHIP_NSPI 2 /* 2 SPI interfaces */ # define CHIP_NI2C 2 /* 2 I2C interfaces */ # define CHIP_NCAN 0 /* No CAN interface */ @@ -126,8 +126,8 @@ # undef CHIP_VRFSEL /* No comparator voltage reference selection */ # undef CHIP_TRACE /* No trace capability */ -# define CHIP_NUARTS 2 /* 2 UARTS */ -# define CHIP_UARTFIFOD 4 +# define CHIP_NUARTS 2 /* 2 UARTS */ +# define CHIP_UARTFIFOD 8 /* 4 level deep UART FIFOs */ # define CHIP_NSPI 2 /* 2 SPI interfaces */ # define CHIP_NI2C 2 /* 2 I2C interfaces */ # define CHIP_NCAN 0 /* No CAN interface */ @@ -154,10 +154,9 @@ # define CHIP_NDMACH 4 /* 4 programmable DMA channels */ # define CHIP_NUSBDMACHAN 0 # undef CHIP_VRFSEL /* No comparator voltage reference selection */ - # undef CHIP_TRACE /* No trace capability */ -# define CHIP_NUARTS 2 /* 2 UARTS */ -# define CHIP_UARTFIFOD 4 +# define CHIP_NUARTS 2 /* 2 UARTS */ +# define CHIP_UARTFIFOD 8 /* 4 level deep UART FIFOs */ # define CHIP_NSPI 2 /* 2 SPI interfaces */ # define CHIP_NI2C 2 /* 2 I2C interfaces */ # define CHIP_NCAN 0 /* No CAN interface */ @@ -184,10 +183,9 @@ # define CHIP_NDMACH 4 /* 4 programmable DMA channels */ # define CHIP_NUSBDMACHAN 0 # undef CHIP_VRFSEL /* No comparator voltage reference selection */ - # undef CHIP_TRACE /* No trace capability */ -# define CHIP_NUARTS 2 /* 2 UARTS */ -# define CHIP_UARTFIFOD 4 +# define CHIP_NUARTS 2 /* 2 UARTS */ +# define CHIP_UARTFIFOD 8 /* 4 level deep UART FIFOs */ # define CHIP_NSPI 2 /* 2 SPI interfaces */ # define CHIP_NI2C 2 /* 2 I2C interfaces */ # define CHIP_NCAN 0 /* No CAN interface */ @@ -214,10 +212,9 @@ # define CHIP_NDMACH 4 /* 4 programmable DMA channels */ # define CHIP_NUSBDMACHAN 0 # undef CHIP_VRFSEL /* No comparator voltage reference selection */ - # undef CHIP_TRACE /* No trace capability */ -# define CHIP_NUARTS 2 /* 2 UARTS */ -# define CHIP_UARTFIFOD 4 +# define CHIP_NUARTS 2 /* 2 UARTS */ +# define CHIP_UARTFIFOD 8 /* 4 level deep UART FIFOs */ # define CHIP_NSPI 2 /* 2 SPI interfaces */ # define CHIP_NI2C 2 /* 2 I2C interfaces */ # define CHIP_NCAN 0 /* No CAN interface */ @@ -244,10 +241,9 @@ # define CHIP_NDMACH 0 /* No programmable DMA channels */ # define CHIP_NUSBDMACHAN 0 # undef CHIP_VRFSEL /* No comparator voltage reference selection */ - # undef CHIP_TRACE /* No trace capability */ -# define CHIP_NUARTS 2 /* 2 UARTS */ -# define CHIP_UARTFIFOD 4 +# define CHIP_NUARTS 2 /* 2 UARTS */ +# define CHIP_UARTFIFOD 8 /* 4 level deep UART FIFOs */ # define CHIP_NSPI 2 /* 2 SPI interfaces */ # define CHIP_NI2C 2 /* 2 I2C interfaces */ # define CHIP_NCAN 0 /* No CAN interface */ @@ -274,10 +270,9 @@ # define CHIP_NDMACH 4 /* 4 programmable DMA channels */ # define CHIP_NUSBDMACHAN 0 # undef CHIP_VRFSEL /* No comparator voltage reference selection */ - # undef CHIP_TRACE /* No trace capability */ # define CHIP_NUARTS 2 /* 2 UARTS */ -# define CHIP_UARTFIFOD 4 +# define CHIP_UARTFIFOD 8 /* 4 level deep UART FIFOs */ # define CHIP_NSPI 2 /* 2 SPI interfaces */ # define CHIP_NI2C 2 /* 2 I2C interfaces */ # define CHIP_NCAN 0 /* No CAN interface */ @@ -304,10 +299,9 @@ # define CHIP_NDMACH 4 /* 4 programmable DMA channels */ # define CHIP_NUSBDMACHAN 0 # undef CHIP_VRFSEL /* No comparator voltage reference selection */ - # define CHIP_TRACE 1 /* Have trace capability */ # define CHIP_NUARTS 2 /* 2 UARTS */ -# define CHIP_UARTFIFOD 4 +# define CHIP_UARTFIFOD 8 /* 4 level deep UART FIFOs */ # define CHIP_NSPI 2 /* 2 SPI interfaces */ # define CHIP_NI2C 2 /* 2 I2C interfaces */ # define CHIP_NCAN 0 /* No CAN interface */ @@ -334,10 +328,9 @@ # define CHIP_NDMACH 4 /* 4 programmable DMA channels */ # define CHIP_NUSBDMACHAN 0 # undef CHIP_VRFSEL /* No comparator voltage reference selection */ - # define CHIP_TRACE 1 /* Have trace capability */ # define CHIP_NUARTS 2 /* 2 UARTS */ -# define CHIP_UARTFIFOD 4 +# define CHIP_UARTFIFOD 8 /* 4 level deep UART FIFOs */ # define CHIP_NSPI 2 /* 2 SPI interfaces */ # define CHIP_NI2C 2 /* 2 I2C interfaces */ # define CHIP_NCAN 0 /* No CAN interface */ @@ -364,10 +357,9 @@ # define CHIP_NDMACH 0 /* No programmable DMA channels */ # define CHIP_NUSBDMACHAN 2 # undef CHIP_VRFSEL /* No comparator voltage reference selection */ - # undef CHIP_TRACE /* No trace capability */ # define CHIP_NUARTS 2 /* 2 UARTS */ -# define CHIP_UARTFIFOD 4 +# define CHIP_UARTFIFOD 8 /* 4 level deep UART FIFOs */ # define CHIP_NSPI 1 /* 2 SPI interfaces */ # define CHIP_NI2C 2 /* 2 I2C interfaces */ # define CHIP_NCAN 0 /* No CAN interface */ @@ -394,10 +386,9 @@ # define CHIP_NDMACH 4 /* 4 programmable DMA channels */ # define CHIP_NUSBDMACHAN 2 # undef CHIP_VRFSEL /* No comparator voltage reference selection */ - # undef CHIP_TRACE /* No trace capability */ # define CHIP_NUARTS 2 /* 2 UARTS */ -# define CHIP_UARTFIFOD 4 +# define CHIP_UARTFIFOD 8 /* 4 level deep UART FIFOs */ # define CHIP_NSPI 1 /* 2 SPI interfaces */ # define CHIP_NI2C 2 /* 2 I2C interfaces */ # define CHIP_NCAN 0 /* No CAN interface */ @@ -424,10 +415,9 @@ # define CHIP_NDMACH 4 /* 4 programmable DMA channels */ # define CHIP_NUSBDMACHAN 2 # undef CHIP_VRFSEL /* No comparator voltage reference selection */ - # undef CHIP_TRACE /* No trace capability */ # define CHIP_NUARTS 2 /* 2 UARTS */ -# define CHIP_UARTFIFOD 4 +# define CHIP_UARTFIFOD 8 /* 4 level deep UART FIFOs */ # define CHIP_NSPI 1 /* 2 SPI interfaces */ # define CHIP_NI2C 2 /* 2 I2C interfaces */ # define CHIP_NCAN 0 /* No CAN interface */ @@ -454,10 +444,9 @@ # define CHIP_NDMACH 4 /* 4 programmable DMA channels */ # define CHIP_NUSBDMACHAN 2 # undef CHIP_VRFSEL /* No comparator voltage reference selection */ - # undef CHIP_TRACE /* No trace capability */ # define CHIP_NUARTS 2 /* 2 UARTS */ -# define CHIP_UARTFIFOD 4 +# define CHIP_UARTFIFOD 8 /* 4 level deep UART FIFOs */ # define CHIP_NSPI 1 /* 2 SPI interfaces */ # define CHIP_NI2C 2 /* 2 I2C interfaces */ # define CHIP_NCAN 0 /* No CAN interface */ @@ -484,10 +473,9 @@ # define CHIP_NDMACH 4 /* 4 programmable DMA channels */ # define CHIP_NUSBDMACHAN 2 # undef CHIP_VRFSEL /* No comparator voltage reference selection */ - # undef CHIP_TRACE /* No trace capability */ # define CHIP_NUARTS 2 /* 2 UARTS */ -# define CHIP_UARTFIFOD 4 +# define CHIP_UARTFIFOD 8 /* 4 level deep UART FIFOs */ # define CHIP_NSPI 2 /* 2 SPI interfaces */ # define CHIP_NI2C 2 /* 2 I2C interfaces */ # define CHIP_NCAN 0 /* No CAN interface */ @@ -514,10 +502,9 @@ # define CHIP_NDMACH 4 /* 4 programmable DMA channels */ # define CHIP_NUSBDMACHAN 2 # undef CHIP_VRFSEL /* No comparator voltage reference selection */ - # define CHIP_TRACE 1 /* Have trace capability */ # define CHIP_NUARTS 2 /* 2 UARTS */ -# define CHIP_UARTFIFOD 4 +# define CHIP_UARTFIFOD 8 /* 4 level deep UART FIFOs */ # define CHIP_NSPI 2 /* 2 SPI interfaces */ # define CHIP_NI2C 2 /* 2 I2C interfaces */ # define CHIP_NCAN 0 /* No CAN interface */ @@ -544,10 +531,9 @@ # define CHIP_NDMACH 4 /* 4 programmable DMA channels */ # define CHIP_NUSBDMACHAN 2 # undef CHIP_VRFSEL /* No comparator voltage reference selection */ - # define CHIP_TRACE 1 /* Have trace capability */ # define CHIP_NUARTS 2 /* 2 UARTS */ -# define CHIP_UARTFIFOD 4 +# define CHIP_UARTFIFOD 8 /* 4 level deep UART FIFOs */ # define CHIP_NSPI 2 /* 2 SPI interfaces */ # define CHIP_NI2C 2 /* 2 I2C interfaces */ # define CHIP_NCAN 0 /* No CAN interface */ @@ -576,7 +562,7 @@ # define CHIP_VRFSEL 1 /* Have comparator voltage reference selection */ # undef CHIP_TRACE /* No trace capability */ # define CHIP_NUARTS 6 /* 6 UARTS */ -# define CHIP_UARTFIFOD tbd +# define CHIP_UARTFIFOD 8 /* 8 level deep UART FIFOs */ # define CHIP_NSPI 3 /* 3 SPI interfaces */ # define CHIP_NI2C 4 /* 4 I2C interfaces */ # define CHIP_NCAN 1 /* 1 CAN interface */ @@ -605,7 +591,7 @@ # define CHIP_VRFSEL 1 /* Have comparator voltage reference selection */ # undef CHIP_TRACE /* No trace capability */ # define CHIP_NUARTS 6 /* 6 UARTS */ -# define CHIP_UARTFIFOD tbd +# define CHIP_UARTFIFOD 8 /* 8 level deep UART FIFOs */ # define CHIP_NSPI 3 /* 3 SPI interfaces */ # define CHIP_NI2C 4 /* 4 I2C interfaces */ # define CHIP_NCAN 1 /* 1 CAN interface */ @@ -634,7 +620,7 @@ # define CHIP_VRFSEL 1 /* Have comparator voltage reference selection */ # undef CHIP_TRACE /* No trace capability */ # define CHIP_NUARTS 6 /* 6 UARTS */ -# define CHIP_UARTFIFOD tbd +# define CHIP_UARTFIFOD 8 /* 8 level deep UART FIFOs */ # define CHIP_NSPI 3 /* 3 SPI interfaces */ # define CHIP_NI2C 4 /* 4 I2C interfaces */ # define CHIP_NCAN 1 /* 1 CAN interface */ @@ -663,7 +649,7 @@ # undef CHIP_VRFSEL /* No comparator voltage reference selection */ # undef CHIP_TRACE /* No trace capability */ # define CHIP_NUARTS 6 /* 6 UARTS */ -# define CHIP_UARTFIFOD tbd +# define CHIP_UARTFIFOD 8 /* 8 level deep UART FIFOs */ # define CHIP_NSPI 3 /* 3 SPI interfaces */ # define CHIP_NI2C 4 /* 4 I2C interfaces */ # define CHIP_NCAN 1 /* 1 CAN interface */ @@ -692,7 +678,7 @@ # undef CHIP_VRFSEL /* No comparator voltage reference selection */ # undef CHIP_TRACE /* No trace capability */ # define CHIP_NUARTS 6 /* 6 UARTS */ -# define CHIP_UARTFIFOD tbd +# define CHIP_UARTFIFOD 8 /* 8 level deep UART FIFOs */ # define CHIP_NSPI 3 /* 3 SPI interfaces */ # define CHIP_NI2C 4 /* 4 I2C interfaces */ # define CHIP_NCAN 1 /* 1 CAN interface */ @@ -721,7 +707,7 @@ # define CHIP_VRFSEL 1 /* Have comparator voltage reference selection */ # define CHIP_TRACE 1 /* Have trace capability */ # define CHIP_NUARTS 6 /* 6 UARTS */ -# define CHIP_UARTFIFOD tbd +# define CHIP_UARTFIFOD 8 /* 8 level deep UART FIFOs */ # define CHIP_NSPI 4 /* 4 SPI interfaces */ # define CHIP_NI2C 5 /* 5 I2C interfaces */ # define CHIP_NCAN 1 /* 1 CAN interface */ @@ -750,7 +736,7 @@ # define CHIP_VRFSEL 1 /* Have comparator voltage reference selection */ # define CHIP_TRACE 1 /* Have trace capability */ # define CHIP_NUARTS 6 /* 6 UARTS */ -# define CHIP_UARTFIFOD tbd +# define CHIP_UARTFIFOD 8 /* 8 level deep UART FIFOs */ # define CHIP_NSPI 4 /* 4 SPI interfaces */ # define CHIP_NI2C 5 /* 5 I2C interfaces */ # define CHIP_NCAN 1 /* 1 CAN interface */ @@ -779,7 +765,7 @@ # define CHIP_VRFSEL 1 /* Have comparator voltage reference selection */ # define CHIP_TRACE 1 /* Have trace capability */ # define CHIP_NUARTS 6 /* 6 UARTS */ -# define CHIP_UARTFIFOD tbd +# define CHIP_UARTFIFOD 8 /* 8 level deep UART FIFOs */ # define CHIP_NSPI 4 /* 4 SPI interfaces */ # define CHIP_NI2C 5 /* 5 I2C interfaces */ # define CHIP_NCAN 1 /* 1 CAN interface */ @@ -808,7 +794,7 @@ # undef CHIP_VRFSEL /* No comparator voltage reference selection */ # define CHIP_TRACE 1 /* Have trace capability */ # define CHIP_NUARTS 6 /* 6 UARTS */ -# define CHIP_UARTFIFOD tbd +# define CHIP_UARTFIFOD 8 /* 8 level deep UART FIFOs */ # define CHIP_NSPI 4 /* 4 SPI interfaces */ # define CHIP_NI2C 5 /* 5 I2C interfaces */ # define CHIP_NCAN 1 /* 1 CAN interface */ @@ -837,7 +823,7 @@ # undef CHIP_VRFSEL /* No comparator voltage reference selection */ # define CHIP_TRACE 1 /* Have trace capability */ # define CHIP_NUARTS 6 /* 6 UARTS */ -# define CHIP_UARTFIFOD tbd +# define CHIP_UARTFIFOD 8 /* 8 level deep UART FIFOs */ # define CHIP_NSPI 4 /* 4 SPI interfaces */ # define CHIP_NI2C 5 /* 5 I2C interfaces */ # define CHIP_NCAN 1 /* 1 CAN interface */ @@ -866,7 +852,7 @@ # define CHIP_VRFSEL 1 /* Have comparator voltage reference selection */ # undef CHIP_TRACE /* No trace capability */ # define CHIP_NUARTS 6 /* 6 UARTS */ -# define CHIP_UARTFIFOD tbd +# define CHIP_UARTFIFOD 8 /* 8 level deep UART FIFOs */ # define CHIP_NSPI 3 /* 3 SPI interfaces */ # define CHIP_NI2C 4 /* 4 I2C interfaces */ # define CHIP_NCAN 0 /* No CAN interface */ @@ -895,7 +881,7 @@ # define CHIP_VRFSEL 1 /* Have comparator voltage reference selection */ # undef CHIP_TRACE /* No trace capability */ # define CHIP_NUARTS 6 /* 6 UARTS */ -# define CHIP_UARTFIFOD tbd +# define CHIP_UARTFIFOD 8 /* 8 level deep UART FIFOs */ # define CHIP_NSPI 3 /* 3 SPI interfaces */ # define CHIP_NI2C 4 /* 4 I2C interfaces */ # define CHIP_NCAN 0 /* No CAN interface */ @@ -924,7 +910,7 @@ # undef CHIP_VRFSEL /* No comparator voltage reference selection */ # undef CHIP_TRACE /* No trace capability */ # define CHIP_NUARTS 6 /* 6 UARTS */ -# define CHIP_UARTFIFOD tbd +# define CHIP_UARTFIFOD 8 /* 8 level deep UART FIFOs */ # define CHIP_NSPI 3 /* 3 SPI interfaces */ # define CHIP_NI2C 4 /* 4 I2C interfaces */ # define CHIP_NCAN 0 /* No CAN interface */ @@ -953,7 +939,7 @@ # undef CHIP_VRFSEL /* No comparator voltage reference selection */ # undef CHIP_TRACE /* No trace capability */ # define CHIP_NUARTS 6 /* 6 UARTS */ -# define CHIP_UARTFIFOD tbd +# define CHIP_UARTFIFOD 8 /* 8 level deep UART FIFOs */ # define CHIP_NSPI 3 /* 3 SPI interfaces */ # define CHIP_NI2C 4 /* 4 I2C interfaces */ # define CHIP_NCAN 0 /* No CAN interface */ @@ -982,7 +968,7 @@ # define CHIP_VRFSEL 1 /* Have comparator voltage reference selection */ # undef CHIP_TRACE /* No trace capability */ # define CHIP_NUARTS 6 /* 6 UARTS */ -# define CHIP_UARTFIFOD tbd +# define CHIP_UARTFIFOD 8 /* 8 level deep UART FIFOs */ # define CHIP_NSPI 3 /* 3 SPI interfaces */ # define CHIP_NI2C 4 /* 4 I2C interfaces */ # define CHIP_NCAN 0 /* No CAN interface */ @@ -1011,7 +997,7 @@ # define CHIP_VRFSEL 1 /* Have comparator voltage reference selection */ # define CHIP_TRACE 1 /* Have trace capability */ # define CHIP_NUARTS 6 /* 6 UARTS */ -# define CHIP_UARTFIFOD tbd +# define CHIP_UARTFIFOD 8 /* 8 level deep UART FIFOs */ # define CHIP_NSPI 4 /* 4 SPI interfaces */ # define CHIP_NI2C 5 /* 5 I2C interfaces */ # define CHIP_NCAN 0 /* No CAN interface */ @@ -1040,7 +1026,7 @@ # define CHIP_VRFSEL 1 /* Have comparator voltage reference selection */ # define CHIP_TRACE 1 /* Have trace capability */ # define CHIP_NUARTS 6 /* 6 UARTS */ -# define CHIP_UARTFIFOD tbd +# define CHIP_UARTFIFOD 8 /* 8 level deep UART FIFOs */ # define CHIP_NSPI 4 /* 4 SPI interfaces */ # define CHIP_NI2C 5 /* 5 I2C interfaces */ # define CHIP_NCAN 0 /* No CAN interface */ @@ -1069,7 +1055,7 @@ # undef CHIP_VRFSEL /* No comparator voltage reference selection */ # define CHIP_TRACE 1 /* Have trace capability */ # define CHIP_NUARTS 6 /* 6 UARTS */ -# define CHIP_UARTFIFOD tbd +# define CHIP_UARTFIFOD 8 /* 8 level deep UART FIFOs */ # define CHIP_NSPI 4 /* 4 SPI interfaces */ # define CHIP_NI2C 5 /* 5 I2C interfaces */ # define CHIP_NCAN 0 /* No CAN interface */ @@ -1098,7 +1084,7 @@ # undef CHIP_VRFSEL /* No comparator voltage reference selection */ # define CHIP_TRACE 1 /* Have trace capability */ # define CHIP_NUARTS 6 /* 6 UARTS */ -# define CHIP_UARTFIFOD tbd +# define CHIP_UARTFIFOD 8 /* 8 level deep UART FIFOs */ # define CHIP_NSPI 4 /* 4 SPI interfaces */ # define CHIP_NI2C 5 /* 5 I2C interfaces */ # define CHIP_NCAN 0 /* No CAN interface */ @@ -1127,7 +1113,7 @@ # define CHIP_VRFSEL 1 /* Have comparator voltage reference selection */ # define CHIP_TRACE 1 /* Have trace capability */ # define CHIP_NUARTS 6 /* 6 UARTS */ -# define CHIP_UARTFIFOD tbd +# define CHIP_UARTFIFOD 8 /* 8 level deep UART FIFOs */ # define CHIP_NSPI 4 /* 4 SPI interfaces */ # define CHIP_NI2C 5 /* 5 I2C interfaces */ # define CHIP_NCAN 0 /* No CAN interface */ @@ -1156,7 +1142,7 @@ # define CHIP_VRFSEL 1 /* Have comparator voltage reference selection */ # undef CHIP_TRACE /* No trace capability */ # define CHIP_NUARTS 6 /* 6 UARTS */ -# define CHIP_UARTFIFOD tbd +# define CHIP_UARTFIFOD 8 /* 8 level deep UART FIFOs */ # define CHIP_NSPI 3 /* 3 SPI interfaces */ # define CHIP_NI2C 4 /* 4 I2C interfaces */ # define CHIP_NCAN 1 /* 1 CAN interface */ @@ -1185,7 +1171,7 @@ # undef CHIP_VRFSEL /* No comparator voltage reference selection */ # undef CHIP_TRACE /* No trace capability */ # define CHIP_NUARTS 6 /* 6 UARTS */ -# define CHIP_UARTFIFOD tbd +# define CHIP_UARTFIFOD 8 /* 8 level deep UART FIFOs */ # define CHIP_NSPI 3 /* 3 SPI interfaces */ # define CHIP_NI2C 4 /* 4 I2C interfaces */ # define CHIP_NCAN 2 /* 2 CAN interfaces */ @@ -1214,7 +1200,7 @@ # undef CHIP_VRFSEL /* No comparator voltage reference selection */ # undef CHIP_TRACE /* No trace capability */ # define CHIP_NUARTS 6 /* 6 UARTS */ -# define CHIP_UARTFIFOD tbd +# define CHIP_UARTFIFOD 8 /* 8 level deep UART FIFOs */ # define CHIP_NSPI 3 /* 3 SPI interfaces */ # define CHIP_NI2C 4 /* 4 I2C interfaces */ # define CHIP_NCAN 2 /* 2 CAN interfaces */ @@ -1243,7 +1229,7 @@ # define CHIP_VRFSEL 1 /* Have comparator voltage reference selection */ # undef CHIP_TRACE /* No trace capability */ # define CHIP_NUARTS 6 /* 6 UARTS */ -# define CHIP_UARTFIFOD tbd +# define CHIP_UARTFIFOD 8 /* 8 level deep UART FIFOs */ # define CHIP_NSPI 3 /* 3 SPI interfaces */ # define CHIP_NI2C 4 /* 4 I2C interfaces */ # define CHIP_NCAN 2 /* 2 CAN interfaces */ @@ -1272,7 +1258,7 @@ # define CHIP_VRFSEL 1 /* Have comparator voltage reference selection */ # define CHIP_TRACE 1 /* Have trace capability */ # define CHIP_NUARTS 6 /* 6 UARTS */ -# define CHIP_UARTFIFOD tbd +# define CHIP_UARTFIFOD 8 /* 8 level deep UART FIFOs */ # define CHIP_NSPI 4 /* 4 SPI interfaces */ # define CHIP_NI2C 5 /* 5 I2C interfaces */ # define CHIP_NCAN 1 /* 1 CAN interface */ @@ -1301,7 +1287,7 @@ # undef CHIP_VRFSEL /* No comparator voltage reference selection */ # define CHIP_TRACE 1 /* Have trace capability */ # define CHIP_NUARTS 6 /* 6 UARTS */ -# define CHIP_UARTFIFOD tbd +# define CHIP_UARTFIFOD 8 /* 8 level deep UART FIFOs */ # define CHIP_NSPI 4 /* 4 SPI interfaces */ # define CHIP_NI2C 5 /* 5 I2C interfaces */ # define CHIP_NCAN 2 /* 2 CAN interfaces */ @@ -1330,7 +1316,7 @@ # undef CHIP_VRFSEL /* No comparator voltage reference selection */ # define CHIP_TRACE 1 /* Have trace capability */ # define CHIP_NUARTS 6 /* 6 UARTS */ -# define CHIP_UARTFIFOD tbd +# define CHIP_UARTFIFOD 8 /* 8 level deep UART FIFOs */ # define CHIP_NSPI 4 /* 4 SPI interfaces */ # define CHIP_NI2C 5 /* 5 I2C interfaces */ # define CHIP_NCAN 2 /* 2 CAN interfaces */ @@ -1359,7 +1345,7 @@ # define CHIP_VRFSEL 1 /* Have comparator voltage reference selection */ # define CHIP_TRACE 1 /* Have trace capability */ # define CHIP_NUARTS 6 /* 6 UARTS */ -# define CHIP_UARTFIFOD tbd +# define CHIP_UARTFIFOD 8 /* 8 level deep UART FIFOs */ # define CHIP_NSPI 4 /* 4 SPI interfaces */ # define CHIP_NI2C 5 /* 5 I2C interfaces */ # define CHIP_NCAN 2 /* 2 CAN interfaces */ diff --git a/nuttx/arch/mips/src/pic32mx/pic32mx-config.h b/nuttx/arch/mips/src/pic32mx/pic32mx-config.h index 26b4bdbc7..2eee06ae6 100644 --- a/nuttx/arch/mips/src/pic32mx/pic32mx-config.h +++ b/nuttx/arch/mips/src/pic32mx/pic32mx-config.h @@ -1,838 +1,837 @@ -/************************************************************************************ - * arch/mips/src/pic32mx/pic32mx-config.h - * - * Copyright (C) 2011 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ************************************************************************************/ - -#ifndef __ARCH_MIPS_SRC_PIC32MX_PIC32MX_PIC32_H -#define __ARCH_MIPS_SRC_PIC32MX_PIC32MX_PIC32_H - -/************************************************************************************ - * Included Files - ************************************************************************************/ - -#include -#include - -#include "chip.h" -#include "pic32mx-memorymap.h" -#include "pic32mx-uart.h" -#include "pic32mx-int.h" -#include "pic32mx-devcfg.h" - -/************************************************************************************ - * Pre-processor Definitions - ************************************************************************************/ -/* Interrupt Priorities *************************************************************/ - -#ifndef CONFIG_PIC32MX_CTPRIO /* Core Timer Interrupt */ -# define CONFIG_PIC32MX_CTPRIO (INT_ICP_MID_PRIORITY << 2) -#endif -#if CONFIG_PIC32MX_CTPRIO < 4 -# error "CONFIG_PIC32MX_CTPRIO is too small" -#endif -#if CONFIG_PIC32MX_CTPRIO > 31 -# error "CONFIG_PIC32MX_CTPRIO is too large" -#endif - -#ifndef CONFIG_PIC32MX_CS0PRIO /* Core Software Interrupt 0 */ -# define CONFIG_PIC32MX_CS0PRIO (INT_ICP_MID_PRIORITY << 2) -#endif -#if CONFIG_PIC32MX_CS0PRIO < 4 -# error "CONFIG_PIC32MX_CS0PRIO is too small" -#endif -#if CONFIG_PIC32MX_CS0PRIO > 31 -# error "CONFIG_PIC32MX_CS0PRIO is too large" -#endif - -#ifndef CONFIG_PIC32MX_CS1PRIO /* Core Software Interrupt 1 */ -# define CONFIG_PIC32MX_CS1PRIO (INT_ICP_MID_PRIORITY << 2) -#endif -#if CONFIG_PIC32MX_CS1PRIO < 4 -# error "CONFIG_PIC32MX_CS1PRIO is too small" -#endif -#if CONFIG_PIC32MX_CS1PRIO > 31 -# error "CONFIG_PIC32MX_CS1PRIO is too large" -#endif - -#ifndef CONFIG_PIC32MX_INT0PRIO /* External interrupt 0 */ -# define CONFIG_PIC32MX_INT0PRIO (INT_ICP_MID_PRIORITY << 2) -#endif -#if CONFIG_PIC32MX_INT0PRIO < 4 -# error "CONFIG_PIC32MX_INT0PRIO is too small" -#endif -#if CONFIG_PIC32MX_INT0PRIO > 31 -# error "CONFIG_PIC32MX_INT0PRIO is too large" -#endif - -#ifndef CONFIG_PIC32MX_INT1PRIO /* External interrupt 1 */ -# define CONFIG_PIC32MX_INT1PRIO (INT_ICP_MID_PRIORITY << 2) -#endif -#if CONFIG_PIC32MX_INT1PRIO < 4 -# error "CONFIG_PIC32MX_INT1PRIO is too small" -#endif -#if CONFIG_PIC32MX_INT1PRIO > 31 -# error "CONFIG_PIC32MX_INT1PRIO is too large" -#endif - -#ifndef CONFIG_PIC32MX_INT2PRIO /* External interrupt 2 */ -# define CONFIG_PIC32MX_INT2PRIO (INT_ICP_MID_PRIORITY << 2) -#endif -#if CONFIG_PIC32MX_INT2PRIO < 4 -# error "CONFIG_PIC32MX_INT2PRIO is too small" -#endif -#if CONFIG_PIC32MX_INT2PRIO > 31 -# error "CONFIG_PIC32MX_INT2PRIO is too large" -#endif - -#ifndef CONFIG_PIC32MX_INT3PRIO /* External interrupt 3 */ -# define CONFIG_PIC32MX_INT3PRIO (INT_ICP_MID_PRIORITY << 2) -#endif -#if CONFIG_PIC32MX_INT3PRIO < 4 -# error "CONFIG_PIC32MX_INT3PRIO is too small" -#endif -#if CONFIG_PIC32MX_INT3PRIO > 31 -# error "CONFIG_PIC32MX_INT3PRIO is too large" -#endif - -#ifndef CONFIG_PIC32MX_INT4PRIO /* External interrupt 4 */ -# define CONFIG_PIC32MX_INT4PRIO (INT_ICP_MID_PRIORITY << 2) -#endif -#if CONFIG_PIC32MX_INT4PRIO < 4 -# error "CONFIG_PIC32MX_INT4PRIO is too small" -#endif -#if CONFIG_PIC32MX_INT4PRIO > 31 -# error "CONFIG_PIC32MX_INT4PRIO is too large" -#endif - -#ifndef CONFIG_PIC32MX_FSCMPRIO /* Fail-Safe Clock Monitor */ -# define CONFIG_PIC32MX_FSCMPRIO (INT_ICP_MID_PRIORITY << 2) -#endif -#if CONFIG_PIC32MX_FSCMPRIO < 4 -# error "CONFIG_PIC32MX_FSCMPRIO is too small" -#endif -#if CONFIG_PIC32MX_FSCMPRIO > 31 -# error "CONFIG_PIC32MX_FSCMPRIO is too large" -#endif - -#ifndef CONFIG_PIC32MX_T1PRIO /* Timer 1 (System timer) priority */ -# define CONFIG_PIC32MX_T1PRIO (INT_ICP_MID_PRIORITY << 2) -#endif -#if CONFIG_PIC32MX_T1PRIO < 4 -# error "CONFIG_PIC32MX_T1PRIO is too small" -#endif -#if CONFIG_PIC32MX_T1PRIO > 31 -# error "CONFIG_PIC32MX_T1PRIO is too large" -#endif - -#ifndef CONFIG_PIC32MX_T2PRIO /* Timer 2 priority */ -# define CONFIG_PIC32MX_T2PRIO (INT_ICP_MID_PRIORITY << 2) -#endif -#if CONFIG_PIC32MX_T2PRIO < 4 -# error "CONFIG_PIC32MX_T2PRIO is too small" -#endif -#if CONFIG_PIC32MX_T2PRIO > 31 -# error "CONFIG_PIC32MX_T2PRIO is too large" -#endif - -#ifndef CONFIG_PIC32MX_T3PRIO /* Timer 3 priority */ -# define CONFIG_PIC32MX_T3PRIO (INT_ICP_MID_PRIORITY << 2) -#endif -#if CONFIG_PIC32MX_T3PRIO < 4 -# error "CONFIG_PIC32MX_T3PRIO is too small" -#endif -#if CONFIG_PIC32MX_T3PRIO > 31 -# error "CONFIG_PIC32MX_T3PRIO is too large" -#endif - -#ifndef CONFIG_PIC32MX_T4PRIO /* Timer 4 priority */ -# define CONFIG_PIC32MX_T4PRIO (INT_ICP_MID_PRIORITY << 2) -#endif -#if CONFIG_PIC32MX_T4PRIO < 4 -# error "CONFIG_PIC32MX_T4PRIO is too small" -#endif -#if CONFIG_PIC32MX_T4PRIO > 31 -# error "CONFIG_PIC32MX_T4PRIO is too large" -#endif - -#ifndef CONFIG_PIC32MX_T5PRIO /* Timer 5 priority */ -# define CONFIG_PIC32MX_T5PRIO (INT_ICP_MID_PRIORITY << 2) -#endif -#if CONFIG_PIC32MX_T5PRIO < 4 -# error "CONFIG_PIC32MX_T5PRIO is too small" -#endif -#if CONFIG_PIC32MX_T5PRIO > 31 -# error "CONFIG_PIC32MX_T5PRIO is too large" -#endif - -#ifndef CONFIG_PIC32MX_IC1PRIO /* Input Capture 1 */ -# define CONFIG_PIC32MX_IC1PRIO (INT_ICP_MID_PRIORITY << 2) -#endif -#if CONFIG_PIC32MX_IC1PRIO < 4 -# error "CONFIG_PIC32MX_IC1PRIO is too small" -#endif -#if CONFIG_PIC32MX_IC1PRIO > 31 -# error "CONFIG_PIC32MX_IC1PRIO is too large" -#endif - -#ifndef CONFIG_PIC32MX_IC2PRIO /* Input Capture 2 */ -# define CONFIG_PIC32MX_IC2PRIO (INT_ICP_MID_PRIORITY << 2) -#endif -#if CONFIG_PIC32MX_IC2PRIO < 4 -# error "CONFIG_PIC32MX_IC2PRIO is too small" -#endif -#if CONFIG_PIC32MX_IC2PRIO > 31 -# error "CONFIG_PIC32MX_IC2PRIO is too large" -#endif - -#ifndef CONFIG_PIC32MX_IC3PRIO /* Input Capture 3 */ -# define CONFIG_PIC32MX_IC3PRIO (INT_ICP_MID_PRIORITY << 2) -#endif -#if CONFIG_PIC32MX_IC3PRIO < 4 -# error "CONFIG_PIC32MX_IC3PRIO is too small" -#endif -#if CONFIG_PIC32MX_IC3PRIO > 31 -# error "CONFIG_PIC32MX_IC3PRIO is too large" -#endif - -#ifndef CONFIG_PIC32MX_IC4PRIO /* Input Capture 4 */ -# define CONFIG_PIC32MX_IC4PRIO (INT_ICP_MID_PRIORITY << 2) -#endif -#if CONFIG_PIC32MX_IC4PRIO < 4 -# error "CONFIG_PIC32MX_IC4PRIO is too small" -#endif -#if CONFIG_PIC32MX_IC4PRIO > 31 -# error "CONFIG_PIC32MX_IC4PRIO is too large" -#endif - -#ifndef CONFIG_PIC32MX_IC5PRIO /* Input Capture 5 */ -# define CONFIG_PIC32MX_IC5PRIO (INT_ICP_MID_PRIORITY << 2) -#endif -#if CONFIG_PIC32MX_IC5PRIO < 4 -# error "CONFIG_PIC32MX_IC5PRIO is too small" -#endif -#if CONFIG_PIC32MX_IC5PRIO > 31 -# error "CONFIG_PIC32MX_IC5PRIO is too large" -#endif - -#ifndef CONFIG_PIC32MX_OC1PRIO /* Output Compare 1 */ -# define CONFIG_PIC32MX_OC1PRIO (INT_ICP_MID_PRIORITY << 2) -#endif -#if CONFIG_PIC32MX_OC1PRIO < 4 -# error "CONFIG_PIC32MX_OC1PRIO is too small" -#endif -#if CONFIG_PIC32MX_OC1PRIO > 31 -# error "CONFIG_PIC32MX_OC1PRIO is too large" -#endif - -#ifndef CONFIG_PIC32MX_OC2PRIO /* Output Compare 2 */ -# define CONFIG_PIC32MX_OC2PRIO (INT_ICP_MID_PRIORITY << 2) -#endif -#if CONFIG_PIC32MX_OC2PRIO < 4 -# error "CONFIG_PIC32MX_OC2PRIO is too small" -#endif -#if CONFIG_PIC32MX_OC2PRIO > 31 -# error "CONFIG_PIC32MX_OC2PRIO is too large" -#endif - -#ifndef CONFIG_PIC32MX_OC3PRIO /* Output Compare 3 */ -# define CONFIG_PIC32MX_OC3PRIO (INT_ICP_MID_PRIORITY << 2) -#endif -#if CONFIG_PIC32MX_OC3PRIO < 4 -# error "CONFIG_PIC32MX_OC3PRIO is too small" -#endif -#if CONFIG_PIC32MX_OC3PRIO > 31 -# error "CONFIG_PIC32MX_OC3PRIO is too large" -#endif - -#ifndef CONFIG_PIC32MX_OC4PRIO /* Output Compare 4 */ -# define CONFIG_PIC32MX_OC4PRIO (INT_ICP_MID_PRIORITY << 2) -#endif -#if CONFIG_PIC32MX_OC4PRIO < 4 -# error "CONFIG_PIC32MX_OC4PRIO is too small" -#endif -#if CONFIG_PIC32MX_OC4PRIO > 31 -# error "CONFIG_PIC32MX_OC4PRIO is too large" -#endif - -#ifndef CONFIG_PIC32MX_OC5PRIO /* Output Compare 5 */ -# define CONFIG_PIC32MX_OC5PRIO (INT_ICP_MID_PRIORITY << 2) -#endif -#if CONFIG_PIC32MX_OC5PRIO < 4 -# error "CONFIG_PIC32MX_OC5PRIO is too small" -#endif -#if CONFIG_PIC32MX_OC5PRIO > 31 -# error "CONFIG_PIC32MX_OC5PRIO is too large" -#endif - -#ifndef CONFIG_PIC32MX_I2C1PRIO /* I2C 1 */ -# define CONFIG_PIC32MX_I2C1PRIO (INT_ICP_MID_PRIORITY << 2) -#endif -#if CONFIG_PIC32MX_I2C1PRIO < 4 -# error "CONFIG_PIC32MX_I2C1PRIO is too small" -#endif -#if CONFIG_PIC32MX_I2C1PRIO > 31 -# error "CONFIG_PIC32MX_I2C1PRIO is too large" -#endif - -#ifndef CONFIG_PIC32MX_I2C2PRIO /* I2C 2 */ -# define CONFIG_PIC32MX_I2C2PRIO (INT_ICP_MID_PRIORITY << 2) -#endif -#if CONFIG_PIC32MX_I2C2PRIO < 4 -# error "CONFIG_PIC32MX_I2C2PRIO is too small" -#endif -#if CONFIG_PIC32MX_I2C2PRIO > 31 -# error "CONFIG_PIC32MX_I2C2PRIO is too large" -#endif - -#ifndef CONFIG_PIC32MX_SPI1PRIO /* SPI 1 */ -# define CONFIG_PIC32MX_SPI1PRIO (INT_ICP_MID_PRIORITY << 2) -#endif -#if CONFIG_PIC32MX_SPI1PRIO < 4 -# error "CONFIG_PIC32MX_SPI1PRIO is too small" -#endif -#if CONFIG_PIC32MX_SPI1PRIO > 31 -# error "CONFIG_PIC32MX_SPI1PRIO is too large" -#endif - -#ifndef CONFIG_PIC32MX_SPI2PRIO /* SPI 2 */ -# define CONFIG_PIC32MX_SPI2PRIO (INT_ICP_MID_PRIORITY << 2) -#endif -#if CONFIG_PIC32MX_SPI2PRIO < 4 -# error "CONFIG_PIC32MX_SPI2PRIO is too small" -#endif -#if CONFIG_PIC32MX_SPI2PRIO > 31 -# error "CONFIG_PIC32MX_SPI2PRIO is too large" -#endif - -#ifndef CONFIG_PIC32MX_UART1PRIO /* UART 1 */ -# define CONFIG_PIC32MX_UART1PRIO (INT_ICP_MID_PRIORITY << 2) -#endif -#if CONFIG_PIC32MX_UART1PRIO < 4 -# error "CONFIG_PIC32MX_UART1PRIO is too small" -#endif -#if CONFIG_PIC32MX_UART1PRIO > 31 -# error "CONFIG_PIC32MX_UART1PRIO is too large" -#endif - -#ifndef CONFIG_PIC32MX_UART2PRIO /* UART 2 */ -# define CONFIG_PIC32MX_UART2PRIO (INT_ICP_MID_PRIORITY << 2) -#endif -#if CONFIG_PIC32MX_UART2PRIO < 4 -# error "CONFIG_PIC32MX_UART2PRIO is too small" -#endif -#if CONFIG_PIC32MX_UART2PRIO > 31 -# error "CONFIG_PIC32MX_UART2PRIO is too large" -#endif - -#ifndef CONFIG_PIC32MX_CN /* Input Change Interrupt */ -# define CONFIG_PIC32MX_CN (INT_ICP_MID_PRIORITY << 2) -#endif -#if CONFIG_PIC32MX_CN < 4 -# error "CONFIG_PIC32MX_CN is too small" -#endif -#if CONFIG_PIC32MX_CN > 31 -# error "CONFIG_PIC32MX_CN is too large" -#endif - -#ifndef CONFIG_PIC32MX_ADCPRIO /* ADC1 Convert Done */ -# define CONFIG_PIC32MX_ADCPRIO (INT_ICP_MID_PRIORITY << 2) -#endif -#if CONFIG_PIC32MX_ADCPRIO < 4 -# error "CONFIG_PIC32MX_ADCPRIO is too small" -#endif -#if CONFIG_PIC32MX_ADCPRIO > 31 -# error "CONFIG_PIC32MX_ADCPRIO is too large" -#endif - -#ifndef CONFIG_PIC32MX_PMPPRIO /* Parallel Master Port */ -# define CONFIG_PIC32MX_PMPPRIO (INT_ICP_MID_PRIORITY << 2) -#endif -#if CONFIG_PIC32MX_PMPPRIO < 4 -# error "CONFIG_PIC32MX_PMPPRIO is too small" -#endif -#if CONFIG_PIC32MX_PMPPRIO > 31 -# error "CONFIG_PIC32MX_PMPPRIO is too large" -#endif - -#ifndef CONFIG_PIC32MX_CM1PRIO /* Comparator 1 */ -# define CONFIG_PIC32MX_CM1PRIO (INT_ICP_MID_PRIORITY << 2) -#endif -#if CONFIG_PIC32MX_CM1PRIO < 4 -# error "CONFIG_PIC32MX_CM1PRIO is too small" -#endif -#if CONFIG_PIC32MX_CM1PRIO > 31 -# error "CONFIG_PIC32MX_CM1PRIO is too large" -#endif - -#ifndef CONFIG_PIC32MX_CM2PRIO /* Comparator 2 */ -# define CONFIG_PIC32MX_CM2PRIO (INT_ICP_MID_PRIORITY << 2) -#endif -#if CONFIG_PIC32MX_CM2PRIO < 4 -# error "CONFIG_PIC32MX_CM2PRIO is too small" -#endif -#if CONFIG_PIC32MX_CM2PRIO > 31 -# error "CONFIG_PIC32MX_CM2PRIO is too large" -#endif - -#ifndef CONFIG_PIC32MX_FSCMPRIO /* Fail-Safe Clock Monitor */ -# define CONFIG_PIC32MX_FSCMPRIO (INT_ICP_MID_PRIORITY << 2) -#endif -#if CONFIG_PIC32MX_FSCMPRIO < 4 -# error "CONFIG_PIC32MX_FSCMPRIO is too small" -#endif -#if CONFIG_PIC32MX_FSCMPRIO > 31 -# error "CONFIG_PIC32MX_FSCMPRIO is too large" -#endif - -#ifndef CONFIG_PIC32MX_RTCCPRIO /* Real-Time Clock and Calendar */ -# define CONFIG_PIC32MX_RTCCPRIO (INT_ICP_MID_PRIORITY << 2) -#endif -#if CONFIG_PIC32MX_RTCCPRIO < 4 -# error "CONFIG_PIC32MX_RTCCPRIO is too small" -#endif -#if CONFIG_PIC32MX_RTCCPRIO > 31 -# error "CONFIG_PIC32MX_RTCCPRIO is too large" -#endif - -#ifndef CONFIG_PIC32MX_DMA0PRIO /* DMA Channel 0 */ -# define CONFIG_PIC32MX_DMA0PRIO (INT_ICP_MID_PRIORITY << 2) -#endif -#if CONFIG_PIC32MX_DMA0PRIO < 4 -# error "CONFIG_PIC32MX_DMA0PRIO is too small" -#endif -#if CONFIG_PIC32MX_DMA0PRIO > 31 -# error "CONFIG_PIC32MX_DMA0PRIO is too large" -#endif - -#ifndef CONFIG_PIC32MX_DMA1PRIO /* DMA Channel 1 */ -# define CONFIG_PIC32MX_DMA1PRIO (INT_ICP_MID_PRIORITY << 2) -#endif -#if CONFIG_PIC32MX_DMA1PRIO < 4 -# error "CONFIG_PIC32MX_DMA1PRIO is too small" -#endif -#if CONFIG_PIC32MX_DMA1PRIO > 31 -# error "CONFIG_PIC32MX_DMA1PRIO is too large" -#endif - -#ifndef CONFIG_PIC32MX_DMA2PRIO /* DMA Channel 2 */ -# define CONFIG_PIC32MX_DMA2PRIO (INT_ICP_MID_PRIORITY << 2) -#endif -#if CONFIG_PIC32MX_DMA2PRIO < 4 -# error "CONFIG_PIC32MX_DMA2PRIO is too small" -#endif -#if CONFIG_PIC32MX_DMA2PRIO > 31 -# error "CONFIG_PIC32MX_DMA2PRIO is too large" -#endif - -#ifndef CONFIG_PIC32MX_DMA3PRIO /* DMA Channel 3 */ -# define CONFIG_PIC32MX_DMA3PRIO (INT_ICP_MID_PRIORITY << 2) -#endif -#if CONFIG_PIC32MX_DMA3PRIO < 4 -# error "CONFIG_PIC32MX_DMA3PRIO is too small" -#endif -#if CONFIG_PIC32MX_DMA3PRIO > 31 -# error "CONFIG_PIC32MX_DMA3PRIO is too large" -#endif - -#ifndef CONFIG_PIC32MX_FCEPRIO /* Flash Control Event */ -# define CONFIG_PIC32MX_FCEPRIO (INT_ICP_MID_PRIORITY << 2) -#endif -#if CONFIG_PIC32MX_FCEPRIO < 4 -# error "CONFIG_PIC32MX_FCEPRIO is too small" -#endif -#if CONFIG_PIC32MX_FCEPRIO > 31 -# error "CONFIG_PIC32MX_FCEPRIO is too large" -#endif - -#ifndef CONFIG_PIC32MX_USBPRIO /* USB */ -# define CONFIG_PIC32MX_USBPRIO (INT_ICP_MID_PRIORITY << 2) -#endif -#if CONFIG_PIC32MX_USBPRIO < 4 -# error "CONFIG_PIC32MX_USBPRIO is too small" -#endif -#if CONFIG_PIC32MX_USBPRIO > 31 -# error "CONFIG_PIC32MX_USBPRIO is too large" -#endif - -/* SYS calls ************************************************************************/ -/* SYS call 0 and 1 are defined for internal use by the PIC32MX port (see - * arch/mips/include/mips32/syscall.h - */ - -#ifdef CONFIG_NUTTX_KERNEL -# if !defined(CONFIG_SYS_RESERVED) || CONFIG_SYS_RESERVED < 2 -# error "CONFIG_SYS_RESERVED must be defined to be 2 for a kernel build" -# elif CONFIG_SYS_RESERVED > 2 -# warning "CONFIG_SYS_RESERVED should be defined to be 2 for a kernel build" -# endif -#endif - -/* UARTs ****************************************************************************/ -/* Don't enable UARTs not supported by the chip. */ - -#if CHIP_NUARTS < 1 -# undef CONFIG_PIC32MX_UART1 -# undef CONFIG_PIC32MX_UART2 -# undef CONFIG_PIC32MX_UART3 -# undef CONFIG_PIC32MX_UART4 -# undef CONFIG_PIC32MX_UART5 -# undef CONFIG_PIC32MX_UART6 -#elif CHIP_NUARTS < 2 -# undef CONFIG_PIC32MX_UART2 -# undef CONFIG_PIC32MX_UART3 -# undef CONFIG_PIC32MX_UART4 -# undef CONFIG_PIC32MX_UART5 -# undef CONFIG_PIC32MX_UART6 -#elif CHIP_NUARTS < 3 -# undef CONFIG_PIC32MX_UART3 -# undef CONFIG_PIC32MX_UART4 -# undef CONFIG_PIC32MX_UART5 -# undef CONFIG_PIC32MX_UART6 -#elif CHIP_NUARTS < 4 -# undef CONFIG_PIC32MX_UART4 -# undef CONFIG_PIC32MX_UART5 -# undef CONFIG_PIC32MX_UART6 -#elif CHIP_NUARTS < 5 -# undef CONFIG_PIC32MX_UART5 -# undef CONFIG_PIC32MX_UART6 -#elif CHIP_NUARTS < 6 -# undef CONFIG_PIC32MX_UART6 -#endif - -/* Are any UARTs enabled? */ - -#undef HAVE_UART_DEVICE -#if defined(CONFIG_PIC32MX_UART1) || defined(CONFIG_PIC32MX_UART2) || \ - defined(CONFIG_PIC32MX_UART4) || defined(CONFIG_PIC32MX_UART4) || \ - defined(CONFIG_PIC32MX_UART5) || defined(CONFIG_PIC32MX_UART6) -# define HAVE_UART_DEVICE 1 -#endif - -/* Is there a serial console? There should be at most one defined. It - * could be on any UARTn, n=1,.. CHIP_NUARTS - */ - -#if defined(CONFIG_UART1_SERIAL_CONSOLE) && defined(CONFIG_PIC32MX_UART1) -# undef CONFIG_UART2_SERIAL_CONSOLE -# undef CONFIG_UART3_SERIAL_CONSOLE -# undef CONFIG_UART4_SERIAL_CONSOLE -# undef CONFIG_UART5_SERIAL_CONSOLE -# undef CONFIG_UART6_SERIAL_CONSOLE -# define HAVE_SERIAL_CONSOLE 1 -#elif defined(CONFIG_UART2_SERIAL_CONSOLE) && defined(CONFIG_PIC32MX_UART2) -# undef CONFIG_UART1_SERIAL_CONSOLE -# undef CONFIG_UART2_SERIAL_CONSOLE -# undef CONFIG_UART3_SERIAL_CONSOLE -# undef CONFIG_UART4_SERIAL_CONSOLE -# undef CONFIG_UART5_SERIAL_CONSOLE -# undef CONFIG_UART6_SERIAL_CONSOLE -# define HAVE_SERIAL_CONSOLE 1 -#elif defined(CONFIG_UART3_SERIAL_CONSOLE) && defined(CONFIG_PIC32MX_UART3) -# undef CONFIG_UART1_SERIAL_CONSOLE -# undef CONFIG_UART2_SERIAL_CONSOLE -# undef CONFIG_UART4_SERIAL_CONSOLE -# undef CONFIG_UART5_SERIAL_CONSOLE -# undef CONFIG_UART6_SERIAL_CONSOLE -# define HAVE_SERIAL_CONSOLE 1 -#elif defined(CONFIG_UART4_SERIAL_CONSOLE) && defined(CONFIG_PIC32MX_UART4) -# undef CONFIG_UART1_SERIAL_CONSOLE -# undef CONFIG_UART2_SERIAL_CONSOLE -# undef CONFIG_UART3_SERIAL_CONSOLE -# undef CONFIG_UART5_SERIAL_CONSOLE -# undef CONFIG_UART6_SERIAL_CONSOLE -# define HAVE_SERIAL_CONSOLE 1 -#elif defined(CONFIG_UART5_SERIAL_CONSOLE) && defined(CONFIG_PIC32MX_UART5) -# undef CONFIG_UART1_SERIAL_CONSOLE -# undef CONFIG_UART2_SERIAL_CONSOLE -# undef CONFIG_UART3_SERIAL_CONSOLE -# undef CONFIG_UART4_SERIAL_CONSOLE -# undef CONFIG_UART6_SERIAL_CONSOLE -# define HAVE_SERIAL_CONSOLE 1 -#elif defined(CONFIG_UART6_SERIAL_CONSOLE) && defined(CONFIG_PIC32MX_UART6) -# undef CONFIG_UART1_SERIAL_CONSOLE -# undef CONFIG_UART2_SERIAL_CONSOLE -# undef CONFIG_UART3_SERIAL_CONSOLE -# undef CONFIG_UART4_SERIAL_CONSOLE -# undef CONFIG_UART5_SERIAL_CONSOLE -# define HAVE_SERIAL_CONSOLE 1 -#else -# undef CONFIG_UART1_SERIAL_CONSOLE -# undef CONFIG_UART2_SERIAL_CONSOLE -# undef CONFIG_UART3_SERIAL_CONSOLE -# undef CONFIG_UART4_SERIAL_CONSOLE -# undef CONFIG_UART5_SERIAL_CONSOLE -# undef CONFIG_UART6_SERIAL_CONSOLE -# undef HAVE_SERIAL_CONSOLE -#endif - -/* Device Configuration *************************************************************/ -/* DEVCFG3 */ - -#ifndef CONFIG_PIC32MX_USERID /* User ID */ -# define CONFIG_PIC32MX_USERID 0x584e /* "NutX" */ -#endif - -#ifndef CONFIG_PIC32MX_SRSSEL /* Shadow register interrupt priority */ -# define CONFIG_PIC32MX_SRSSEL INT_ICP_MIN_PRIORITY -#endif - -/* Unless overridden in the .config file, all pins are in the default setting */ - -#ifndef CONFIG_PIC32MX_FMIIEN /* Ethernet MII enable */ -# define CONFIG_PIC32MX_FMIIEN 1 /* MII enabled */ -#endif - -#ifndef CONFIG_PIC32MX_FETHIO /* SCM1 pin C selection */ -# define CONFIG_PIC32MX_FETHIO 1 /* Default Ethernet I/O Pins */ -#endif - -#ifndef CONFIG_PIC32MX_FCANIO /* SCM1 pin C selection */ -# define CONFIG_PIC32MX_FCANIO 1 /* Default CAN I/O Pins */ -#endif - -#ifndef CONFIG_PIC32MX_FSCM1IO /* SCM1 pin C selection */ -# define CONFIG_PIC32MX_FSCM1IO 1 /* Default pin for SCM1C */ -#endif - -/* USB or Ports? */ - -#ifdef CONFIG_PIC32MX_USB -# ifndef CONFIG_PIC32MX_USBIDO /* USB USBID Selection */ -# define CONFIG_PIC32MX_USBIDO 1 /* USBID pin is controlled by the USB module */ -# endif -# ifndef CONFIG_PIC32MX_VBUSIO /* USB VBUSON Selection */ -# define CONFIG_PIC32MX_VBUSIO 1 /* VBUSON pin is controlled by the USB module */ -# endif -#else -# ifndef CONFIG_PIC32MX_USBIDO /* USB USBID Selection */ -# define CONFIG_PIC32MX_USBIDO 0 /* USBID pin is controlled by the Port function */ -# endif -# ifndef CONFIG_PIC32MX_VBUSIO /* USB VBUSON Selection */ -# define CONFIG_PIC32MX_VBUSIO 0 /* VBUSON pin is controlled by the Port function */ -# endif -#endif - -/* DEVCFG2 */ - -#undef CONFIG_PIC32MX_PLLIDIV -#if BOARD_PLL_IDIV == 1 -# define CONFIG_PIC32MX_PLLIDIV DEVCFG2_FPLLIDIV_DIV1 -#elif BOARD_PLL_IDIV == 2 -# define CONFIG_PIC32MX_PLLIDIV DEVCFG2_FPLLIDIV_DIV2 -#elif BOARD_PLL_IDIV == 3 -# define CONFIG_PIC32MX_PLLIDIV DEVCFG2_FPLLIDIV_DIV3 -#elif BOARD_PLL_IDIV == 4 -# define CONFIG_PIC32MX_PLLIDIV DEVCFG2_FPLLIDIV_DIV4 -#elif BOARD_PLL_IDIV == 5 -# define CONFIG_PIC32MX_PLLIDIV DEVCFG2_FPLLIDIV_DIV5 -#elif BOARD_PLL_IDIV == 6 -# define CONFIG_PIC32MX_PLLIDIV DEVCFG2_FPLLIDIV_DIV6 -#elif BOARD_PLL_IDIV == 10 -# define CONFIG_PIC32MX_PLLIDIV DEVCFG2_FPLLIDIV_DIV10 -#elif BOARD_PLL_IDIV == 12 -# define CONFIG_PIC32MX_PLLIDIV DEVCFG2_FPLLIDIV_DIV12 -#else -# error "Unsupported BOARD_PLL_IDIV" -#endif - -#undef CONFIG_PIC32MX_PLLMULT -#if BOARD_PLL_MULT == 15 -# define CONFIG_PIC32MX_PLLMULT DEVCFG2_FPLLMULT_MUL15 -#elif BOARD_PLL_MULT == 16 -# define CONFIG_PIC32MX_PLLMULT DEVCFG2_FPLLMULT_MUL16 -#elif BOARD_PLL_MULT == 17 -# define CONFIG_PIC32MX_PLLMULT DEVCFG2_FPLLMULT_MUL17 -#elif BOARD_PLL_MULT == 18 -# define CONFIG_PIC32MX_PLLMULT DEVCFG2_FPLLMULT_MUL18 -#elif BOARD_PLL_MULT == 19 -# define CONFIG_PIC32MX_PLLMULT DEVCFG2_FPLLMULT_MUL19 -#elif BOARD_PLL_MULT == 20 -# define CONFIG_PIC32MX_PLLMULT DEVCFG2_FPLLMULT_MUL20 -#elif BOARD_PLL_MULT == 21 -# define CONFIG_PIC32MX_PLLMULT DEVCFG2_FPLLMULT_MUL21 -#elif BOARD_PLL_MULT == 24 -# define CONFIG_PIC32MX_PLLMULT DEVCFG2_FPLLMULT_MUL24 -#else -# error "Unsupported BOARD_PLL_MULT" -#endif - -#undef CONFIG_PIC32MX_UPLLIDIV -#if BOARD_UPLL_IDIV == 1 -# define CONFIG_PIC32MX_UPLLIDIV DEVCFG2_FUPLLIDIV_DIV1 -#elif BOARD_UPLL_IDIV == 2 -# define CONFIG_PIC32MX_UPLLIDIV DEVCFG2_FUPLLIDIV_DIV2 -#elif BOARD_UPLL_IDIV == 3 -# define CONFIG_PIC32MX_UPLLIDIV DEVCFG2_FUPLLIDIV_DIV3 -#elif BOARD_UPLL_IDIV == 4 -# define CONFIG_PIC32MX_UPLLIDIV DEVCFG2_FUPLLIDIV_DIV4 -#elif BOARD_UPLL_IDIV == 5 -# define CONFIG_PIC32MX_UPLLIDIV DEVCFG2_FUPLLIDIV_DIV5 -#elif BOARD_UPLL_IDIV == 6 -# define CONFIG_PIC32MX_UPLLIDIV DEVCFG2_FUPLLIDIV_DIV6 -#elif BOARD_UPLL_IDIV == 10 -# define CONFIG_PIC32MX_UPLLIDIV DEVCFG2_FUPLLIDIV_DIV10 -#elif BOARD_UPLL_IDIV == 12 -# define CONFIG_PIC32MX_UPLLIDIV DEVCFG2_FUPLLIDIV_DIV12 -#else -# error "Unsupported BOARD_UPLL_IDIV" -#endif - -#undef CONFIG_PIC32MX_PLLODIV -#if BOARD_PLL_ODIV == 1 -# define CONFIG_PIC32MX_PLLODIV DEVCFG2_FPLLODIV_DIV1 -#elif BOARD_PLL_ODIV == 2 -# define CONFIG_PIC32MX_PLLODIV DEVCFG2_FPLLODIV_DIV2 -#elif BOARD_PLL_ODIV == 4 -# define CONFIG_PIC32MX_PLLODIV DEVCFG2_FPLLODIV_DIV2 -#elif BOARD_PLL_ODIV == 8 -# define CONFIG_PIC32MX_PLLODIV DEVCFG2_FPLLODIV_DIV2 -#elif BOARD_PLL_ODIV == 16 -# define CONFIG_PIC32MX_PLLODIV DEVCFG2_FPLLODIV_DIV2 -#elif BOARD_PLL_ODIV == 32 -# define CONFIG_PIC32MX_PLLODIV DEVCFG2_FPLLODIV_DIV2 -#elif BOARD_PLL_ODIV == 64 -# define CONFIG_PIC32MX_PLLODIV DEVCFG2_FPLLODIV_DIV2 -#elif BOARD_PLL_ODIV == 128 -# define CONFIG_PIC32MX_PLLODIV DEVCFG2_FPLLODIV_DIV2 -#else -# error "Unsupported BOARD_PLL_ODIV" -#endif - -/* DEVCFG1 */ - -#undef CONFIG_PIC32MX_PBDIV -#if BOARD_PBDIV == 1 -# define CONFIG_PIC32MX_PBDIV DEVCFG1_FPBDIV_DIV1 -#elif BOARD_PBDIV == 2 -# define CONFIG_PIC32MX_PBDIV DEVCFG1_FPBDIV_DIV2 -#elif BOARD_PBDIV == 4 -# define CONFIG_PIC32MX_PBDIV DEVCFG1_FPBDIV_DIV4 -#elif BOARD_PBDIV == 8 -# define CONFIG_PIC32MX_PBDIV DEVCFG1_FPBDIV_DIV8 -#else -# error "Unsupported BOARD_PBDIV" -#endif - -#undef CONFIG_PIC32MX_WDPS -#if BOARD_WD_PRESCALER == 1 -# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_1 -#elif BOARD_WD_PRESCALER == 2 -# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_2 -#elif BOARD_WD_PRESCALER == 4 -# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_4 -#elif BOARD_WD_PRESCALER == 8 -# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_8 -#elif BOARD_WD_PRESCALER == 16 -# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_16 -#elif BOARD_WD_PRESCALER == 32 -# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_32 -#elif BOARD_WD_PRESCALER == 64 -# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_64 -#elif BOARD_WD_PRESCALER == 128 -# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_128 -#elif BOARD_WD_PRESCALER == 256 -# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_256 -#elif BOARD_WD_PRESCALER == 512 -# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_512 -#elif BOARD_WD_PRESCALER == 1024 -# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_1024 -#elif BOARD_WD_PRESCALER == 2048 -# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_2048 -#elif BOARD_WD_PRESCALER == 4096 -# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_4096 -#elif BOARD_WD_PRESCALER == 8192 -# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_8192 -#elif BOARD_WD_PRESCALER == 16384 -# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_16384 -#elif BOARD_WD_PRESCALER == 32768 -# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_32768 -#elif BOARD_WD_PRESCALER == 65536 -# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_65536 -#elif BOARD_WD_PRESCALER == 131072 -# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_131072 -#elif BOARD_WD_PRESCALER == 262144 -# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_262144 -#elif BOARD_WD_PRESCALER == 524288 -# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_524288 -#elif BOARD_WD_PRESCALER == 1048576 -# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_1048576 -#else -# error "Unsupported BOARD_WD_PRESCALER" -#endif - -#undef CONFIG_PIC32MX_WDENABLE -#if BOARD_WD_ENABLE -# define CONFIG_PIC32MX_WDENABLE DEVCFG1_FWDTEN -#else -# define CONFIG_PIC32MX_WDENABLE 0 -#endif - -/* DEVCFG0 */ - -#ifndef CONFIG_PIC32MX_DEBUGGER /* Background Debugger Enable */ -# define CONFIG_PIC32MX_DEBUGGER 3 /* disabled */ -#endif - -#ifndef CONFIG_PIC32MX_ICESEL /* In-Circuit Emulator/Debugger Communication Channel Select */ -# define CONFIG_PIC32MX_ICESEL 1 /* default */ -#endif - -#ifndef CONFIG_PIC32MX_PROGFLASHWP /* Program FLASH write protect */ -# define CONFIG_PIC32MX_PROGFLASHWP 0xff /* Disabled */ -#endif - -#ifndef CONFIG_PIC32MX_BOOTFLASHWP -# define CONFIG_PIC32MX_BOOTFLASHWP 1 /* Disabled */ -#endif - -#ifndef CONFIG_PIC32MX_CODEWP -# define CONFIG_PIC32MX_CODEWP 1 /* Disabled */ -#endif - -/************************************************************************************ - * Public Types - ************************************************************************************/ - -/************************************************************************************ - * Public Data - ************************************************************************************/ - -/************************************************************************************ - * Inline Functions - ************************************************************************************/ - -/************************************************************************************ - * Public Functions - ************************************************************************************/ - -#endif /* __ARCH_MIPS_SRC_PIC32MX_PIC32MX_PIC32_H */ +/************************************************************************************ + * arch/mips/src/pic32mx/pic32mx-config.h + * + * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __ARCH_MIPS_SRC_PIC32MX_PIC32MX_PIC32_H +#define __ARCH_MIPS_SRC_PIC32MX_PIC32MX_PIC32_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include + +#include "chip.h" +#include "pic32mx-memorymap.h" +#include "pic32mx-uart.h" +#include "pic32mx-int.h" +#include "pic32mx-devcfg.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Interrupt Priorities *************************************************************/ + +#ifndef CONFIG_PIC32MX_CTPRIO /* Core Timer Interrupt */ +# define CONFIG_PIC32MX_CTPRIO (INT_ICP_MID_PRIORITY << 2) +#endif +#if CONFIG_PIC32MX_CTPRIO < 4 +# error "CONFIG_PIC32MX_CTPRIO is too small" +#endif +#if CONFIG_PIC32MX_CTPRIO > 31 +# error "CONFIG_PIC32MX_CTPRIO is too large" +#endif + +#ifndef CONFIG_PIC32MX_CS0PRIO /* Core Software Interrupt 0 */ +# define CONFIG_PIC32MX_CS0PRIO (INT_ICP_MID_PRIORITY << 2) +#endif +#if CONFIG_PIC32MX_CS0PRIO < 4 +# error "CONFIG_PIC32MX_CS0PRIO is too small" +#endif +#if CONFIG_PIC32MX_CS0PRIO > 31 +# error "CONFIG_PIC32MX_CS0PRIO is too large" +#endif + +#ifndef CONFIG_PIC32MX_CS1PRIO /* Core Software Interrupt 1 */ +# define CONFIG_PIC32MX_CS1PRIO (INT_ICP_MID_PRIORITY << 2) +#endif +#if CONFIG_PIC32MX_CS1PRIO < 4 +# error "CONFIG_PIC32MX_CS1PRIO is too small" +#endif +#if CONFIG_PIC32MX_CS1PRIO > 31 +# error "CONFIG_PIC32MX_CS1PRIO is too large" +#endif + +#ifndef CONFIG_PIC32MX_INT0PRIO /* External interrupt 0 */ +# define CONFIG_PIC32MX_INT0PRIO (INT_ICP_MID_PRIORITY << 2) +#endif +#if CONFIG_PIC32MX_INT0PRIO < 4 +# error "CONFIG_PIC32MX_INT0PRIO is too small" +#endif +#if CONFIG_PIC32MX_INT0PRIO > 31 +# error "CONFIG_PIC32MX_INT0PRIO is too large" +#endif + +#ifndef CONFIG_PIC32MX_INT1PRIO /* External interrupt 1 */ +# define CONFIG_PIC32MX_INT1PRIO (INT_ICP_MID_PRIORITY << 2) +#endif +#if CONFIG_PIC32MX_INT1PRIO < 4 +# error "CONFIG_PIC32MX_INT1PRIO is too small" +#endif +#if CONFIG_PIC32MX_INT1PRIO > 31 +# error "CONFIG_PIC32MX_INT1PRIO is too large" +#endif + +#ifndef CONFIG_PIC32MX_INT2PRIO /* External interrupt 2 */ +# define CONFIG_PIC32MX_INT2PRIO (INT_ICP_MID_PRIORITY << 2) +#endif +#if CONFIG_PIC32MX_INT2PRIO < 4 +# error "CONFIG_PIC32MX_INT2PRIO is too small" +#endif +#if CONFIG_PIC32MX_INT2PRIO > 31 +# error "CONFIG_PIC32MX_INT2PRIO is too large" +#endif + +#ifndef CONFIG_PIC32MX_INT3PRIO /* External interrupt 3 */ +# define CONFIG_PIC32MX_INT3PRIO (INT_ICP_MID_PRIORITY << 2) +#endif +#if CONFIG_PIC32MX_INT3PRIO < 4 +# error "CONFIG_PIC32MX_INT3PRIO is too small" +#endif +#if CONFIG_PIC32MX_INT3PRIO > 31 +# error "CONFIG_PIC32MX_INT3PRIO is too large" +#endif + +#ifndef CONFIG_PIC32MX_INT4PRIO /* External interrupt 4 */ +# define CONFIG_PIC32MX_INT4PRIO (INT_ICP_MID_PRIORITY << 2) +#endif +#if CONFIG_PIC32MX_INT4PRIO < 4 +# error "CONFIG_PIC32MX_INT4PRIO is too small" +#endif +#if CONFIG_PIC32MX_INT4PRIO > 31 +# error "CONFIG_PIC32MX_INT4PRIO is too large" +#endif + +#ifndef CONFIG_PIC32MX_FSCMPRIO /* Fail-Safe Clock Monitor */ +# define CONFIG_PIC32MX_FSCMPRIO (INT_ICP_MID_PRIORITY << 2) +#endif +#if CONFIG_PIC32MX_FSCMPRIO < 4 +# error "CONFIG_PIC32MX_FSCMPRIO is too small" +#endif +#if CONFIG_PIC32MX_FSCMPRIO > 31 +# error "CONFIG_PIC32MX_FSCMPRIO is too large" +#endif + +#ifndef CONFIG_PIC32MX_T1PRIO /* Timer 1 (System timer) priority */ +# define CONFIG_PIC32MX_T1PRIO (INT_ICP_MID_PRIORITY << 2) +#endif +#if CONFIG_PIC32MX_T1PRIO < 4 +# error "CONFIG_PIC32MX_T1PRIO is too small" +#endif +#if CONFIG_PIC32MX_T1PRIO > 31 +# error "CONFIG_PIC32MX_T1PRIO is too large" +#endif + +#ifndef CONFIG_PIC32MX_T2PRIO /* Timer 2 priority */ +# define CONFIG_PIC32MX_T2PRIO (INT_ICP_MID_PRIORITY << 2) +#endif +#if CONFIG_PIC32MX_T2PRIO < 4 +# error "CONFIG_PIC32MX_T2PRIO is too small" +#endif +#if CONFIG_PIC32MX_T2PRIO > 31 +# error "CONFIG_PIC32MX_T2PRIO is too large" +#endif + +#ifndef CONFIG_PIC32MX_T3PRIO /* Timer 3 priority */ +# define CONFIG_PIC32MX_T3PRIO (INT_ICP_MID_PRIORITY << 2) +#endif +#if CONFIG_PIC32MX_T3PRIO < 4 +# error "CONFIG_PIC32MX_T3PRIO is too small" +#endif +#if CONFIG_PIC32MX_T3PRIO > 31 +# error "CONFIG_PIC32MX_T3PRIO is too large" +#endif + +#ifndef CONFIG_PIC32MX_T4PRIO /* Timer 4 priority */ +# define CONFIG_PIC32MX_T4PRIO (INT_ICP_MID_PRIORITY << 2) +#endif +#if CONFIG_PIC32MX_T4PRIO < 4 +# error "CONFIG_PIC32MX_T4PRIO is too small" +#endif +#if CONFIG_PIC32MX_T4PRIO > 31 +# error "CONFIG_PIC32MX_T4PRIO is too large" +#endif + +#ifndef CONFIG_PIC32MX_T5PRIO /* Timer 5 priority */ +# define CONFIG_PIC32MX_T5PRIO (INT_ICP_MID_PRIORITY << 2) +#endif +#if CONFIG_PIC32MX_T5PRIO < 4 +# error "CONFIG_PIC32MX_T5PRIO is too small" +#endif +#if CONFIG_PIC32MX_T5PRIO > 31 +# error "CONFIG_PIC32MX_T5PRIO is too large" +#endif + +#ifndef CONFIG_PIC32MX_IC1PRIO /* Input Capture 1 */ +# define CONFIG_PIC32MX_IC1PRIO (INT_ICP_MID_PRIORITY << 2) +#endif +#if CONFIG_PIC32MX_IC1PRIO < 4 +# error "CONFIG_PIC32MX_IC1PRIO is too small" +#endif +#if CONFIG_PIC32MX_IC1PRIO > 31 +# error "CONFIG_PIC32MX_IC1PRIO is too large" +#endif + +#ifndef CONFIG_PIC32MX_IC2PRIO /* Input Capture 2 */ +# define CONFIG_PIC32MX_IC2PRIO (INT_ICP_MID_PRIORITY << 2) +#endif +#if CONFIG_PIC32MX_IC2PRIO < 4 +# error "CONFIG_PIC32MX_IC2PRIO is too small" +#endif +#if CONFIG_PIC32MX_IC2PRIO > 31 +# error "CONFIG_PIC32MX_IC2PRIO is too large" +#endif + +#ifndef CONFIG_PIC32MX_IC3PRIO /* Input Capture 3 */ +# define CONFIG_PIC32MX_IC3PRIO (INT_ICP_MID_PRIORITY << 2) +#endif +#if CONFIG_PIC32MX_IC3PRIO < 4 +# error "CONFIG_PIC32MX_IC3PRIO is too small" +#endif +#if CONFIG_PIC32MX_IC3PRIO > 31 +# error "CONFIG_PIC32MX_IC3PRIO is too large" +#endif + +#ifndef CONFIG_PIC32MX_IC4PRIO /* Input Capture 4 */ +# define CONFIG_PIC32MX_IC4PRIO (INT_ICP_MID_PRIORITY << 2) +#endif +#if CONFIG_PIC32MX_IC4PRIO < 4 +# error "CONFIG_PIC32MX_IC4PRIO is too small" +#endif +#if CONFIG_PIC32MX_IC4PRIO > 31 +# error "CONFIG_PIC32MX_IC4PRIO is too large" +#endif + +#ifndef CONFIG_PIC32MX_IC5PRIO /* Input Capture 5 */ +# define CONFIG_PIC32MX_IC5PRIO (INT_ICP_MID_PRIORITY << 2) +#endif +#if CONFIG_PIC32MX_IC5PRIO < 4 +# error "CONFIG_PIC32MX_IC5PRIO is too small" +#endif +#if CONFIG_PIC32MX_IC5PRIO > 31 +# error "CONFIG_PIC32MX_IC5PRIO is too large" +#endif + +#ifndef CONFIG_PIC32MX_OC1PRIO /* Output Compare 1 */ +# define CONFIG_PIC32MX_OC1PRIO (INT_ICP_MID_PRIORITY << 2) +#endif +#if CONFIG_PIC32MX_OC1PRIO < 4 +# error "CONFIG_PIC32MX_OC1PRIO is too small" +#endif +#if CONFIG_PIC32MX_OC1PRIO > 31 +# error "CONFIG_PIC32MX_OC1PRIO is too large" +#endif + +#ifndef CONFIG_PIC32MX_OC2PRIO /* Output Compare 2 */ +# define CONFIG_PIC32MX_OC2PRIO (INT_ICP_MID_PRIORITY << 2) +#endif +#if CONFIG_PIC32MX_OC2PRIO < 4 +# error "CONFIG_PIC32MX_OC2PRIO is too small" +#endif +#if CONFIG_PIC32MX_OC2PRIO > 31 +# error "CONFIG_PIC32MX_OC2PRIO is too large" +#endif + +#ifndef CONFIG_PIC32MX_OC3PRIO /* Output Compare 3 */ +# define CONFIG_PIC32MX_OC3PRIO (INT_ICP_MID_PRIORITY << 2) +#endif +#if CONFIG_PIC32MX_OC3PRIO < 4 +# error "CONFIG_PIC32MX_OC3PRIO is too small" +#endif +#if CONFIG_PIC32MX_OC3PRIO > 31 +# error "CONFIG_PIC32MX_OC3PRIO is too large" +#endif + +#ifndef CONFIG_PIC32MX_OC4PRIO /* Output Compare 4 */ +# define CONFIG_PIC32MX_OC4PRIO (INT_ICP_MID_PRIORITY << 2) +#endif +#if CONFIG_PIC32MX_OC4PRIO < 4 +# error "CONFIG_PIC32MX_OC4PRIO is too small" +#endif +#if CONFIG_PIC32MX_OC4PRIO > 31 +# error "CONFIG_PIC32MX_OC4PRIO is too large" +#endif + +#ifndef CONFIG_PIC32MX_OC5PRIO /* Output Compare 5 */ +# define CONFIG_PIC32MX_OC5PRIO (INT_ICP_MID_PRIORITY << 2) +#endif +#if CONFIG_PIC32MX_OC5PRIO < 4 +# error "CONFIG_PIC32MX_OC5PRIO is too small" +#endif +#if CONFIG_PIC32MX_OC5PRIO > 31 +# error "CONFIG_PIC32MX_OC5PRIO is too large" +#endif + +#ifndef CONFIG_PIC32MX_I2C1PRIO /* I2C 1 */ +# define CONFIG_PIC32MX_I2C1PRIO (INT_ICP_MID_PRIORITY << 2) +#endif +#if CONFIG_PIC32MX_I2C1PRIO < 4 +# error "CONFIG_PIC32MX_I2C1PRIO is too small" +#endif +#if CONFIG_PIC32MX_I2C1PRIO > 31 +# error "CONFIG_PIC32MX_I2C1PRIO is too large" +#endif + +#ifndef CONFIG_PIC32MX_I2C2PRIO /* I2C 2 */ +# define CONFIG_PIC32MX_I2C2PRIO (INT_ICP_MID_PRIORITY << 2) +#endif +#if CONFIG_PIC32MX_I2C2PRIO < 4 +# error "CONFIG_PIC32MX_I2C2PRIO is too small" +#endif +#if CONFIG_PIC32MX_I2C2PRIO > 31 +# error "CONFIG_PIC32MX_I2C2PRIO is too large" +#endif + +#ifndef CONFIG_PIC32MX_SPI1PRIO /* SPI 1 */ +# define CONFIG_PIC32MX_SPI1PRIO (INT_ICP_MID_PRIORITY << 2) +#endif +#if CONFIG_PIC32MX_SPI1PRIO < 4 +# error "CONFIG_PIC32MX_SPI1PRIO is too small" +#endif +#if CONFIG_PIC32MX_SPI1PRIO > 31 +# error "CONFIG_PIC32MX_SPI1PRIO is too large" +#endif + +#ifndef CONFIG_PIC32MX_SPI2PRIO /* SPI 2 */ +# define CONFIG_PIC32MX_SPI2PRIO (INT_ICP_MID_PRIORITY << 2) +#endif +#if CONFIG_PIC32MX_SPI2PRIO < 4 +# error "CONFIG_PIC32MX_SPI2PRIO is too small" +#endif +#if CONFIG_PIC32MX_SPI2PRIO > 31 +# error "CONFIG_PIC32MX_SPI2PRIO is too large" +#endif + +#ifndef CONFIG_PIC32MX_UART1PRIO /* UART 1 */ +# define CONFIG_PIC32MX_UART1PRIO (INT_ICP_MID_PRIORITY << 2) +#endif +#if CONFIG_PIC32MX_UART1PRIO < 4 +# error "CONFIG_PIC32MX_UART1PRIO is too small" +#endif +#if CONFIG_PIC32MX_UART1PRIO > 31 +# error "CONFIG_PIC32MX_UART1PRIO is too large" +#endif + +#ifndef CONFIG_PIC32MX_UART2PRIO /* UART 2 */ +# define CONFIG_PIC32MX_UART2PRIO (INT_ICP_MID_PRIORITY << 2) +#endif +#if CONFIG_PIC32MX_UART2PRIO < 4 +# error "CONFIG_PIC32MX_UART2PRIO is too small" +#endif +#if CONFIG_PIC32MX_UART2PRIO > 31 +# error "CONFIG_PIC32MX_UART2PRIO is too large" +#endif + +#ifndef CONFIG_PIC32MX_CN /* Input Change Interrupt */ +# define CONFIG_PIC32MX_CN (INT_ICP_MID_PRIORITY << 2) +#endif +#if CONFIG_PIC32MX_CN < 4 +# error "CONFIG_PIC32MX_CN is too small" +#endif +#if CONFIG_PIC32MX_CN > 31 +# error "CONFIG_PIC32MX_CN is too large" +#endif + +#ifndef CONFIG_PIC32MX_ADCPRIO /* ADC1 Convert Done */ +# define CONFIG_PIC32MX_ADCPRIO (INT_ICP_MID_PRIORITY << 2) +#endif +#if CONFIG_PIC32MX_ADCPRIO < 4 +# error "CONFIG_PIC32MX_ADCPRIO is too small" +#endif +#if CONFIG_PIC32MX_ADCPRIO > 31 +# error "CONFIG_PIC32MX_ADCPRIO is too large" +#endif + +#ifndef CONFIG_PIC32MX_PMPPRIO /* Parallel Master Port */ +# define CONFIG_PIC32MX_PMPPRIO (INT_ICP_MID_PRIORITY << 2) +#endif +#if CONFIG_PIC32MX_PMPPRIO < 4 +# error "CONFIG_PIC32MX_PMPPRIO is too small" +#endif +#if CONFIG_PIC32MX_PMPPRIO > 31 +# error "CONFIG_PIC32MX_PMPPRIO is too large" +#endif + +#ifndef CONFIG_PIC32MX_CM1PRIO /* Comparator 1 */ +# define CONFIG_PIC32MX_CM1PRIO (INT_ICP_MID_PRIORITY << 2) +#endif +#if CONFIG_PIC32MX_CM1PRIO < 4 +# error "CONFIG_PIC32MX_CM1PRIO is too small" +#endif +#if CONFIG_PIC32MX_CM1PRIO > 31 +# error "CONFIG_PIC32MX_CM1PRIO is too large" +#endif + +#ifndef CONFIG_PIC32MX_CM2PRIO /* Comparator 2 */ +# define CONFIG_PIC32MX_CM2PRIO (INT_ICP_MID_PRIORITY << 2) +#endif +#if CONFIG_PIC32MX_CM2PRIO < 4 +# error "CONFIG_PIC32MX_CM2PRIO is too small" +#endif +#if CONFIG_PIC32MX_CM2PRIO > 31 +# error "CONFIG_PIC32MX_CM2PRIO is too large" +#endif + +#ifndef CONFIG_PIC32MX_FSCMPRIO /* Fail-Safe Clock Monitor */ +# define CONFIG_PIC32MX_FSCMPRIO (INT_ICP_MID_PRIORITY << 2) +#endif +#if CONFIG_PIC32MX_FSCMPRIO < 4 +# error "CONFIG_PIC32MX_FSCMPRIO is too small" +#endif +#if CONFIG_PIC32MX_FSCMPRIO > 31 +# error "CONFIG_PIC32MX_FSCMPRIO is too large" +#endif + +#ifndef CONFIG_PIC32MX_RTCCPRIO /* Real-Time Clock and Calendar */ +# define CONFIG_PIC32MX_RTCCPRIO (INT_ICP_MID_PRIORITY << 2) +#endif +#if CONFIG_PIC32MX_RTCCPRIO < 4 +# error "CONFIG_PIC32MX_RTCCPRIO is too small" +#endif +#if CONFIG_PIC32MX_RTCCPRIO > 31 +# error "CONFIG_PIC32MX_RTCCPRIO is too large" +#endif + +#ifndef CONFIG_PIC32MX_DMA0PRIO /* DMA Channel 0 */ +# define CONFIG_PIC32MX_DMA0PRIO (INT_ICP_MID_PRIORITY << 2) +#endif +#if CONFIG_PIC32MX_DMA0PRIO < 4 +# error "CONFIG_PIC32MX_DMA0PRIO is too small" +#endif +#if CONFIG_PIC32MX_DMA0PRIO > 31 +# error "CONFIG_PIC32MX_DMA0PRIO is too large" +#endif + +#ifndef CONFIG_PIC32MX_DMA1PRIO /* DMA Channel 1 */ +# define CONFIG_PIC32MX_DMA1PRIO (INT_ICP_MID_PRIORITY << 2) +#endif +#if CONFIG_PIC32MX_DMA1PRIO < 4 +# error "CONFIG_PIC32MX_DMA1PRIO is too small" +#endif +#if CONFIG_PIC32MX_DMA1PRIO > 31 +# error "CONFIG_PIC32MX_DMA1PRIO is too large" +#endif + +#ifndef CONFIG_PIC32MX_DMA2PRIO /* DMA Channel 2 */ +# define CONFIG_PIC32MX_DMA2PRIO (INT_ICP_MID_PRIORITY << 2) +#endif +#if CONFIG_PIC32MX_DMA2PRIO < 4 +# error "CONFIG_PIC32MX_DMA2PRIO is too small" +#endif +#if CONFIG_PIC32MX_DMA2PRIO > 31 +# error "CONFIG_PIC32MX_DMA2PRIO is too large" +#endif + +#ifndef CONFIG_PIC32MX_DMA3PRIO /* DMA Channel 3 */ +# define CONFIG_PIC32MX_DMA3PRIO (INT_ICP_MID_PRIORITY << 2) +#endif +#if CONFIG_PIC32MX_DMA3PRIO < 4 +# error "CONFIG_PIC32MX_DMA3PRIO is too small" +#endif +#if CONFIG_PIC32MX_DMA3PRIO > 31 +# error "CONFIG_PIC32MX_DMA3PRIO is too large" +#endif + +#ifndef CONFIG_PIC32MX_FCEPRIO /* Flash Control Event */ +# define CONFIG_PIC32MX_FCEPRIO (INT_ICP_MID_PRIORITY << 2) +#endif +#if CONFIG_PIC32MX_FCEPRIO < 4 +# error "CONFIG_PIC32MX_FCEPRIO is too small" +#endif +#if CONFIG_PIC32MX_FCEPRIO > 31 +# error "CONFIG_PIC32MX_FCEPRIO is too large" +#endif + +#ifndef CONFIG_PIC32MX_USBPRIO /* USB */ +# define CONFIG_PIC32MX_USBPRIO (INT_ICP_MID_PRIORITY << 2) +#endif +#if CONFIG_PIC32MX_USBPRIO < 4 +# error "CONFIG_PIC32MX_USBPRIO is too small" +#endif +#if CONFIG_PIC32MX_USBPRIO > 31 +# error "CONFIG_PIC32MX_USBPRIO is too large" +#endif + +/* SYS calls ************************************************************************/ +/* SYS call 0 and 1 are defined for internal use by the PIC32MX port (see + * arch/mips/include/mips32/syscall.h + */ + +#ifdef CONFIG_NUTTX_KERNEL +# if !defined(CONFIG_SYS_RESERVED) || CONFIG_SYS_RESERVED < 2 +# error "CONFIG_SYS_RESERVED must be defined to be 2 for a kernel build" +# elif CONFIG_SYS_RESERVED > 2 +# warning "CONFIG_SYS_RESERVED should be defined to be 2 for a kernel build" +# endif +#endif + +/* UARTs ****************************************************************************/ +/* Don't enable UARTs not supported by the chip. */ + +#if CHIP_NUARTS < 1 +# undef CONFIG_PIC32MX_UART1 +# undef CONFIG_PIC32MX_UART2 +# undef CONFIG_PIC32MX_UART3 +# undef CONFIG_PIC32MX_UART4 +# undef CONFIG_PIC32MX_UART5 +# undef CONFIG_PIC32MX_UART6 +#elif CHIP_NUARTS < 2 +# undef CONFIG_PIC32MX_UART2 +# undef CONFIG_PIC32MX_UART3 +# undef CONFIG_PIC32MX_UART4 +# undef CONFIG_PIC32MX_UART5 +# undef CONFIG_PIC32MX_UART6 +#elif CHIP_NUARTS < 3 +# undef CONFIG_PIC32MX_UART3 +# undef CONFIG_PIC32MX_UART4 +# undef CONFIG_PIC32MX_UART5 +# undef CONFIG_PIC32MX_UART6 +#elif CHIP_NUARTS < 4 +# undef CONFIG_PIC32MX_UART4 +# undef CONFIG_PIC32MX_UART5 +# undef CONFIG_PIC32MX_UART6 +#elif CHIP_NUARTS < 5 +# undef CONFIG_PIC32MX_UART5 +# undef CONFIG_PIC32MX_UART6 +#elif CHIP_NUARTS < 6 +# undef CONFIG_PIC32MX_UART6 +#endif + +/* Are any UARTs enabled? */ + +#undef HAVE_UART_DEVICE +#if defined(CONFIG_PIC32MX_UART1) || defined(CONFIG_PIC32MX_UART2) || \ + defined(CONFIG_PIC32MX_UART4) || defined(CONFIG_PIC32MX_UART4) || \ + defined(CONFIG_PIC32MX_UART5) || defined(CONFIG_PIC32MX_UART6) +# define HAVE_UART_DEVICE 1 +#endif + +/* Is there a serial console? There should be at most one defined. It + * could be on any UARTn, n=1,.. CHIP_NUARTS + */ + +#if defined(CONFIG_UART1_SERIAL_CONSOLE) && defined(CONFIG_PIC32MX_UART1) +# undef CONFIG_UART2_SERIAL_CONSOLE +# undef CONFIG_UART3_SERIAL_CONSOLE +# undef CONFIG_UART4_SERIAL_CONSOLE +# undef CONFIG_UART5_SERIAL_CONSOLE +# undef CONFIG_UART6_SERIAL_CONSOLE +# define HAVE_SERIAL_CONSOLE 1 +#elif defined(CONFIG_UART2_SERIAL_CONSOLE) && defined(CONFIG_PIC32MX_UART2) +# undef CONFIG_UART1_SERIAL_CONSOLE +# undef CONFIG_UART3_SERIAL_CONSOLE +# undef CONFIG_UART4_SERIAL_CONSOLE +# undef CONFIG_UART5_SERIAL_CONSOLE +# undef CONFIG_UART6_SERIAL_CONSOLE +# define HAVE_SERIAL_CONSOLE 1 +#elif defined(CONFIG_UART3_SERIAL_CONSOLE) && defined(CONFIG_PIC32MX_UART3) +# undef CONFIG_UART1_SERIAL_CONSOLE +# undef CONFIG_UART2_SERIAL_CONSOLE +# undef CONFIG_UART4_SERIAL_CONSOLE +# undef CONFIG_UART5_SERIAL_CONSOLE +# undef CONFIG_UART6_SERIAL_CONSOLE +# define HAVE_SERIAL_CONSOLE 1 +#elif defined(CONFIG_UART4_SERIAL_CONSOLE) && defined(CONFIG_PIC32MX_UART4) +# undef CONFIG_UART1_SERIAL_CONSOLE +# undef CONFIG_UART2_SERIAL_CONSOLE +# undef CONFIG_UART3_SERIAL_CONSOLE +# undef CONFIG_UART5_SERIAL_CONSOLE +# undef CONFIG_UART6_SERIAL_CONSOLE +# define HAVE_SERIAL_CONSOLE 1 +#elif defined(CONFIG_UART5_SERIAL_CONSOLE) && defined(CONFIG_PIC32MX_UART5) +# undef CONFIG_UART1_SERIAL_CONSOLE +# undef CONFIG_UART2_SERIAL_CONSOLE +# undef CONFIG_UART3_SERIAL_CONSOLE +# undef CONFIG_UART4_SERIAL_CONSOLE +# undef CONFIG_UART6_SERIAL_CONSOLE +# define HAVE_SERIAL_CONSOLE 1 +#elif defined(CONFIG_UART6_SERIAL_CONSOLE) && defined(CONFIG_PIC32MX_UART6) +# undef CONFIG_UART1_SERIAL_CONSOLE +# undef CONFIG_UART2_SERIAL_CONSOLE +# undef CONFIG_UART3_SERIAL_CONSOLE +# undef CONFIG_UART4_SERIAL_CONSOLE +# undef CONFIG_UART5_SERIAL_CONSOLE +# define HAVE_SERIAL_CONSOLE 1 +#else +# undef CONFIG_UART1_SERIAL_CONSOLE +# undef CONFIG_UART2_SERIAL_CONSOLE +# undef CONFIG_UART3_SERIAL_CONSOLE +# undef CONFIG_UART4_SERIAL_CONSOLE +# undef CONFIG_UART5_SERIAL_CONSOLE +# undef CONFIG_UART6_SERIAL_CONSOLE +# undef HAVE_SERIAL_CONSOLE +#endif + +/* Device Configuration *************************************************************/ +/* DEVCFG3 */ + +#ifndef CONFIG_PIC32MX_USERID /* User ID */ +# define CONFIG_PIC32MX_USERID 0x584e /* "NutX" */ +#endif + +#ifndef CONFIG_PIC32MX_SRSSEL /* Shadow register interrupt priority */ +# define CONFIG_PIC32MX_SRSSEL INT_ICP_MIN_PRIORITY +#endif + +/* Unless overridden in the .config file, all pins are in the default setting */ + +#ifndef CONFIG_PIC32MX_FMIIEN /* Ethernet MII enable */ +# define CONFIG_PIC32MX_FMIIEN 1 /* MII enabled */ +#endif + +#ifndef CONFIG_PIC32MX_FETHIO /* SCM1 pin C selection */ +# define CONFIG_PIC32MX_FETHIO 1 /* Default Ethernet I/O Pins */ +#endif + +#ifndef CONFIG_PIC32MX_FCANIO /* SCM1 pin C selection */ +# define CONFIG_PIC32MX_FCANIO 1 /* Default CAN I/O Pins */ +#endif + +#ifndef CONFIG_PIC32MX_FSCM1IO /* SCM1 pin C selection */ +# define CONFIG_PIC32MX_FSCM1IO 1 /* Default pin for SCM1C */ +#endif + +/* USB or Ports? */ + +#ifdef CONFIG_PIC32MX_USB +# ifndef CONFIG_PIC32MX_USBIDO /* USB USBID Selection */ +# define CONFIG_PIC32MX_USBIDO 1 /* USBID pin is controlled by the USB module */ +# endif +# ifndef CONFIG_PIC32MX_VBUSIO /* USB VBUSON Selection */ +# define CONFIG_PIC32MX_VBUSIO 1 /* VBUSON pin is controlled by the USB module */ +# endif +#else +# ifndef CONFIG_PIC32MX_USBIDO /* USB USBID Selection */ +# define CONFIG_PIC32MX_USBIDO 0 /* USBID pin is controlled by the Port function */ +# endif +# ifndef CONFIG_PIC32MX_VBUSIO /* USB VBUSON Selection */ +# define CONFIG_PIC32MX_VBUSIO 0 /* VBUSON pin is controlled by the Port function */ +# endif +#endif + +/* DEVCFG2 */ + +#undef CONFIG_PIC32MX_PLLIDIV +#if BOARD_PLL_IDIV == 1 +# define CONFIG_PIC32MX_PLLIDIV DEVCFG2_FPLLIDIV_DIV1 +#elif BOARD_PLL_IDIV == 2 +# define CONFIG_PIC32MX_PLLIDIV DEVCFG2_FPLLIDIV_DIV2 +#elif BOARD_PLL_IDIV == 3 +# define CONFIG_PIC32MX_PLLIDIV DEVCFG2_FPLLIDIV_DIV3 +#elif BOARD_PLL_IDIV == 4 +# define CONFIG_PIC32MX_PLLIDIV DEVCFG2_FPLLIDIV_DIV4 +#elif BOARD_PLL_IDIV == 5 +# define CONFIG_PIC32MX_PLLIDIV DEVCFG2_FPLLIDIV_DIV5 +#elif BOARD_PLL_IDIV == 6 +# define CONFIG_PIC32MX_PLLIDIV DEVCFG2_FPLLIDIV_DIV6 +#elif BOARD_PLL_IDIV == 10 +# define CONFIG_PIC32MX_PLLIDIV DEVCFG2_FPLLIDIV_DIV10 +#elif BOARD_PLL_IDIV == 12 +# define CONFIG_PIC32MX_PLLIDIV DEVCFG2_FPLLIDIV_DIV12 +#else +# error "Unsupported BOARD_PLL_IDIV" +#endif + +#undef CONFIG_PIC32MX_PLLMULT +#if BOARD_PLL_MULT == 15 +# define CONFIG_PIC32MX_PLLMULT DEVCFG2_FPLLMULT_MUL15 +#elif BOARD_PLL_MULT == 16 +# define CONFIG_PIC32MX_PLLMULT DEVCFG2_FPLLMULT_MUL16 +#elif BOARD_PLL_MULT == 17 +# define CONFIG_PIC32MX_PLLMULT DEVCFG2_FPLLMULT_MUL17 +#elif BOARD_PLL_MULT == 18 +# define CONFIG_PIC32MX_PLLMULT DEVCFG2_FPLLMULT_MUL18 +#elif BOARD_PLL_MULT == 19 +# define CONFIG_PIC32MX_PLLMULT DEVCFG2_FPLLMULT_MUL19 +#elif BOARD_PLL_MULT == 20 +# define CONFIG_PIC32MX_PLLMULT DEVCFG2_FPLLMULT_MUL20 +#elif BOARD_PLL_MULT == 21 +# define CONFIG_PIC32MX_PLLMULT DEVCFG2_FPLLMULT_MUL21 +#elif BOARD_PLL_MULT == 24 +# define CONFIG_PIC32MX_PLLMULT DEVCFG2_FPLLMULT_MUL24 +#else +# error "Unsupported BOARD_PLL_MULT" +#endif + +#undef CONFIG_PIC32MX_UPLLIDIV +#if BOARD_UPLL_IDIV == 1 +# define CONFIG_PIC32MX_UPLLIDIV DEVCFG2_FUPLLIDIV_DIV1 +#elif BOARD_UPLL_IDIV == 2 +# define CONFIG_PIC32MX_UPLLIDIV DEVCFG2_FUPLLIDIV_DIV2 +#elif BOARD_UPLL_IDIV == 3 +# define CONFIG_PIC32MX_UPLLIDIV DEVCFG2_FUPLLIDIV_DIV3 +#elif BOARD_UPLL_IDIV == 4 +# define CONFIG_PIC32MX_UPLLIDIV DEVCFG2_FUPLLIDIV_DIV4 +#elif BOARD_UPLL_IDIV == 5 +# define CONFIG_PIC32MX_UPLLIDIV DEVCFG2_FUPLLIDIV_DIV5 +#elif BOARD_UPLL_IDIV == 6 +# define CONFIG_PIC32MX_UPLLIDIV DEVCFG2_FUPLLIDIV_DIV6 +#elif BOARD_UPLL_IDIV == 10 +# define CONFIG_PIC32MX_UPLLIDIV DEVCFG2_FUPLLIDIV_DIV10 +#elif BOARD_UPLL_IDIV == 12 +# define CONFIG_PIC32MX_UPLLIDIV DEVCFG2_FUPLLIDIV_DIV12 +#else +# error "Unsupported BOARD_UPLL_IDIV" +#endif + +#undef CONFIG_PIC32MX_PLLODIV +#if BOARD_PLL_ODIV == 1 +# define CONFIG_PIC32MX_PLLODIV DEVCFG2_FPLLODIV_DIV1 +#elif BOARD_PLL_ODIV == 2 +# define CONFIG_PIC32MX_PLLODIV DEVCFG2_FPLLODIV_DIV2 +#elif BOARD_PLL_ODIV == 4 +# define CONFIG_PIC32MX_PLLODIV DEVCFG2_FPLLODIV_DIV2 +#elif BOARD_PLL_ODIV == 8 +# define CONFIG_PIC32MX_PLLODIV DEVCFG2_FPLLODIV_DIV2 +#elif BOARD_PLL_ODIV == 16 +# define CONFIG_PIC32MX_PLLODIV DEVCFG2_FPLLODIV_DIV2 +#elif BOARD_PLL_ODIV == 32 +# define CONFIG_PIC32MX_PLLODIV DEVCFG2_FPLLODIV_DIV2 +#elif BOARD_PLL_ODIV == 64 +# define CONFIG_PIC32MX_PLLODIV DEVCFG2_FPLLODIV_DIV2 +#elif BOARD_PLL_ODIV == 128 +# define CONFIG_PIC32MX_PLLODIV DEVCFG2_FPLLODIV_DIV2 +#else +# error "Unsupported BOARD_PLL_ODIV" +#endif + +/* DEVCFG1 */ + +#undef CONFIG_PIC32MX_PBDIV +#if BOARD_PBDIV == 1 +# define CONFIG_PIC32MX_PBDIV DEVCFG1_FPBDIV_DIV1 +#elif BOARD_PBDIV == 2 +# define CONFIG_PIC32MX_PBDIV DEVCFG1_FPBDIV_DIV2 +#elif BOARD_PBDIV == 4 +# define CONFIG_PIC32MX_PBDIV DEVCFG1_FPBDIV_DIV4 +#elif BOARD_PBDIV == 8 +# define CONFIG_PIC32MX_PBDIV DEVCFG1_FPBDIV_DIV8 +#else +# error "Unsupported BOARD_PBDIV" +#endif + +#undef CONFIG_PIC32MX_WDPS +#if BOARD_WD_PRESCALER == 1 +# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_1 +#elif BOARD_WD_PRESCALER == 2 +# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_2 +#elif BOARD_WD_PRESCALER == 4 +# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_4 +#elif BOARD_WD_PRESCALER == 8 +# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_8 +#elif BOARD_WD_PRESCALER == 16 +# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_16 +#elif BOARD_WD_PRESCALER == 32 +# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_32 +#elif BOARD_WD_PRESCALER == 64 +# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_64 +#elif BOARD_WD_PRESCALER == 128 +# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_128 +#elif BOARD_WD_PRESCALER == 256 +# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_256 +#elif BOARD_WD_PRESCALER == 512 +# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_512 +#elif BOARD_WD_PRESCALER == 1024 +# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_1024 +#elif BOARD_WD_PRESCALER == 2048 +# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_2048 +#elif BOARD_WD_PRESCALER == 4096 +# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_4096 +#elif BOARD_WD_PRESCALER == 8192 +# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_8192 +#elif BOARD_WD_PRESCALER == 16384 +# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_16384 +#elif BOARD_WD_PRESCALER == 32768 +# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_32768 +#elif BOARD_WD_PRESCALER == 65536 +# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_65536 +#elif BOARD_WD_PRESCALER == 131072 +# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_131072 +#elif BOARD_WD_PRESCALER == 262144 +# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_262144 +#elif BOARD_WD_PRESCALER == 524288 +# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_524288 +#elif BOARD_WD_PRESCALER == 1048576 +# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_1048576 +#else +# error "Unsupported BOARD_WD_PRESCALER" +#endif + +#undef CONFIG_PIC32MX_WDENABLE +#if BOARD_WD_ENABLE +# define CONFIG_PIC32MX_WDENABLE DEVCFG1_FWDTEN +#else +# define CONFIG_PIC32MX_WDENABLE 0 +#endif + +/* DEVCFG0 */ + +#ifndef CONFIG_PIC32MX_DEBUGGER /* Background Debugger Enable */ +# define CONFIG_PIC32MX_DEBUGGER 3 /* disabled */ +#endif + +#ifndef CONFIG_PIC32MX_ICESEL /* In-Circuit Emulator/Debugger Communication Channel Select */ +# define CONFIG_PIC32MX_ICESEL 1 /* default */ +#endif + +#ifndef CONFIG_PIC32MX_PROGFLASHWP /* Program FLASH write protect */ +# define CONFIG_PIC32MX_PROGFLASHWP 0xff /* Disabled */ +#endif + +#ifndef CONFIG_PIC32MX_BOOTFLASHWP +# define CONFIG_PIC32MX_BOOTFLASHWP 1 /* Disabled */ +#endif + +#ifndef CONFIG_PIC32MX_CODEWP +# define CONFIG_PIC32MX_CODEWP 1 /* Disabled */ +#endif + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +/************************************************************************************ + * Inline Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +#endif /* __ARCH_MIPS_SRC_PIC32MX_PIC32MX_PIC32_H */ diff --git a/nuttx/arch/mips/src/pic32mx/pic32mx-lowconsole.c b/nuttx/arch/mips/src/pic32mx/pic32mx-lowconsole.c index c94d7fd99..c6452e2b3 100644 --- a/nuttx/arch/mips/src/pic32mx/pic32mx-lowconsole.c +++ b/nuttx/arch/mips/src/pic32mx/pic32mx-lowconsole.c @@ -243,8 +243,21 @@ void pic32mx_uartconfigure(uintptr_t uart_base, uint32_t baudrate, UART_MODE_RXINV | UART_MODE_WAKE | UART_MODE_LPBACK | UART_MODE_UEN_MASK | UART_MODE_RTSMD | UART_MODE_IREN | UART_MODE_SIDL | UART_MODE_ON); + + /* Configure the FIFOs: + * + * RX: Interrupt at 6 of 8 (for 8-deep FIFO) or 3 o 4 (4-deep FIFO) + * TX: Interrupt on FIFO not full + * Invert transmit polarity. + */ + +#ifdef UART_STA_URXISEL_RXB6 pic32mx_putreg(uart_base, PIC32MX_UART_STACLR_OFFSET, - UART_STA_UTXINV | UART_STA_UTXISEL_MASK | UART_STA_URXISEL_RXBF); + UART_STA_UTXINV | UART_STA_UTXISEL_TXBNF | UART_STA_URXISEL_RXB6); +#else + pic32mx_putreg(uart_base, PIC32MX_UART_STACLR_OFFSET, + UART_STA_UTXINV | UART_STA_UTXISEL_TXBNF | UART_STA_URXISEL_RXB3); +#endif /* Configure the FIFO interrupts */ diff --git a/nuttx/configs/pcblogic-pic32mx/include/board.h b/nuttx/configs/pcblogic-pic32mx/include/board.h index ff8b0f65a..839d3108c 100644 --- a/nuttx/configs/pcblogic-pic32mx/include/board.h +++ b/nuttx/configs/pcblogic-pic32mx/include/board.h @@ -3,7 +3,7 @@ * include/arch/board/board.h * * Copyright (C) 2011 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -69,7 +69,7 @@ */ #define BOARD_UPLL_IDIV 2 /* USB PLL divider (revisit) */ -#define BOARD_USB_CLOCK 48000000 /* USB clock (8MHz / (2*48MHz/24)) */ +#define BOARD_USB_CLOCK 48000000 /* USB clock (8MHz / 2) * 24 / 2) */ /* Peripheral clock is divided down from CPU clock. * PBCLOCK = CPU_CLOCK / PBDIV diff --git a/nuttx/configs/pic32-starterkit/README.txt b/nuttx/configs/pic32-starterkit/README.txt index b0bf948b8..0f53dc3d9 100644 --- a/nuttx/configs/pic32-starterkit/README.txt +++ b/nuttx/configs/pic32-starterkit/README.txt @@ -57,9 +57,10 @@ Contents PIC32MX795F512L Pin Out ======================= - LEFT SIDE, TOP-TO-BOTTOM (if pin 1 is in upper left) -PIN CONFIGURATIONS SIGNAL NAME - (Table 1-1) (User Guide) +LEFT SIDE, TOP-TO-BOTTOM (if pin 1 is in upper left) +--- ---------------------------------- -------------------------- ----------------------------------------------- +PIN CONFIGURATIONS SIGNAL NAME ON-BOARD CONNECTIONS + (Family Data Sheet Table 1-1) (Starter Kit User Guide) --- ---------------------------------- -------------------------- ----------------------------------------------- 1 RG15/AERXERR ERXERR Ethernet RX_ER/MDIX_IN 2 VDD P32_VDD --- @@ -106,9 +107,10 @@ PIN CONFIGURATIONS SIGNAL NAME 24 AN1/CN3/PGEC1/RB1 PGC1/AN1/CN3/RB1 J2 pin 70 (A/D) 25 AN0/CN2/PGED1/RB0 PGD1/AN0/CN2/RB0 J2 pin 72 (A/D) - BOTTOM SIDE, LEFT-TO-RIGHT (if pin 1 is in upper left) -PIN CONFIGURATIONS SIGNAL NAME - (Table 1-1) (User Guide) +BOTTOM SIDE, LEFT-TO-RIGHT (if pin 1 is in upper left) +--- ---------------------------------- -------------------------- ----------------------------------------------- +PIN CONFIGURATIONS SIGNAL NAME ON-BOARD CONNECTIONS + (Family Data Sheet Table 1-1) (Starter Kit User Guide) --- ---------------------------------- -------------------------- ----------------------------------------------- 26 AN6/OCFA/PGEC2/RB6 PIC32_PGC2 PIC32MX440F512H debug processor J2 pin 128 (ICSP) @@ -130,7 +132,7 @@ PIN CONFIGURATIONS SIGNAL NAME 38 RA1/TCK TCK/RA1 PIC32MX440F512H debug processor J2 pin 124 (JTAG/GPIO) 39 AC1TX/RF13/SCK4/U2RTS/U5TX SCM3D/BCLK2/RF13 J2 pin 106 (UART2) - 40 AC1RX/RF12/SS4/U2CTS/U5RX SCM3C/FR12 J2 pin 108 (UART2) + 40 AC1RX/RF12/SS4/U2CTS/U5RX SCM3C/RF12 J2 pin 108 (UART2) 41 PMA11/AECRS/AN12/ERXD0/RB12 PMPA11/AN12/RB12 J2 pin 105 (PMP address) 42 PMA10/AECOL/AN13/ERXD1/RB13 PMPA10/AN13/RB13 J2 pin 107 (PMP address) 43 PMA1/AETXD3/AN14/ERXD2/PMALH/RB14 PMPA1/AN14/RB14 J2 pin 127 (PMP address) @@ -145,9 +147,10 @@ PIN CONFIGURATIONS SIGNAL NAME 50 PMA8/CN18/RF5/SCL5/SDO4/U2TX PMPA8/SCM3B/CN18/RF5 J2 pin 111 (PMP address) J2 pin 112 (UART2) - RIGHT SIDE, TOP-TO-BOTTOM (if pin 1 is in upper left) -PIN CONFIGURATIONS SIGNAL NAME - (Table 1-1) (User Guide) +RIGHT SIDE, TOP-TO-BOTTOM (if pin 1 is in upper left) +--- ---------------------------------- -------------------------- ----------------------------------------------- +PIN CONFIGURATIONS SIGNAL NAME ON-BOARD CONNECTIONS + (Family Data Sheet Table 1-1) (Starter Kit User Guide) --- ---------------------------------- -------------------------- ----------------------------------------------- 75 VSS (grounded) 74 CN0/RC14/SOSCO/T1CK SOSC0/T1CK/CN0/RC14 32kHz Oscillator, J2 pin (timer) @@ -157,7 +160,7 @@ PIN CONFIGURATIONS SIGNAL NAME 72 OC1/INT0/RD0/SDO1 SDO1/INT0/OC1/RD0 User LED D4 (high illuminates) J2 pin 87 (EXT_INT) J2 pin 95 (SPI1) - J2 pin 46 (OC/PWN_ + J2 pin 46 (OC/PWM) 71 PMA14/AEMDC/EMDC/IC4/PMCS1/RD11 EMDC Ethernet MDC 70 PMA15/IC3/PMCS2/RD10/SCK1 SCK1/IC3/PMPCS2/RD10 J2 pin 29 (PMP control) J2 pin 91 (SPI1) @@ -183,9 +186,10 @@ PIN CONFIGURATIONS SIGNAL NAME 52 RF2/SDA3/SDI3/U1RX SCM1A/RF2 J2 pin 88 (UART1) 51 RF3/USBID USBID/RF3 Device OTG port (J5) - TOP SIDE, LEFT-TO-RIGHT (if pin 1 is in upper left) -PIN CONFIGURATIONS SIGNAL NAME - (Table 1-1) (User Guide) +TOP SIDE, LEFT-TO-RIGHT (if pin 1 is in upper left) +--- ---------------------------------- -------------------------- ----------------------------------------------- +PIN CONFIGURATIONS SIGNAL NAME ON-BOARD CONNECTIONS + (Family Data Sheet Table 1-1) (Starter Kit User Guide) --- ---------------------------------- -------------------------- ----------------------------------------------- 100 PMD4/RE4 PMPD4/RE4 J2 pin 15 (PMP data) 99 PMD3/RE3 PMPD3/RE3 J2 pin 17 (PMP data) @@ -223,6 +227,99 @@ PIN CONFIGURATIONS SIGNAL NAME MEB Connector ============= +PIC32 SIGNAL PIN CONNECTION +-------------------------- ------- ---------------------------------- +PMPD0 pin 23 Graphics Controller (SSD1926) +PMPD1 pin 21 8-bit or 16-bit Data Bus +PMPD2 pin 19 +PMPD3 pin 17 +PMPD4 pin 15 +PMPD6 pin 9 +PMPD7 pin 7 +-------------------------- ------- ---------------------------------- +PMPD8 pin 10 Graphics Controller (SSD1926) +PMPD9 pin 14 16-bit Data Bus +PMPD10 pin 16 +PMPD11 pin 18 +PMPD12 pin 20 +PMPD13 pin 22 +PMPD14 pin 24 +PMPD15 pin 26 +-------------------------- ------- ---------------------------------- + Graphics Controller (SSD1926) +RG13 pin 8 Chip select +RB10 pin 101 Register select +RC3 pin 39 Wait line +RA10 pin 115 Reset (see MRF24WBOMA and PICtail) +-------------------------- ------- ---------------------------------- + Touchscreen +RB11 pin 103 X+ +RB12 pin 105 Y- +RB13 pin 107 X- +RB14 pin 127 Y+ +-------------------------- ------- ---------------------------------- + Joystick +CN2/RB0 pin 72 Left +CN3/RB1 pin 70 Up +CN5/RB3 pin 66 Down +CN6/RB4 pin 64 Right +CN12/RB15 pin 36 Fire +-------------------------- ------- ---------------------------------- + LEDs +RD1 pin 44 LED1 +RD2 pin 42 LED2 +RD3 pin 40 LED3 +RC1 pin 35 LED4 +RC2 pin 37 LED5 +-------------------------- ------- ---------------------------------- +SDA2 pin 74 I2C2 bus for BMA150, MCHP24LC08 +SCL2 pin 76 and WM8731 (see also MRF24WBOMA) +-------------------------- ------- ---------------------------------- +SCK1 pin 91 SPI1 bus for WM8731 +SDI1 pin 93 +SDO1 pin 95 +-------------------------- ------- ---------------------------------- +RA6 pin 4 CPLD +RA7 pin 6 +RG12 pin 5 +RG14 pin 3 +SCK2 pin 45 (see MRF24WBOMA) +SDI2 pin 47 (see MRF24WBOMA) +SDO2 pin 49 (see MRF24WBOMA) +RG9 pin 51 (see MRF24WBOMA) +SCK3A pin 106 (see PICtail) +SDI3A pin 110 (see PICtail) +SDO3A pin 112 (see PICtail) +RF12 pin 108 (see PICtail) +~SSI pin 97 (see PICtail) +RD9 pin 54 +-------------------------- ------- ---------------------------------- +INT3 pin 81 MRF24WBOMA +RA10 pin 115 (also Graphics Controller and PICtail) +RB8 pin 71 +-------------------------- ------- ---------------------------------- + PICtail J5 +SDA2 pin 74 I2C2 bus (see above) +SCL2 pin 76 I2C2 bus (see above) +SCK2 pin 45 (see CPLD) +SDI2 pin 47 (see CPLD) +SDO2 pin 49 (see CPLD) +RG9 pin 51 (see CPLD) +U1RX pin 88 +U1TX pin 90 +~U1RTS pin 92 +~U1CTS pin 94 +RB9 pin 73 +RA10 pin 115 Reset (see Graphics controller and MRF24WBOMA) +INT1 pin 85 +SCL1 pin 84 +SDA1 pin 86 (see CPLD) +~SSI pin 97 (see CPLD) +U2RX pin 110 (see CPLD) +U2TX pin 112 (see CPLD) +~U2RTS pin 106 (see CPLD) +~U2CTS pin 108 (see CPLD) + Toolchains ========== diff --git a/nuttx/configs/pic32-starterkit/include/board.h b/nuttx/configs/pic32-starterkit/include/board.h index 8df81b4b9..d5f71f97a 100644 --- a/nuttx/configs/pic32-starterkit/include/board.h +++ b/nuttx/configs/pic32-starterkit/include/board.h @@ -51,32 +51,32 @@ /* Clocking *****************************************************************/ /* Crystal frequencies */ -#define BOARD_POSC_FREQ 20000000 /* Primary OSC XTAL frequency (20MHz) */ -#define BOARD_SOSC_FREQ 32768 /* Secondary OSC XTAL frequency (32.768KHz) */ +#define BOARD_POSC_FREQ 8000000 /* Primary OSC XTAL frequency (8MHz) */ +#define BOARD_SOSC_FREQ 32768 /* Secondary OSC XTAL frequency (32.768KHz) */ /* PLL configuration and resulting CPU clock. * CPU_CLOCK = ((POSC_FREQ / IDIV) * MULT) / ODIV */ -#define BOARD_PLL_IDIV 5 /* PLL input divider */ -#define BOARD_PLL_MULT 15 /* PLL multiplier */ -#define BOARD_PLL_ODIV 1 /* PLL output divider */ +#define BOARD_PLL_IDIV 2 /* PLL input divider */ +#define BOARD_PLL_MULT 20 /* PLL multiplier */ +#define BOARD_PLL_ODIV 1 /* PLL output divider */ -#define BOARD_CPU_CLOCK 60000000 /* CPU clock (60MHz = (20MHz / 5) * 15 / 1) */ +#define BOARD_CPU_CLOCK 80000000 /* CPU clock (80MHz = 8MHz * 20 / 2) */ /* USB PLL configuration. * USB_CLOCK = ((POSC_XTAL / IDIV) * 24) / 2 */ -#define BOARD_UPLL_IDIV 5 /* USB PLL divider */ -#define BOARD_USB_CLOCK 48000000 /* USB clock ((20MHz / 5) * 24) */ +#define BOARD_UPLL_IDIV 2 /* USB PLL divider (revisit) */ +#define BOARD_USB_CLOCK 48000000 /* USB clock (8MHz / 2) * 24 / 2) */ -/* Peripheral clock is *not* divided down from CPU clock. +/* Peripheral clock is divided down from CPU clock. * PBCLOCK = CPU_CLOCK / PBDIV */ -#define BOARD_PBDIV 1 /* Peripheral clock divisor (PBDIV) */ -#define BOARD_PBCLOCK 60000000 /* Peripheral clock (PBCLK = 60MHz/1) */ +#define BOARD_PBDIV 2 /* Peripheral clock divisor (PBDIV) */ +#define BOARD_PBCLOCK 40000000 /* Peripheral clock (PBCLK = 80MHz/2) */ /* Watchdog pre-scaler (re-visit) */ diff --git a/nuttx/configs/pic32-starterkit/ostest/defconfig b/nuttx/configs/pic32-starterkit/ostest/defconfig index 1f3ca99c1..7ba611559 100644 --- a/nuttx/configs/pic32-starterkit/ostest/defconfig +++ b/nuttx/configs/pic32-starterkit/ostest/defconfig @@ -124,6 +124,10 @@ CONFIG_PIC32MX_I2C2=n CONFIG_PIC32MX_SPI2=n CONFIG_PIC32MX_UART1=n CONFIG_PIC32MX_UART2=y +CONFIG_PIC32MX_UART3=n +CONFIG_PIC32MX_UART4=n +CONFIG_PIC32MX_UART5=n +CONFIG_PIC32MX_UART6=n CONFIG_PIC32MX_PMP=n CONFIG_PIC32MX_ADC=n CONFIG_PIC32MX_CVR=n diff --git a/nuttx/configs/sure-pic32mx/include/board.h b/nuttx/configs/sure-pic32mx/include/board.h index cc33a6df0..ae850de46 100644 --- a/nuttx/configs/sure-pic32mx/include/board.h +++ b/nuttx/configs/sure-pic32mx/include/board.h @@ -3,7 +3,7 @@ * include/arch/board/board.h * * Copyright (C) 2011 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -69,7 +69,7 @@ */ #define BOARD_UPLL_IDIV 5 /* USB PLL divider */ -#define BOARD_USB_CLOCK 48000000 /* USB clock ((20MHz / 5) * 24) */ +#define BOARD_USB_CLOCK 48000000 /* USB clock ((20MHz / 5) * 24) / 2 */ /* Peripheral clock is *not* divided down from CPU clock. * PBCLOCK = CPU_CLOCK / PBDIV