phone-side
/
nuttx-bb
9
0
Fork 0
Code Releases Activity

Update some recent Tiva changes so that old LM3S parts at least still build (but have not been retested)

This commit is contained in:
Gregory Nutt 2015-03-23 11:21:26 -06:00
parent 2a7dfd3f25
commit ad6c69e6ed
2 changed files with 23 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
nuttx/arch/arm/src/tiva/chip/lm3s_memorymap.h
View File

@ -129,7 +129,7 @@
# define TIVA_TIMER2_BASE (TIVA_PERIPH_BASE + 0x32000) /* -0x32fff: Timer 2 */
# define TIVA_TIMER3_BASE (TIVA_PERIPH_BASE + 0x33000) /* -0x33fff: Timer 3 */
/* -0x37fff: Reserved */
# define TIVA_ADC_BASE (TIVA_PERIPH_BASE + 0x38000) /* -0x38fff: ADC */
# define TIVA_ADC0_BASE (TIVA_PERIPH_BASE + 0x38000) /* -0x38fff: ADC */
/* -0x3bfff: Reserved */
# define TIVA_CMP_BASE (TIVA_PERIPH_BASE + 0x3c000) /* -0x3cfff: Analog Comparators */
/* -0x47fff: Reserved */
@ -167,7 +167,7 @@
# define TIVA_TIMER1_BASE (TIVA_PERIPH_BASE + 0x31000) /* -0x31fff: Timer 1 */
# define TIVA_TIMER2_BASE (TIVA_PERIPH_BASE + 0x32000) /* -0x32fff: Timer 2 */
/* -0x37fff: Reserved */
# define TIVA_ADC_BASE (TIVA_PERIPH_BASE + 0x38000) /* -0x38fff: ADC */
# define TIVA_ADC0_BASE (TIVA_PERIPH_BASE + 0x38000) /* -0x38fff: ADC */
/* -0x3bfff: Reserved */
# define TIVA_CMP_BASE (TIVA_PERIPH_BASE + 0x3c000) /* -0x3cfff: Analog Comparators */
/* -0x47fff: Reserved */
@ -212,7 +212,7 @@
# define TIVA_TIMER2_BASE (TIVA_PERIPH_BASE + 0x32000) /* -0x32fff: Timer 2 */
# define TIVA_TIMER3_BASE (TIVA_PERIPH_BASE + 0x33000) /* -0x33fff: Timer 3 */
/* -0x37fff: Reserved */
# define TIVA_ADC_BASE (TIVA_PERIPH_BASE + 0x38000) /* -0x38fff: ADC */
# define TIVA_ADC0_BASE (TIVA_PERIPH_BASE + 0x38000) /* -0x38fff: ADC */
/* -0x3bfff: Reserved */
# define TIVA_CMP_BASE (TIVA_PERIPH_BASE + 0x3c000) /* -0x3cfff: Analog Comparators */
/* -0x47fff: Reserved */
@ -254,7 +254,7 @@
# define TIVA_TIMER2_BASE (TIVA_PERIPH_BASE + 0x32000) /* -0x32fff: Timer 2 */
# define TIVA_TIMER3_BASE (TIVA_PERIPH_BASE + 0x33000) /* -0x33fff: Timer 3 */
/* -0x37fff: Reserved */
# define TIVA_ADC_BASE (TIVA_PERIPH_BASE + 0x38000) /* -0x38fff: ADC */
# define TIVA_ADC0_BASE (TIVA_PERIPH_BASE + 0x38000) /* -0x38fff: ADC */
/* -0x3bfff: Reserved */
# define TIVA_CMP_BASE (TIVA_PERIPH_BASE + 0x3c000) /* -0x3cfff: Analog Comparators */
/* -0x3fffff: Reserved */

19
nuttx/arch/arm/src/tiva/tiva_gpio.c
View File

@ -499,8 +499,10 @@ static inline void tiva_gpiopadtype(uint32_t base, uint32_t pin,
uint32_t pdrclr = 0;
uint32_t denset = 0;
uint32_t denclr = 0;
#if defined(LM4F) || defined(TM4C)
uint32_t amselset = 0;
uint32_t amselclr = 0;
#endif
/* Set the pin type. */
@ -512,7 +514,9 @@ static inline void tiva_gpiopadtype(uint32_t base, uint32_t pin,
purclr = pin;
pdrclr = pin;
denset = pin;
#if defined(LM4F) || defined(TM4C)
amselclr = pin;
#endif
}
break;
@ -522,7 +526,9 @@ static inline void tiva_gpiopadtype(uint32_t base, uint32_t pin,
purset = pin;
pdrclr = pin;
denset = pin;
#if defined(LM4F) || defined(TM4C)
amselclr = pin;
#endif
}
break;
@ -532,7 +538,9 @@ static inline void tiva_gpiopadtype(uint32_t base, uint32_t pin,
purclr = pin;
pdrset = pin;
denset = pin;
#if defined(LM4F) || defined(TM4C)
amselclr = pin;
#endif
}
break;
@ -542,7 +550,9 @@ static inline void tiva_gpiopadtype(uint32_t base, uint32_t pin,
purclr = pin;
pdrclr = pin;
denset = pin;
#if defined(LM4F) || defined(TM4C)
amselclr = pin;
#endif
}
break;
@ -552,7 +562,9 @@ static inline void tiva_gpiopadtype(uint32_t base, uint32_t pin,
purset = pin;
pdrclr = pin;
denclr = pin;
#if defined(LM4F) || defined(TM4C)
amselclr = pin;
#endif
}
break;
@ -562,7 +574,9 @@ static inline void tiva_gpiopadtype(uint32_t base, uint32_t pin,
purclr = pin;
pdrset = pin;
denclr = pin;
#if defined(LM4F) || defined(TM4C)
amselclr = pin;
#endif
}
break;
@ -572,7 +586,9 @@ static inline void tiva_gpiopadtype(uint32_t base, uint32_t pin,
purclr = pin;
pdrclr = pin;
denclr = pin;
#if defined(LM4F) || defined(TM4C)
amselset = pin;
#endif
}
break;
@ -584,7 +600,10 @@ static inline void tiva_gpiopadtype(uint32_t base, uint32_t pin,
modifyreg32(base + TIVA_GPIO_PUR_OFFSET, purclr, purset);
modifyreg32(base + TIVA_GPIO_PDR_OFFSET, pdrclr, pdrset);
modifyreg32(base + TIVA_GPIO_DEN_OFFSET, denclr, denset);
#if defined(LM4F) || defined(TM4C)
modifyreg32(base + TIVA_GPIO_AMSEL_OFFSET, amselclr, amselset);
#endif
#ifdef CONFIG_ARCH_CHIP_TM4C129
/* Set the wake pin enable register and the wake level register. These