Revised CAN driver
git-svn-id: https://nuttx.svn.sourceforge.net/svnroot/nuttx/trunk@3839 7fd9a85b-ad96-42d3-883c-3090e2eb8679
This commit is contained in:
patacongo
parent
54261bcfaa
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a4d4808e98
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@ -1967,3 +1967,8 @@
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Add new line drawing interfaces (untested).
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6.8 2011-xx-xx Gregory Nutt <spudmonkey@racsa.co.cr>
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* arch/arm/src/lpc17xx/chip.h: Fix some chip memory configuration errors
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for the LPC1764, LPC1756, and LPC1754 (submitted by Li Zhuoy (Lzzy))
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* arch/arm/src/lpc17xx/lpc17_can.h: Revised CAN driver submitted by
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Li Zhuoy (Lzzy).
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@ -3,6 +3,8 @@
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*
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* Copyright (C) 2011 Li Zhuoyi. All rights reserved.
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* Author: Li Zhuoyi <lzyy.cn@gmail.com>
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* History: 0.1 2011-07-12 initial version
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* 0.2 2011-08-03 support CAN1/CAN2
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*
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* This file is a part of NuttX:
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*
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@ -60,13 +62,16 @@
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#include "lpc17_pinconn.h"
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#include "lpc17_can.h"
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#if HAVE_CAN
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#define CAN2_RATE 500000
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#if defined(CONFIG_LPC17_CAN1) || defined(CONFIG_LPC17_CAN2)
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/****************************************************************************
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* Private Types
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****************************************************************************/
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struct up_dev_s
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{
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int port;
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int baud; /* Configured baud */
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};
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/****************************************************************************
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* Private Function Prototypes
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@ -102,10 +107,33 @@ static const struct can_ops_s g_canops =
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.co_txempty = can_txempty,
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};
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static struct can_dev_s g_candev =
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#ifdef CONFIG_LPC17_CAN1
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static struct up_dev_s g_can1priv =
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{
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.port = 1,
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.baud = CONFIG_CAN1_BAUD,
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};
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static struct can_dev_s g_can1dev =
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{
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.cd_ops = &g_canops,
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.cd_priv= &g_can1priv,
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};
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#endif
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#ifdef CONFIG_LPC17_CAN2
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static struct up_dev_s g_can2priv =
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{
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.port = 2,
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.baud = CONFIG_CAN2_BAUD,
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};
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static struct can_dev_s g_can2dev =
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{
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.cd_ops = &g_canops,
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.cd_priv= &g_can2priv,
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};
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#endif
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/****************************************************************************
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* Private Functions
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@ -117,21 +145,40 @@ static void can_reset(FAR struct can_dev_s *dev)
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{
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irqstate_t flags;
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uint32_t regval;
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struct up_dev_s *priv=dev->cd_priv;
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int baud = priv->baud;
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int port = priv->port;
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baud = 0x25c003;
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flags = irqsave();
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if(port==1)
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{
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putreg32(0x01,LPC17_CAN1_MOD);
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putreg32(0x00,LPC17_CAN1_IER);
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putreg32(0x00,LPC17_CAN1_GSR);
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putreg32(0x02,LPC17_CAN1_CMR);
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putreg32(baud,LPC17_CAN1_BTR);
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putreg32(0x00,LPC17_CAN1_MOD);
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putreg32(0x01,LPC17_CAN1_IER);
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putreg32(0x02,LPC17_CANAF_AFMR);
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}
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else if(port==2)
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{
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putreg32(0x01,LPC17_CAN2_MOD);
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putreg32(0x00,LPC17_CAN2_IER);
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putreg32(0x00,LPC17_CAN2_GSR);
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putreg32(0x02,LPC17_CAN2_CMR);
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putreg32(0x25c003,LPC17_CAN2_BTR);
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putreg32(baud,LPC17_CAN2_BTR);
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putreg32(0x00,LPC17_CAN2_MOD);
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putreg32(0x01,LPC17_CAN2_IER);
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putreg32(0x02,LPC17_CANAF_AFMR);
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}
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else
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{
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dbg("Unsupport port %d\n",port);
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}
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irqrestore(flags);
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regval = getreg32(LPC17_CAN2_BTR);
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//dbg("BTR=%x\n",regval);
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}
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/* Configure the CAN. This method is called the first time that the CAN
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@ -141,8 +188,7 @@ static void can_reset(FAR struct can_dev_s *dev)
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*/
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static int can_setup(FAR struct can_dev_s *dev)
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{
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int ret=0;
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ret = irq_attach(LPC17_IRQ_CAN, can_interrupt);
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int ret = irq_attach(LPC17_IRQ_CAN, can_interrupt);
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if (ret == OK)
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{
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up_enable_irq(LPC17_IRQ_CAN);
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@ -163,11 +209,21 @@ static void can_shutdown(FAR struct can_dev_s *dev)
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static void can_rxint(FAR struct can_dev_s *dev, bool enable)
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{
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uint32_t regval;
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int port = ((struct up_dev_s *)(dev->cd_priv))->port;
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if(port == 1)
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regval = getreg32(LPC17_CAN1_IER);
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else
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regval = getreg32(LPC17_CAN2_IER);
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if(enable)
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if (enable)
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regval |= CAN_IER_RIE;
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else
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regval &= ~CAN_IER_RIE;
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if(port == 1)
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putreg32(regval, LPC17_CAN1_IER);
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else
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putreg32(regval, LPC17_CAN2_IER);
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}
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@ -175,11 +231,21 @@ static void can_rxint(FAR struct can_dev_s *dev, bool enable)
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static void can_txint(FAR struct can_dev_s *dev, bool enable)
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{
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uint32_t regval;
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int port = ((struct up_dev_s *)(dev->cd_priv))->port;
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if(port == 1)
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regval = getreg32(LPC17_CAN1_IER);
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else
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regval = getreg32(LPC17_CAN2_IER);
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if(enable)
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if (enable)
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regval |= CAN_IER_TIE1;
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else
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regval &= ~CAN_IER_TIE1;
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if(port == 1)
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putreg32(regval, LPC17_CAN1_IER);
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else
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putreg32(regval, LPC17_CAN2_IER);
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}
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@ -199,24 +265,39 @@ static int can_remoterequest(FAR struct can_dev_s *dev, uint16_t id)
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static int can_send(FAR struct can_dev_s *dev, FAR struct can_msg_s *msg)
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{
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int port = ((struct up_dev_s *)(dev->cd_priv))->port;
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uint32_t tid=CAN_ID(msg->cm_hdr);
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uint32_t tfi=CAN_DLC(msg->cm_hdr)<<16;
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if(CAN_RTR(msg->cm_hdr))
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if (CAN_RTR(msg->cm_hdr))
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tfi|=CAN_TFI_RTR;
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//dbg("header=%04x\n",msg->cm_hdr);
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if( port == 1)
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{
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putreg32(tfi,LPC17_CAN1_TFI1);
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putreg32(tid,LPC17_CAN1_TID1);
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putreg32(*(uint32_t *)&msg->cm_data[0],LPC17_CAN1_TDA1);
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putreg32(*(uint32_t *)&msg->cm_data[4],LPC17_CAN1_TDB1);
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putreg32(0x21,LPC17_CAN1_CMR);
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}
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else
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{
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putreg32(tfi,LPC17_CAN2_TFI1);
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putreg32(tid,LPC17_CAN2_TID1);
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putreg32(*(uint32_t *)&msg->cm_data[0],LPC17_CAN2_TDA1);
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putreg32(*(uint32_t *)&msg->cm_data[4],LPC17_CAN2_TDB1);
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putreg32(0x21,LPC17_CAN2_CMR);
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}
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return 0;
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}
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static bool can_txempty(FAR struct can_dev_s *dev)
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{
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uint32_t regval;
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int port = ((struct up_dev_s *)(dev->cd_priv))->port;
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if( port == 1)
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regval = getreg32(LPC17_CAN1_GSR);
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else
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regval = getreg32(LPC17_CAN2_GSR);
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if( regval & CAN_GSR_TBS)
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if ( regval & CAN_GSR_TBS)
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return true;
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else
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return false;
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@ -225,6 +306,28 @@ static bool can_txempty(FAR struct can_dev_s *dev)
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static int can_interrupt(int irq, void *context)
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{
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uint32_t regval;
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#ifdef CONFIG_LPC17_CAN1
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regval=getreg32(LPC17_CAN1_ICR);
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if (regval & CAN_ICR_RI ) //Receive interrupt
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{
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uint16_t hdr;
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uint32_t data[2];
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uint32_t rfs=getreg32(LPC17_CAN1_RFS);
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uint32_t rid=getreg32(LPC17_CAN1_RID);
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data[0]=getreg32(LPC17_CAN1_RDA);
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data[1]=getreg32(LPC17_CAN1_RDB);
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putreg32(0x04,LPC17_CAN1_CMR); //release recieve buffer
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hdr=((rid<<5)&~0x1f)|((rfs>>16)&0x0f);
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if (rfs&CAN_RFS_RTR)
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hdr|=0x10;
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can_receive(&g_can1dev,hdr,(uint8_t *)data);
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}
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if ( regval & CAN_ICR_TI1) //Transmit interrupt 1
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can_txdone(&g_can1dev);
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#endif
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#ifdef CONFIG_LPC17_CAN2
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regval=getreg32(LPC17_CAN2_ICR);
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if (regval & CAN_ICR_RI ) //Receive interrupt
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{
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@ -236,12 +339,13 @@ static int can_interrupt(int irq, void *context)
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data[1]=getreg32(LPC17_CAN2_RDB);
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putreg32(0x04,LPC17_CAN2_CMR); //release recieve buffer
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hdr=((rid<<5)&~0x1f)|((rfs>>16)&0x0f);
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if(rfs&CAN_RFS_RTR)
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if (rfs&CAN_RFS_RTR)
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hdr|=0x10;
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can_receive(&g_candev,hdr,data);
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can_receive(&g_can2dev,hdr,data);
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}
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if ( regval & CAN_ICR_TI1) //Transmit interrupt 1
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can_txdone(&g_candev);
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can_txdone(&g_can2dev);
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#endif
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return OK;
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}
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@ -253,13 +357,13 @@ static int can_interrupt(int irq, void *context)
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* Name: up_caninitialize
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*
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* Description:
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* Initialize the selected SPI port
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* Initialize the selected can port
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*
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* Input Parameter:
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* Port number (for hardware that has mutiple SPI interfaces)
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* Port number (for hardware that has mutiple can interfaces)
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*
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* Returned Value:
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* Valid SPI device structure reference on succcess; a NULL on failure
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* Valid can device structure reference on succcess; a NULL on failure
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*
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****************************************************************************/
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@ -268,23 +372,50 @@ FAR struct can_dev_s *up_caninitialize(int port)
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uint32_t regval;
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irqstate_t flags;
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flags = irqsave();
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struct can_dev_s *candev=NULL;
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/* Step 1: Enable power on */
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#ifdef CONFIG_LPC17_CAN1
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if( port == 1 )
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{
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regval = getreg32(LPC17_SYSCON_PCONP);
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regval |= SYSCON_PCONP_PCCAN1;
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putreg32(regval, LPC17_SYSCON_PCONP);
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regval = getreg32(LPC17_SYSCON_PCLKSEL0);
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regval &= ~SYSCON_PCLKSEL0_CAN1_MASK;
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regval |= (SYSCON_PCLKSEL_CCLK4 << SYSCON_PCLKSEL0_CAN1_SHIFT);
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putreg32(regval, LPC17_SYSCON_PCLKSEL0);
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lpc17_configgpio(GPIO_CAN1_RD);
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lpc17_configgpio(GPIO_CAN1_TD);
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putreg32(0x01,LPC17_CAN1_MOD);
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putreg32(0x00,LPC17_CAN1_IER);
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putreg32(0x00,LPC17_CAN1_GSR);
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putreg32(0x02,LPC17_CAN1_CMR);
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putreg32(0x49c009,LPC17_CAN1_BTR);
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putreg32(0x00,LPC17_CAN1_MOD);
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putreg32(0x01,LPC17_CAN1_IER);
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putreg32(0x02,LPC17_CANAF_AFMR);
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candev = &g_can1dev;
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}
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#endif
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#ifdef CONFIG_LPC17_CAN2
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if ( port ==2 )
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{
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regval = getreg32(LPC17_SYSCON_PCONP);
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regval |= SYSCON_PCONP_PCCAN2;
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putreg32(regval, LPC17_SYSCON_PCONP);
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/* Step 2: Enable clocking */
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regval = getreg32(LPC17_SYSCON_PCLKSEL0);
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regval &= ~SYSCON_PCLKSEL0_CAN2_MASK;
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regval |= (SYSCON_PCLKSEL_CCLK4 << SYSCON_PCLKSEL0_CAN2_SHIFT);
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putreg32(regval, LPC17_SYSCON_PCLKSEL0);
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/* Step 3: Configure I/O pins */
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lpc17_configgpio(GPIO_CAN2_RD_2);
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lpc17_configgpio(GPIO_CAN2_TD_2);
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lpc17_configgpio(GPIO_CAN2_RD);
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lpc17_configgpio(GPIO_CAN2_TD);
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/* Step 4: Setup */
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putreg32(0x01,LPC17_CAN2_MOD);
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putreg32(0x00,LPC17_CAN2_IER);
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putreg32(0x00,LPC17_CAN2_GSR);
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@ -294,8 +425,11 @@ FAR struct can_dev_s *up_caninitialize(int port)
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putreg32(0x01,LPC17_CAN2_IER);
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putreg32(0x02,LPC17_CANAF_AFMR);
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candev = &g_can2dev;
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}
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#endif
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irqrestore(flags);
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return &g_candev;
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return candev;
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}
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#endif
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