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Fix workaround logic

git-svn-id: https://nuttx.svn.sourceforge.net/svnroot/nuttx/trunk@1124 7fd9a85b-ad96-42d3-883c-3090e2eb8679
This commit is contained in:
patacongo 2008-11-02 22:34:35 +00:00
parent b1707d3a69
commit 9255448450
3 changed files with 17 additions and 7 deletions

View File

@ -528,5 +528,7 @@
0.3.18 2008-xx-xx Gregory Nutt <spudmonkey@racsa.co.cr>
* Added port for the STMicro STR71x processor and configuration for the Olimex STR-P711
board (untested as of the initial checkin).
* Fix race condition workaround delay in LPC214X SPI logic. It the cause of the very
bad MMC/SD performance.

View File

@ -8,7 +8,7 @@
<tr align="center" bgcolor="#e4e4e4">
<td>
<h1><big><font color="#3c34ec"><i>NuttX RTOS</i></font></big></h1>
<p>Last Updated: November 1, 2008</p>
<p>Last Updated: November 2, 2008</p>
</td>
</tr>
</table>
@ -1114,6 +1114,8 @@ buildroot-0.1.0 2007-03-09 &lt;spudmonkey@racsa.co.cr&gt
nuttx-0.3.18 2008-xx-xx Gregory Nutt &lt;spudmonkey@racsa.co.cr&gt;
* Added port for the STMicro STR71x processor and configuration for the Olimex STR-P711
board (untested as of the initial checkin).
* Fix race condition workaround delay in LPC214X SPI logic. It the cause of the very
bad MMC/SD performance.
pascal-0.1.3 2008-xx-xx Gregory Nutt &lt;spudmonkey@racsa.co.cr&gt;

View File

@ -154,11 +154,16 @@ static void spi_select(FAR struct spi_dev_s *dev, boolean selected)
while (!(getreg8(LPC214X_SPI1_SR) & LPC214X_SPI1SR_TNF));
putreg16(0xff, LPC214X_SPI1_DR);
/* Then wait until TX FIFO and TX shift buffer are empty */
/* Wait until TX FIFO and TX shift buffer are empty */
while (getreg8(LPC214X_SPI1_SR) & LPC214X_SPI1SR_BSY);
/* Wait until RX FIFO is not empty */
while (!(getreg8(LPC214X_SPI1_SR) & LPC214X_SPI1SR_RNE));
/* Then read and discard bytes until the RX FIFO is empty */
do
{
(void)getreg16(LPC214X_SPI1_DR);
@ -290,7 +295,7 @@ static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const ubyte *buffer, siz
}
}
/* Then discard all card responses until the TX FIFO is emptied. */
/* Then discard all card responses until the RX & TX FIFOs are emptied. */
do
{
@ -304,12 +309,13 @@ static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const ubyte *buffer, siz
(void)getreg16(LPC214X_SPI1_DR);
}
/* There is a race condition where TFE may go FALSE just before
* RNE goes true. The nasty little delay in the following solves
* that (it could probably be tuned to improve performance).
/* There is a race condition where TFE may go TRUE just before
* RNE goes true and this loop terminates prematurely. The nasty little
* delay in the following solves that (it could probably be tuned
* to improve performance).
*/
else if ((sr & LPC214X_SPI1SR_TFE) == 0)
else if ((sr & LPC214X_SPI1SR_TFE) != 0)
{
up_udelay(100);
sr = getreg8(LPC214X_SPI1_SR);