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Broke FSMC stuff into separat files

git-svn-id: https://nuttx.svn.sourceforge.net/svnroot/nuttx/trunk@2166 7fd9a85b-ad96-42d3-883c-3090e2eb8679
This commit is contained in:
patacongo 2009-10-20 23:33:33 +00:00
parent 9f3c999ce6
commit 6d419321ec
8 changed files with 674 additions and 180 deletions

View File

@ -39,7 +39,8 @@ CFLAGS += -I$(TOPDIR)/sched
ASRCS =
AOBJS = $(ASRCS:.S=$(OBJEXT))
CSRCS = up_boot.c up_leds.c up_spi.c up_extmem.c
CSRCS = up_boot.c up_leds.c up_spi.c up_extcontext.c up_selectnor.c \
up_deselectnor.c up_selectsram.c up_deselectsram.c
ifeq ($(CONFIG_EXAMPLES_NSH_ARCHINIT),y)
CSRCS += up_nsh.c
endif

View File

@ -93,11 +93,18 @@ struct extmem_save_s
};
/************************************************************************************
* Public Functions
* Public data
************************************************************************************/
#ifndef __ASSEMBLY__
/* GPIO configurations common to SRAM and NOR Flash */
#define NCOMMON_CONFIG 37
extern const uint16 g_commonconfig[NCOMMON_CONFIG];
/************************************************************************************
* Public Functions ************************************************************************************/
/************************************************************************************
* Name: stm32_spiinitialize
*
@ -108,6 +115,57 @@ struct extmem_save_s
extern void weak_function stm32_spiinitialize(void);
/************************************************************************************
* Name: stm32_extcontextsave
*
* Description:
* Save current GPIOs that will used by external memory configurations
*
************************************************************************************/
#ifdef CONFIG_STM32_FSMC
extern void stm32_extcontextsave(struct extmem_save_s *save);
/************************************************************************************
* Name: stm32_extcontextrestore
*
* Description:
* Restore GPIOs that were used by external memory configurations
*
************************************************************************************/
extern void stm32_extcontextrestore(struct extmem_save_s *restore);
/************************************************************************************
* Name: stm32_extmemgpios
*
* Description:
* Initialize GPIOs for NOR or SRAM
*
************************************************************************************/
extern void stm32_extmemgpios(const uint16 *gpios, int ngpios);
/************************************************************************************
* Name: stm32_enablefsmc
*
* Description:
* enable clocking to the FSMC module
*
************************************************************************************/
extern void stm32_enablefsmc(void);
/************************************************************************************
* Name: stm32_disablefsmc
*
* Description:
* enable clocking to the FSMC module
*
************************************************************************************/
extern void stm32_disablefsmc(void);
/************************************************************************************
* Name: stm32_selectnor
*
@ -116,7 +174,7 @@ extern void weak_function stm32_spiinitialize(void);
*
************************************************************************************/
extern void stm32_selectnor(struct extmem_save_s *save);
extern void stm32_selectnor(void);
/************************************************************************************
* Name: stm32_deselectnor
@ -126,7 +184,7 @@ extern void stm32_selectnor(struct extmem_save_s *save);
*
************************************************************************************/
extern void stm32_deselectnor(struct extmem_save_s *restore);
extern void stm32_deselectnor(void);
/************************************************************************************
* Name: stm32_selectsram
@ -136,16 +194,17 @@ extern void stm32_deselectnor(struct extmem_save_s *restore);
*
************************************************************************************/
extern void stm32_selectsram(struct extmem_save_s *save);
extern void stm32_selectsram(void);
/************************************************************************************
* Name: stm32_deselectsram
*
* Description:
* Disable NOR FLASH
* Disable external SRAM
*
************************************************************************************/
extern void stm32_deselectsram(struct extmem_save_s *restore);
extern void stm32_deselectsram(void);
#endif /* CONFIG_STM32_FSMC */
#endif /* __ASSEMBLY__ */
#endif /* __CONFIGS_STM3210E_EVAL_SRC_STM3210E_INTERNAL_H */

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@ -0,0 +1,96 @@
/************************************************************************************
* configs/stm3210e-eval/src/up_deselectnor.c
* arch/arm/src/board/up_deselectnor.c
*
* Copyright (C) 2009 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <debug.h>
#include "up_arch.h"
#include "stm32_fsmc.h"
#include "stm3210e-internal.h"
#ifdef CONFIG_STM32_FSMC
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/************************************************************************************
* Public Data
************************************************************************************/
/************************************************************************************
* Private Data
************************************************************************************/
/************************************************************************************
* Private Functions
************************************************************************************/
/************************************************************************************
* Public Functions
************************************************************************************/
/************************************************************************************
* Name: stm32_deselectnor
*
* Description:
* Disable NOR FLASH
*
************************************************************************************/
void stm32_deselectnor(void)
{
/* Restore registers to their power up settings */
putreg32(0x000030d2, STM32_FSMC_BCR2);
/* Bank1 NOR/SRAM timing register configuration */
putreg32(0x0fffffff, STM32_FSMC_BTR2);
/* Disable AHB clocking to the FSMC */
stm32_disablefsmc();
}
#endif /* CONFIG_STM32_FSMC */

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@ -0,0 +1,98 @@
/************************************************************************************
* configs/stm3210e-eval/src/up_deselectsram.c
* arch/arm/src/board/up_deselectsram.c
*
* Copyright (C) 2009 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <debug.h>
#include "up_arch.h"
#include "stm32_fsmc.h"
#include "stm3210e-internal.h"
#ifdef CONFIG_STM32_FSMC
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/************************************************************************************
* Public Data
************************************************************************************/
/************************************************************************************
* Private Data
************************************************************************************/
/************************************************************************************
* Private Functions
************************************************************************************/
/************************************************************************************
* Public Functions
************************************************************************************/
/************************************************************************************
* Name: stm32_deselectsram
*
* Description:
* Disable NOR FLASH
*
************************************************************************************/
void stm32_deselectsram(void)
{
/* Restore registers to their power up settings */
putreg32(0x000030d2, STM32_FSMC_BCR3);
/* Bank1 NOR/SRAM timing register configuration */
putreg32(0x0fffffff, STM32_FSMC_BTR3);
/* Disable AHB clocking to the FSMC */
stm32_disablefsmc();
}
#endif /* CONFIG_STM32_FSMC */

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@ -0,0 +1,117 @@
/************************************************************************************
* configs/stm3210e-eval/src/up_extcontext.c
* arch/arm/src/board/up_extcontext.c
*
* Copyright (C) 2009 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <assert.h>
#include <debug.h>
#include "up_arch.h"
#include "stm32_gpio.h"
#include "stm3210e-internal.h"
#ifdef CONFIG_STM32_FSMC
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
#if STM32_NGPIO_PORTS < 6
# error "Required GPIO ports not enabled"
#endif
/************************************************************************************
* Private Data
************************************************************************************/
/************************************************************************************
* Private Functions
************************************************************************************/
/************************************************************************************
* Public Functions
************************************************************************************/
/************************************************************************************
* Name: stm32_extcontextsave
*
* Description:
* Save current GPIOs that will used by external memory configurations
*
************************************************************************************/
void stm32_extcontextsave(struct extmem_save_s *save)
{
DEBUGASSERT(save != NULL);
save->gpiod_crl = getreg32(STM32_GPIOE_CRL);
save->gpiod_crh = getreg32(STM32_GPIOE_CRH);
save->gpioe_crl = getreg32(STM32_GPIOD_CRL);
save->gpioe_crh = getreg32(STM32_GPIOD_CRH);
save->gpiof_crl = getreg32(STM32_GPIOF_CRL);
save->gpiof_crh = getreg32(STM32_GPIOF_CRH);
save->gpiog_crl = getreg32(STM32_GPIOG_CRL);
save->gpiog_crh = getreg32(STM32_GPIOG_CRH);
}
/************************************************************************************
* Name: stm32_extcontextrestore
*
* Description:
* Restore GPIOs that were used by external memory configurations
*
************************************************************************************/
void stm32_extcontextrestore(struct extmem_save_s *restore)
{
DEBUGASSERT(restore != NULL);
putreg32(restore->gpiod_crl, STM32_GPIOE_CRL);
putreg32(restore->gpiod_crh, STM32_GPIOE_CRH);
putreg32(restore->gpioe_crl, STM32_GPIOD_CRL);
putreg32(restore->gpioe_crh, STM32_GPIOD_CRH);
putreg32(restore->gpiof_crl, STM32_GPIOF_CRL);
putreg32(restore->gpiof_crh, STM32_GPIOF_CRH);
putreg32(restore->gpiog_crl, STM32_GPIOG_CRL);
putreg32(restore->gpiog_crh, STM32_GPIOG_CRH);
}
#endif /* CONFIG_STM32_FSMC */

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@ -66,7 +66,7 @@
#endif
/************************************************************************************
* Private Data
* Public Data
************************************************************************************/
/* 512Kx16 SRAM is connected to bank2 of the FSMC interface and both 8- and 16-bit
@ -95,7 +95,7 @@
/* GPIO configurations common to SRAM and NOR Flash */
static const uint16 g_commonconfig[] =
const uint16 g_commonconfig[NCOMMON_CONFIG] =
{
/* A0... A18 */
@ -116,7 +116,10 @@ static const uint16 g_commonconfig[] =
GPIO_NPS_NOE, GPIO_NPS_NWE
};
#define NCOMMON_CONFIG (sizeof(g_commonconfig)/sizeof(uint16))
/************************************************************************************
* Private Data
************************************************************************************/
/* GPIO configurations unique to SRAM */
@ -128,24 +131,14 @@ static const uint16 g_sramconfig[] =
};
#define NSRAM_CONFIG (sizeof(g_sramconfig)/sizeof(uint16))
/* GPIO configurations unique to NOR Flash */
static const uint16 g_norconfig[] =
{
/* A19... A22 */
GPIO_NPS_A19, GPIO_NPS_A20, GPIO_NPS_A21, GPIO_NPS_A22,
/* NE2 */
GPIO_NPS_NE2
};
#define NNOR_CONFIG (sizeof(g_norconfig)/sizeof(uint16))
/************************************************************************************
* Private Functions
************************************************************************************/
/************************************************************************************
* Public Functions
************************************************************************************/
/************************************************************************************
* Name: stm32_extmemgpios
*
@ -154,7 +147,7 @@ static const uint16 g_norconfig[] =
*
************************************************************************************/
static void stm32_extmemgpios(const uint16 *gpios, int ngpios)
void stm32_extmemgpios(const uint16 *gpios, int ngpios)
{
int i;
@ -167,56 +160,14 @@ static void stm32_extmemgpios(const uint16 *gpios, int ngpios)
}
/************************************************************************************
* Name: stm32_savegpios
*
* Description:
* Save current GPIOs that will used by external memory configurations
*
************************************************************************************/
static void stm32_savegpios(struct extmem_save_s *save)
{
DEBUGASSERT(save != NULL);
save->gpiod_crl = getreg32(STM32_GPIOE_CRL);
save->gpiod_crh = getreg32(STM32_GPIOE_CRH);
save->gpioe_crl = getreg32(STM32_GPIOD_CRL);
save->gpioe_crh = getreg32(STM32_GPIOD_CRH);
save->gpiof_crl = getreg32(STM32_GPIOF_CRL);
save->gpiof_crh = getreg32(STM32_GPIOF_CRH);
save->gpiog_crl = getreg32(STM32_GPIOG_CRL);
save->gpiog_crh = getreg32(STM32_GPIOG_CRH);
}
/************************************************************************************
* Name: stm32_restoregpios
*
* Description:
* Restore GPIOs that were used by external memory configurations
*
************************************************************************************/
static void stm32_restoregpios(struct extmem_save_s *restore)
{
DEBUGASSERT(restore != NULL);
putreg32(restore->gpiod_crl, STM32_GPIOE_CRL);
putreg32(restore->gpiod_crh, STM32_GPIOE_CRH);
putreg32(restore->gpioe_crl, STM32_GPIOD_CRL);
putreg32(restore->gpioe_crh, STM32_GPIOD_CRH);
putreg32(restore->gpiof_crl, STM32_GPIOF_CRL);
putreg32(restore->gpiof_crh, STM32_GPIOF_CRH);
putreg32(restore->gpiog_crl, STM32_GPIOG_CRL);
putreg32(restore->gpiog_crh, STM32_GPIOG_CRH);
}
/************************************************************************************
* Name: stm32_enableclocks
* Name: stm32_enablefsmc
*
* Description:
* enable clocking to the FSMC module
*
************************************************************************************/
static void stm32_enableclocks(void)
void stm32_enablefsmc(void)
{
uint32 regval;
@ -228,14 +179,14 @@ static void stm32_enableclocks(void)
}
/************************************************************************************
* Name: stm32_disableclocks
* Name: stm32_disablefsmc
*
* Description:
* enable clocking to the FSMC module
*
************************************************************************************/
static void stm32_disableclocks(void)
void stm32_disablefsmc(void)
{
uint32 regval;
@ -246,115 +197,6 @@ static void stm32_disableclocks(void)
putreg32(regval, STM32_RCC_AHBENR);
}
/************************************************************************************
* Public Functions
************************************************************************************/
/************************************************************************************
* Name: stm32_selectnor
*
* Description:
* Initialize to access NOR flash
*
************************************************************************************/
void stm32_selectnor(struct extmem_save_s *save)
{
/* Save current GPIO state */
stm32_savegpios(save);
/* Configure new GPIO state */
stm32_extmemgpios(g_commonconfig, NCOMMON_CONFIG);
stm32_extmemgpios(g_sramconfig, NNOR_CONFIG);
/* Enable AHB clocking to the FSMC */
stm32_enableclocks();
/* Bank1 NOR/SRAM control register configuration */
putreg32(FSMC_BCR_NOR|FSMC_BCR_FACCEN|FSMC_BCR_MWID16|FSMC_BCR_WREN, STM32_FSMC_BCR2);
/* Bank1 NOR/SRAM timing register configuration */
putreg32(FSMC_BTR_ADDSET(3)|FSMC_BTR_ADDHLD(1)|FSMC_BTR_DATAST(6)|FSMC_BTR_BUSTRUN(1)|
FSMC_BTR_CLKDIV(1)|FSMC_BTR_DATLAT(2)|FSMC_BTR_ACCMODB, STM32_FSMC_BTR2);
putreg32(0x0fffffff, STM32_FSMC_BCR3);
/* Enable the bank */
putreg32(FSMC_BCR_MBKEN|FSMC_BCR_NOR|FSMC_BCR_FACCEN|FSMC_BCR_MWID16|FSMC_BCR_WREN, STM32_FSMC_BCR2);
}
/************************************************************************************
* Name: stm32_deselectnor
*
* Description:
* Disable NOR FLASH
*
************************************************************************************/
void stm32_deselectnor(struct extmem_save_s *restore)
{
/* Restore registers to their power up settings */
putreg32(0x000030d2, STM32_FSMC_BCR2);
/* Bank1 NOR/SRAM timing register configuration */
putreg32(0x0fffffff, STM32_FSMC_BTR2);
/* Disable AHB clocking to the FSMC */
stm32_disableclocks();
/* Restore GPIOs */
stm32_restoregpios(restore);
}
/************************************************************************************
* Name: stm32_selectsram
*
* Description:
* Initialize to access external SRAM
*
************************************************************************************/
void stm32_selectsram(struct extmem_save_s *save)
{
/* Save current GPIO state */
stm32_savegpios(save);
/* Configure new GPIO state */
stm32_extmemgpios(g_commonconfig, NCOMMON_CONFIG);
stm32_extmemgpios(g_norconfig, NSRAM_CONFIG);
/* Enable AHB clocking to the FSMC */
stm32_enableclocks();
/* Bank1 NOR/SRAM control register configuration */
putreg32(FSMC_BCR_MWID16|FSMC_BCR_WREN, STM32_FSMC_BCR3);
/* Bank1 NOR/SRAM timing register configuration */
putreg32(FSMC_BTR_ADDSET(1)|FSMC_BTR_ADDHLD(1)|FSMC_BTR_DATAST(3)|FSMC_BTR_BUSTRUN(1)|
FSMC_BTR_CLKDIV(1)|FSMC_BTR_DATLAT(2)|FSMC_BTR_ACCMODA, STM32_FSMC_BTR3);
putreg32(0xffffffff, STM32_FSMC_BCR3);
/* Enable the bank */
putreg32(FSMC_BCR_MBKEN|FSMC_BCR_MWID16|FSMC_BCR_WREN, STM32_FSMC_BCR3);
}
/************************************************************************************
* Name: stm32_deselectsram
*

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@ -0,0 +1,137 @@
/************************************************************************************
* configs/stm3210e-eval/src/up_selectnor.c
* arch/arm/src/board/up_selectnor.c
*
* Copyright (C) 2009 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <debug.h>
#include "up_arch.h"
#include "stm32_fsmc.h"
#include "stm32_gpio.h"
#include "stm3210e-internal.h"
#ifdef CONFIG_STM32_FSMC
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
#if STM32_NGPIO_PORTS < 6
# error "Required GPIO ports not enabled"
#endif
/************************************************************************************
* Private Data
************************************************************************************/
/* Pin Usage (per schematic)
* FLASH SRAM NAND
* D[0..15] [0..15] [0..15] [0..7]
* A[0..23] [0..22] [0..18] [16,17]
* PSMC_NE3 PG10 OUT ~CE --- ---
* PSMC_NBL0 PE0 OUT ~BLE --- ---
* PSMC_NBL1 PE1 OUT ~BHE --- ---
* PSMC_NE2 PG9 OUT --- ~E ---
* PSMC_NWE PD5 OUT ~WE ~W ~W
* PSMC_NOE PD4 OUT ~OE ~G ~R
* PSMC_NWAIT PD6 IN --- R~B ---
* PSMC_INT2 PG6* IN --- --- R~B
*
* *JP7 will switch to PD6
*/
/* GPIO configurations unique to NOR Flash */
static const uint16 g_norconfig[] =
{
/* A19... A22 */
GPIO_NPS_A19, GPIO_NPS_A20, GPIO_NPS_A21, GPIO_NPS_A22,
/* NE2 */
GPIO_NPS_NE2
};
#define NNOR_CONFIG (sizeof(g_norconfig)/sizeof(uint16))
/************************************************************************************
* Private Functions
************************************************************************************/
/************************************************************************************
* Public Functions
************************************************************************************/
/************************************************************************************
* Name: stm32_selectnor
*
* Description:
* Initialize to access NOR flash
*
************************************************************************************/
void stm32_selectnor(void)
{
/* Configure new GPIO state */
stm32_extmemgpios(g_commonconfig, NCOMMON_CONFIG);
stm32_extmemgpios(g_norconfig, NNOR_CONFIG);
/* Enable AHB clocking to the FSMC */
stm32_enablefsmc();
/* Bank1 NOR/SRAM control register configuration */
putreg32(FSMC_BCR_NOR|FSMC_BCR_FACCEN|FSMC_BCR_MWID16|FSMC_BCR_WREN, STM32_FSMC_BCR2);
/* Bank1 NOR/SRAM timing register configuration */
putreg32(FSMC_BTR_ADDSET(3)|FSMC_BTR_ADDHLD(1)|FSMC_BTR_DATAST(6)|FSMC_BTR_BUSTRUN(1)|
FSMC_BTR_CLKDIV(1)|FSMC_BTR_DATLAT(2)|FSMC_BTR_ACCMODB, STM32_FSMC_BTR2);
putreg32(0x0fffffff, STM32_FSMC_BCR3);
/* Enable the bank */
putreg32(FSMC_BCR_MBKEN|FSMC_BCR_NOR|FSMC_BCR_FACCEN|FSMC_BCR_MWID16|FSMC_BCR_WREN, STM32_FSMC_BCR2);
}
#endif /* CONFIG_STM32_FSMC */

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@ -0,0 +1,144 @@
/************************************************************************************
* configs/stm3210e-eval/src/up_selectsram.c
* arch/arm/src/board/up_selectsram.c
*
* Copyright (C) 2009 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <debug.h>
#include "up_arch.h"
#include "stm32_fsmc.h"
#include "stm32_gpio.h"
#include "stm3210e-internal.h"
#ifdef CONFIG_STM32_FSMC
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
#if STM32_NGPIO_PORTS < 6
# error "Required GPIO ports not enabled"
#endif
/************************************************************************************
* Public Data
************************************************************************************/
/************************************************************************************
* Private Data
************************************************************************************/
/* 512Kx16 SRAM is connected to bank2 of the FSMC interface and both 8- and 16-bit
* accesses are allowed by BLN0 and BLN1 connected to BLE and BHE of SRAM,
* respectively.
*
* Pin Usage (per schematic)
* FLASH SRAM NAND
* D[0..15] [0..15] [0..15] [0..7]
* A[0..23] [0..22] [0..18] [16,17]
* PSMC_NE3 PG10 OUT ~CE --- ---
* PSMC_NBL0 PE0 OUT ~BLE --- ---
* PSMC_NBL1 PE1 OUT ~BHE --- ---
* PSMC_NE2 PG9 OUT --- ~E ---
* PSMC_NWE PD5 OUT ~WE ~W ~W
* PSMC_NOE PD4 OUT ~OE ~G ~R
* PSMC_NWAIT PD6 IN --- R~B ---
* PSMC_INT2 PG6* IN --- --- R~B
*
* *JP7 will switch to PD6
*/
/* GPIO configurations unique to SRAM */
static const uint16 g_sramconfig[] =
{
/* NE3, NBL0, NBL1, */
GPIO_NPS_NE3, GPIO_NPS_NBL0, GPIO_NPS_NBL1
};
#define NSRAM_CONFIG (sizeof(g_sramconfig)/sizeof(uint16))
/************************************************************************************
* Private Functions
************************************************************************************/
/************************************************************************************
* Public Functions
************************************************************************************/
/************************************************************************************
* Name: stm32_selectsram
*
* Description:
* Initialize to access external SRAM
*
************************************************************************************/
void stm32_selectsram(void)
{
/* Configure new GPIO state */
stm32_extmemgpios(g_commonconfig, NCOMMON_CONFIG);
stm32_extmemgpios(g_sramconfig, NSRAM_CONFIG);
/* Enable AHB clocking to the FSMC */
stm32_enablefsmc();
/* Bank1 NOR/SRAM control register configuration */
putreg32(FSMC_BCR_MWID16|FSMC_BCR_WREN, STM32_FSMC_BCR3);
/* Bank1 NOR/SRAM timing register configuration */
putreg32(FSMC_BTR_ADDSET(1)|FSMC_BTR_ADDHLD(1)|FSMC_BTR_DATAST(3)|FSMC_BTR_BUSTRUN(1)|
FSMC_BTR_CLKDIV(1)|FSMC_BTR_DATLAT(2)|FSMC_BTR_ACCMODA, STM32_FSMC_BTR3);
putreg32(0xffffffff, STM32_FSMC_BCR3);
/* Enable the bank */
putreg32(FSMC_BCR_MBKEN|FSMC_BCR_MWID16|FSMC_BCR_WREN, STM32_FSMC_BCR3);
}
#endif /* CONFIG_STM32_FSMC */