Initial Revision
git-svn-id: https://nuttx.svn.sourceforge.net/svnroot/nuttx/trunk@147 7fd9a85b-ad96-42d3-883c-3090e2eb8679
This commit is contained in:
patacongo
parent
17319ea6d2
commit
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This directory contains header files unique to the Spectrum Digital C5471 EVM.
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/************************************************************
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* c5471.h
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*
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* Copyright (C) 2007 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name Gregory Nutt nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************/
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#ifndef __C5471EVM_H
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#define __C5471EVM_H
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/************************************************************
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* Included Files
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************************************************************/
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#ifndef __ASSEMBLY__
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# include <sys/types.h>
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#endif
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/************************************************************
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* Definitions
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************************************************************/
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/* Clocking *************************************************/
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#define C5471_CLOCK 47500000 /* 47.5 MHz */
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/* LED definitions ******************************************/
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#define LED_STARTED 0
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#define LED_HEAPALLOCATE 1
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#define LED_IRQSENABLED 2
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#define LED_STACKCREATED 3
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#define LED_INIRQ 4
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#define LED_SIGNAL 5
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#define LED_ASSERTION 6
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#define LED_PANIC 7
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/************************************************************
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* Inline Functions
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************************************************************/
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#endif /* __C5471EVM_H */
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This directory contains header files unique to the M68322EVB.
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This directory contains header files unique to the Neuros dm320-based OSD.
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/************************************************************************************
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* ntosd.h
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*
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* Copyright (C) 2007 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name Gregory Nutt nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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#ifndef __NTOSD_H
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#define __NTOSD_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#ifndef __ASSEMBLY__
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# include <sys/types.h>
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#endif
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/************************************************************************************
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* Definitions
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************************************************************************************/
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/* This platform has the ARM at 175 MHz and the DSP at 101.25 MHz */
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#define DM320_ARM_CLOCK 175500000
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#define DM320_SDR_CLOCK 101250000
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#define DM320_DSP_CLOCK 101250000
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#define DM320_AXL_CLOCK 175500000
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#define DM320_AHB_CLOCK 87750000
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/*
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* configration for dm9000 network device
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*/
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#define DM9000_BASE CONFIG_DM9000_BASE
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/* GIO keyboard (GIO 1-5) */
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#define KEY_MASK 0x003E
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#define KEY_SCAN0_BIT 0x0002
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#define KEY_SCAN1_BIT 0x0004
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#define KEY_SCAN2_BIT 0x0008
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#define KEY_SCAN3_BIT 0x0010
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#define KEY_SCAN4_BIT 0x0020
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#define KEY_GIO_DIR0_VAL KEY_MASK /* Configure as INPUT */
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#define KEY_GIO_INV0_VAL KEY_MASK /* All inverted */
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#define KEY_GIO_SET0_VAL (0) /* Initialized to zero */
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#define KEY_GIO_CLR0_VAL (0)
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#define GIO_KEY_SCAN0 1
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#define GIO_KEY_SCAN1 2
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#define GIO_KEY_SCAN2 3
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#define GIO_KEY_SCAN3 4
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#define GIO_KEY_SCAN4 5
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#define GIO_MS_DETECT 5
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#define GIO_MMC_DETECT 8
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#define GIO_CFC_DETECT 9
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#define GIO_VIDEO_IN 10
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#define GIO_LED_RED 16
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#define GIO_LED_GREEN 17
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#define GIO_CFC_ENABLE 25
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#define GIO_I2C_SCL 30
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#define GIO_I2C_SDA 31
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#define GIO_ENA_VIDEO 32
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#define GIO_CFC_RESET 36
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#define GIO_CFC_STSCHG 37
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/************************************************************************************
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* Inline Functions
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************************************************************************************/
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#ifndef __ASSEMBLY__
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#endif
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#endif /* __NTOSD_H */
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This directory contains header files unique to the PJRC 87C52 development board.
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/**************************************************************************
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* pjrc.h
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*
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* Copyright (C) 2007 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
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* the documentation and/or other materials provided with the
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||||
* distribution.
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* 3. Neither the name Gregory Nutt nor the names of its contributors may be
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* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
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||||
*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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**************************************************************************/
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#ifndef __PJRC_H
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#define __PJRC_H
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/**************************************************************************
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* Included Files
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**************************************************************************/
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#include <sys/types.h>
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/**************************************************************************
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* Public Definitions
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**************************************************************************/
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/**************************************************************************
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* Public Types
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**************************************************************************/
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/**************************************************************************
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* Public Variables
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**************************************************************************/
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/* Memory Map
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*
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* BEGIN END DESCRIPTION
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* 0x0000 0x1fff CODE: ROM containg PAULMON2
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* DATA: RAM for program variables
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* 0x2000 0x7fff COMMON: RAM for program code or
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* variables
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* 0x8000 0xf7ff COMMON: FLASH for program code
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* 0xf800 0xfeff COMMON: Peripherals
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* 0xff00 0xffff COMMON: unused
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*
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* Program code may be loaded at the RAM location 0x2000-0x7fff
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* for testing. If loaded into the FLASH location at
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* 0x8000-0xf7ff, PAULMON2 will automatically write the program
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* into flash. The program is configured in the RAM-based test
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* configuration:
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*/
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#define RAM_BLOCK_START IRAM_SIZE
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#define RAM_BLOCK_END 0x1fff
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#define PROGRAM_BASE 0x2000
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#define PROGRAM_END 0x7fff
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#define FLASH_BASE 0x8000
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#define FLASH_END 0xf7ff
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/* Well-known entry points to access PAULMON2's built-in functions */
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#define PM2_ENTRY_PHEX1 0x002e
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#define PM2_ENTRY_COUT 0x0030
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#define PM2_ENTRY_CIN 0x0032
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#define PM2_ENTRY_PHEX 0x0034
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#define PM2_ENTRY_PHEX16 0x0036
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#define PM2_ENTRY_PSTR 0x0038
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#define PM2_ENTRY_ESC 0x003e
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#define PM2_ENTRY_UPPER 0x0040
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#define PM2_ENTRY_PINT8U 0x004D
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#define PM2_ENTRY_PINT8 0x0050
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#define PM2_ENTRY_PINT16U 0x0053
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#define PM2_ENTRY_NEWLINE 0x0048
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#define PM2_ENTRY_PRGM 0x0059
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#define PM2_ENTRY_ERBLOCK 0x0067
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/* PAULMON2 captures all interrupt vectors in ROM but relays them
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* through the following RAM addresses:
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*/
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#define PM2_VECTOR_BASE PROGRAM_BASE
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#define PM2_VECTOR_EXTINT0 (PM2_VECTOR_BASE + 3)
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#define PM2_VECTOR_TIMER0 (PM2_VECTOR_BASE + 11)
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#define PM2_VECTOR_EXTINT1 (PM2_VECTOR_BASE + 19)
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#define PM2_VECTOR_TIMER1 (PM2_VECTOR_BASE + 27)
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#define PM2_VECTOR_UART (PM2_VECTOR_BASE + 35)
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#define PM2_VECTOR_TIMER2 (PM2_VECTOR_BASE + 43)
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/* Peripheral Mapping
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*
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* Begin End Peripheral Addr Acc Function
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* F800 F8FF 82C55 (A, B, C) F800 R/W Port A
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* F801 R/W Port B
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* F802 R/W Port C
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* F803 W Config A,B,C
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* F900 F9FF 82C55 (D, E, F) F900 R/W Port D
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* F901 R/W Port E (LEDs)
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* F902 R/W Port F
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* F903 W Config D,E,F
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* FA00 FAFF User Expansion
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* FB00 FBFF User Expansion
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* FC00 FCFF User Expansion
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* FD00 FDFF User Expansion
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* FE00 FEFF LCD Port FE00 W Command Register
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* FE01 R Status Register
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* FE02 W Display or CGRAM Buffer
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* FE03 R " " "" " " " "
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*
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* These are the memory-mapped locations used to access the two 82C55
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* chips
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*/
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#ifndef __ASSEMBLY__
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xdata at 0xF800 ubyte p82c55_port_a;
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xdata at 0xF801 ubyte p82c55_port_b;
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xdata at 0xF802 ubyte p82c55_port_c;
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xdata at 0xF803 ubyte p82c55_abc_config;
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xdata at 0xF900 ubyte p82c55_port_d;
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xdata at 0xF901 ubyte p82c55_port_e;
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xdata at 0xF902 ubyte p82c55_port_f;
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xdata at 0xF903 ubyte p82c55_def_config;
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#endif
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/* LED (Port E) bit definitions */
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#define LED_STARTED 0
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#define LED_HEAPALLOCATE 1
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#define LED_IRQSENABLED 2
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#define LED_IDLE 3
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#define LED_UNUSED2 4
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#define LED_INIRQ 5
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#define LED_ASSERTION 6
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#define LED_PANIC 7
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/* Registers. 8052 regiser definitions are provided in the SDCC header
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* file 8052.h. However, a few SFR registers are missing from that
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* file (they can be found in mcs51reg.h, but that file is too much
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* when the following simple addtions do the job).
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*/
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#ifndef __ASSEMBLY__
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sfr at 0xc9 T2MOD ;
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#endif
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/* Timing information.
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*
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* The PJRC board is based on a standard 87C52 CPU clocked at 22.1184 MHz.
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* The CPU clock is divided by 12 to yield a clock frequency of 1.8432 MHz.
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*/
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#define CPU_CLOCK_HZ 22118400L
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#define TIMER_CLOCK_HZ 1843200L
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/* The 87C52 has three timers, timer 0, timer 1, and timer 2. On the PJRC
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* board, timer 1 and 2 have dedicated functions. They provide baud support
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* support for the boards two serial ports. Unfortunately, only timer 2
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* can generate the accurate 100Hz timer desired by the OS.
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*
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* Timer 0 provides only a 8-bit auto-reload mode.
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*/
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#ifdef CONFIG_8052_TIMER2
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/* To use timer 2 as the 100Hz system timer, we need to calculate a 16-bit
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* reload value that results in 100Hz overflow interrupts. That value
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* is given by:
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*
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* Timer ticks = TIMER_CLOCK_HZ / (desired ticks-per-second)
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* = 18432
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* Capture value = 0xffff - (Timer ticks)
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* = 47103 = 0x67ff
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*/
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# define TIMER2_CAPTURE_LOW 0xff
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# define TIMER2_CAPTURE_HIGH 0x67
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#else
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/* Timer 0, mode 0 can be used as a system timer. In that mode, the
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* 1.8432 is further divided by 32. A single 8-bit value is incremented
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* at 57600 Hz, which results in 225 Timer 0 overflow interrupts per
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* second.
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*/
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#endif
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/**************************************************************************
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* Public Function Prototypes
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**************************************************************************/
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#endif /* __PJRC_H */
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@ -0,0 +1 @@
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|||
This directory contains header files unique to the Linux user-mode platform.
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||||
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Reference in New Issue