PIC32MZ: Add low level UART support
This commit is contained in:
Gregory Nutt
parent
20855bdf14
commit
5978ab011d
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@ -65,6 +65,6 @@ endif
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CHIP_ASRCS =
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CHIP_CSRCS = pic32mz-lowinit.c pic32mz-exception.c pic32mz-decodeirq.c
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CHIP_CSRCS += pic32mz-irq.c pic32mz-timerisr.c
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CHIP_CSRCS += pic32mz-irq.c pic32mz-timerisr.c pic32mz-lowconsole.c
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# Configuration-dependent PIC32MZ files
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@ -52,7 +52,7 @@
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************************************************************************************/
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/* Timer Peripheral Offsets *********************************************************/
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#define PIC32MZ_TIMER_OFFSET(n) ((n) << 9)
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#define PIC32MZ_TIMERn_OFFSET(n) ((n) << 9)
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# define PIC32MZ_TIMER1_OFFSET 0x0000
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# define PIC32MZ_TIMER2_OFFSET 0x0200
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# define PIC32MZ_TIMER3_OFFSET 0x0400
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@ -82,16 +82,16 @@
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/* Timer Peripheral Addresses *******************************************************/
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#define PIC32MZ_TIMERn_K1BASE(n) (PIC32MZ_TIMER_K1BASE+PIC32MZ_TIMER_OFFSET(n))
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#define PIC32MZ_TIMER1_K1BASE (PIC32MZ_TIMER_K1BASE+PIC32MZ_TIMER1_OFFSET)
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#define PIC32MZ_TIMER2_K1BASE (PIC32MZ_TIMER_K1BASE+PIC32MZ_TIMER2_OFFSET)
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#define PIC32MZ_TIMER3_K1BASE (PIC32MZ_TIMER_K1BASE+PIC32MZ_TIMER3_OFFSET)
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#define PIC32MZ_TIMER4_K1BASE (PIC32MZ_TIMER_K1BASE+PIC32MZ_TIMER4_OFFSET)
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#define PIC32MZ_TIMER5_K1BASE (PIC32MZ_TIMER_K1BASE+PIC32MZ_TIMER5_OFFSET)
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#define PIC32MZ_TIMER6_K1BASE (PIC32MZ_TIMER_K1BASE+PIC32MZ_TIMER6_OFFSET)
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#define PIC32MZ_TIMER7_K1BASE (PIC32MZ_TIMER_K1BASE+PIC32MZ_TIMER7_OFFSET)
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#define PIC32MZ_TIMER8_K1BASE (PIC32MZ_TIMER_K1BASE+PIC32MZ_TIMER8_OFFSET)
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#define PIC32MZ_TIMER9_K1BASE (PIC32MZ_TIMER_K1BASE+PIC32MZ_TIMER9_OFFSET)
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#define PIC32MZ_TIMERn_K1BASE(n) (PIC32MZ_TIMER_K1BASE+PIC32MZ_TIMERn_OFFSET(n))
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# define PIC32MZ_TIMER1_K1BASE (PIC32MZ_TIMER_K1BASE+PIC32MZ_TIMER1_OFFSET)
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# define PIC32MZ_TIMER2_K1BASE (PIC32MZ_TIMER_K1BASE+PIC32MZ_TIMER2_OFFSET)
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# define PIC32MZ_TIMER3_K1BASE (PIC32MZ_TIMER_K1BASE+PIC32MZ_TIMER3_OFFSET)
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# define PIC32MZ_TIMER4_K1BASE (PIC32MZ_TIMER_K1BASE+PIC32MZ_TIMER4_OFFSET)
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# define PIC32MZ_TIMER5_K1BASE (PIC32MZ_TIMER_K1BASE+PIC32MZ_TIMER5_OFFSET)
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# define PIC32MZ_TIMER6_K1BASE (PIC32MZ_TIMER_K1BASE+PIC32MZ_TIMER6_OFFSET)
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# define PIC32MZ_TIMER7_K1BASE (PIC32MZ_TIMER_K1BASE+PIC32MZ_TIMER7_OFFSET)
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# define PIC32MZ_TIMER8_K1BASE (PIC32MZ_TIMER_K1BASE+PIC32MZ_TIMER8_OFFSET)
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# define PIC32MZ_TIMER9_K1BASE (PIC32MZ_TIMER_K1BASE+PIC32MZ_TIMER9_OFFSET)
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/* Register Addresses ***************************************************************/
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@ -1,5 +1,5 @@
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/************************************************************************************
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* arch/mips/src/pic32mx/pic32mx-uart.h
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* arch/mips/src/pic42mz/pic42mz-uart.h
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*
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* Copyright (C) 2015 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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@ -43,11 +43,21 @@
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#include <nuttx/config.h>
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#include <arch/pic32mz/chip.h>
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#include "pic32mx-memorymap.h"
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#include "chip/pic32mz-memorymap.h"
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/************************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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/* UART Peripheral Offsets **********************************************************/
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#define PIC32MZ_UARTn_OFFSET(n) ((n) << 9)
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# define PIC32MZ_UART1_OFFSET 0x0000
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# define PIC32MZ_UART2_OFFSET 0x0200
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# define PIC32MZ_UART3_OFFSET 0x0400
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# define PIC32MZ_UART4_OFFSET 0x0600
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# define PIC32MZ_UART5_OFFSET 0x0800
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# define PIC32MZ_UART6_OFFSET 0x0a00
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/* Register Offsets *****************************************************************/
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#define PIC32MZ_UART_MODE_OFFSET 0x0000 /* UARTx mode register */
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@ -68,6 +78,19 @@
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#define PIC32MZ_UART_BRGSET_OFFSET 0x0048 /* UARTx baud rate set register */
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#define PIC32MZ_UART_BRGINV_OFFSET 0x004c /* UARTx baud rate invert register */
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/* Timer Peripheral Addresses *******************************************************/
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#define PIC32MZ_UARTn_K1BASE(n) (PIC32MZ_UART_K1BASE+PIC32MZ_UARTn_OFFSET(n))
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# define PIC32MZ_UART1_K1BASE (PIC32MZ_UART_K1BASE+PIC32MZ_UART1_OFFSET)
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# define PIC32MZ_UART2_K1BASE (PIC32MZ_UART_K1BASE+PIC32MZ_UART2_OFFSET)
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# define PIC32MZ_UART3_K1BASE (PIC32MZ_UART_K1BASE+PIC32MZ_UART3_OFFSET)
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# define PIC32MZ_UART4_K1BASE (PIC32MZ_UART_K1BASE+PIC32MZ_UART4_OFFSET)
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# define PIC32MZ_UART5_K1BASE (PIC32MZ_UART_K1BASE+PIC32MZ_UART5_OFFSET)
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# define PIC32MZ_UART6_K1BASE (PIC32MZ_UART_K1BASE+PIC32MZ_UART6_OFFSET)
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# define PIC32MZ_UART7_K1BASE (PIC32MZ_UART_K1BASE+PIC32MZ_UART7_OFFSET)
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# define PIC32MZ_UART8_K1BASE (PIC32MZ_UART_K1BASE+PIC32MZ_UART8_OFFSET)
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# define PIC32MZ_UART9_K1BASE (PIC32MZ_UART_K1BASE+PIC32MZ_UART9_OFFSET)
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/* Register Addresses ****************************************************************/
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#if CHIP_NUARTS > 0
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@ -209,9 +232,9 @@
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#define UART_STA_ADDEN (1 << 5) /* Bit 5: Address character detect */
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#define UART_STA_URXISEL_SHIFT (6) /* Bits: 6-7: Receive interrupt mode selection */
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#define UART_STA_URXISEL_MASK (3 << UART_STA_URXISEL_SHIFT)
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#define UART_STA_URXISEL_RECVD (0 << UART_STA_URXISEL_SHIFT) /* Character received */
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#define UART_STA_URXISEL_RXB50 (1 << UART_STA_URXISEL_SHIFT) /* RX buffer 1/2 full */
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#define UART_STA_URXISEL_RXB75 (2 << UART_STA_URXISEL_SHIFT) /* RX buffer 3/4 full */
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# define UART_STA_URXISEL_RECVD (0 << UART_STA_URXISEL_SHIFT) /* Character received */
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# define UART_STA_URXISEL_RXB50 (1 << UART_STA_URXISEL_SHIFT) /* RX buffer 1/2 full */
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# define UART_STA_URXISEL_RXB75 (2 << UART_STA_URXISEL_SHIFT) /* RX buffer 3/4 full */
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#define UART_STA_UTRMT (1 << 8) /* Bit 8: Transmit shift register is empty */
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#define UART_STA_UTXBF (1 << 9) /* Bit 9: Transmit buffer full status */
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#define UART_STA_UTXEN (1 << 10) /* Bit 10: Transmit enable */
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@ -0,0 +1,352 @@
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/******************************************************************************
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* arch/mips/src/pic32mz/pic32mz-lowconsole.c
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*
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* Copyright (C) 2015 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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******************************************************************************/
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/******************************************************************************
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* Included Files
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******************************************************************************/
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#include <nuttx/config.h>
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#include <assert.h>
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#include <debug.h>
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#include <arch/irq.h>
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#include <arch/board/board.h>
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#include "up_arch.h"
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#include "up_internal.h"
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#include "pic32mz-config.h"
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#include "chip/pic32mz-uart.h"
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/******************************************************************************
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* Pre-processor Definitions
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******************************************************************************/
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/* Select UART parameters for the selected console */
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#ifdef HAVE_SERIAL_CONSOLE
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# if defined(CONFIG_UART1_SERIAL_CONSOLE)
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# define PIC32MZ_CONSOLE_BASE PIC32MZ_UART1_K1BASE
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# define PIC32MZ_CONSOLE_BAUD CONFIG_UART1_BAUD
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# define PIC32MZ_CONSOLE_BITS CONFIG_UART1_BITS
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# define PIC32MZ_CONSOLE_PARITY CONFIG_UART1_PARITY
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# define PIC32MZ_CONSOLE_2STOP CONFIG_UART1_2STOP
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# elif defined(CONFIG_UART2_SERIAL_CONSOLE)
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# define PIC32MZ_CONSOLE_BASE PIC32MZ_UART2_K1BASE
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# define PIC32MZ_CONSOLE_BAUD CONFIG_UART2_BAUD
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# define PIC32MZ_CONSOLE_BITS CONFIG_UART2_BITS
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# define PIC32MZ_CONSOLE_PARITY CONFIG_UART2_PARITY
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# define PIC32MZ_CONSOLE_2STOP CONFIG_UART2_2STOP
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# elif defined(CONFIG_UART3_SERIAL_CONSOLE)
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# define PIC32MZ_CONSOLE_BASE PIC32MZ_UART3_K1BASE
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# define PIC32MZ_CONSOLE_BAUD CONFIG_UART3_BAUD
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# define PIC32MZ_CONSOLE_BITS CONFIG_UART3_BITS
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# define PIC32MZ_CONSOLE_PARITY CONFIG_UART3_PARITY
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# define PIC32MZ_CONSOLE_2STOP CONFIG_UART3_2STOP
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# elif defined(CONFIG_UART4_SERIAL_CONSOLE)
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# define PIC32MZ_CONSOLE_BASE PIC32MZ_UART4_K1BASE
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# define PIC32MZ_CONSOLE_BAUD CONFIG_UART4_BAUD
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# define PIC32MZ_CONSOLE_BITS CONFIG_UART4_BITS
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# define PIC32MZ_CONSOLE_PARITY CONFIG_UART4_PARITY
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# define PIC32MZ_CONSOLE_2STOP CONFIG_UART4_2STOP
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# elif defined(CONFIG_UART5_SERIAL_CONSOLE)
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# define PIC32MZ_CONSOLE_BASE PIC32MZ_UART5_K1BASE
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# define PIC32MZ_CONSOLE_BAUD CONFIG_UART5_BAUD
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# define PIC32MZ_CONSOLE_BITS CONFIG_UART5_BITS
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# define PIC32MZ_CONSOLE_PARITY CONFIG_UART5_PARITY
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# define PIC32MZ_CONSOLE_2STOP CONFIG_UART5_2STOP
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# elif defined(CONFIG_UART6_SERIAL_CONSOLE)
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# define PIC32MZ_CONSOLE_BASE PIC32MZ_UART6_K1BASE
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# define PIC32MZ_CONSOLE_BAUD CONFIG_UART6_BAUD
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# define PIC32MZ_CONSOLE_BITS CONFIG_UART6_BITS
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# define PIC32MZ_CONSOLE_PARITY CONFIG_UART6_PARITY
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# define PIC32MZ_CONSOLE_2STOP CONFIG_UART6_2STOP
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# else
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# error "No CONFIG_UARTn_SERIAL_CONSOLE Setting"
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# endif
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#endif
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/******************************************************************************
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* Private Types
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******************************************************************************/
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/******************************************************************************
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* Private Function Prototypes
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******************************************************************************/
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/******************************************************************************
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* Global Variables
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******************************************************************************/
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/******************************************************************************
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* Private Variables
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******************************************************************************/
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/******************************************************************************
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* Private Functions
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******************************************************************************/
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/******************************************************************************
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* Name: pic32mz_putreg
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*
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* Description:
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* Write a value to a UART register
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*
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******************************************************************************/
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#ifdef HAVE_UART_DEVICE
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static inline void pic32mz_putreg(uintptr_t uart_base, unsigned int offset,
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uint32_t value)
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{
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putreg32(value, uart_base + offset);
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}
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#endif
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/******************************************************************************
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* Name: pic32mz_getreg
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*
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* Description:
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* Get a value from a UART register
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*
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******************************************************************************/
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#ifdef HAVE_UART_DEVICE
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static inline uint32_t pic32mz_getreg(uintptr_t uart_base,
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unsigned int offset)
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{
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return getreg32(uart_base + offset);
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}
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#endif
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/******************************************************************************
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* Name: pic32mz_uartsetbaud
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*
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* Description:
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* Configure the UART baud rate.
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*
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* With BRGH=0
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* BAUD = PBCLK2 / 16 / (BRG+1)
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* BRG = PBCLK2 / 16 / BAUD - 1
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* With BRGH=1
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* BAUD = PBCLK2 / 4 / (BRG+1)
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* BRG = PBCLK2 / 4 / BAUD - 1
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*
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*
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******************************************************************************/
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#ifdef HAVE_UART_DEVICE
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static void pic32mz_uartsetbaud(uintptr_t uart_base, uint32_t baudrate)
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{
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uint32_t tmp;
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uint32_t brg;
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unsigned int mode;
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/* We want the largest value of BRG divisor possible (for the best accuracy).
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* Subject to BRG <= 65536.
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*/
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tmp = BOARD_PBCLK2 / baudrate;
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/* Try BRGH=1 first. This will select the 4x divisor and will produce the
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* larger BRG divisor, given all other things equal.
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*/
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brg = (tmp + 2) >> 2;
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mode = PIC32MZ_UART_MODESET_OFFSET;
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if (brg > 65536)
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{
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/* Nope, too big.. try BRGH=0 */
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brg = (tmp + 8) >> 4;
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mode = PIC32MZ_UART_MODECLR_OFFSET;
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}
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DEBUGASSERT(brg <= 65536);
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/* Set the BRG divisor */
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pic32mz_putreg(uart_base, mode, UART_MODE_BRGH);
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pic32mz_putreg(uart_base, PIC32MZ_UART_BRG_OFFSET, brg);
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}
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#endif
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/******************************************************************************
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* Public Functions
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******************************************************************************/
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/******************************************************************************
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* Name: pic32mz_uartreset
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*
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* Description:
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* Reset hardware and disable Rx and Tx.
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*
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******************************************************************************/
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#ifdef HAVE_UART_DEVICE
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void pic32mz_uartreset(uintptr_t uart_base)
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{
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/* Doesn't reset the hardware... just shuts it down */
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pic32mz_putreg(uart_base, PIC32MZ_UART_STACLR_OFFSET,
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UART_STA_UTXEN | UART_STA_URXEN);
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pic32mz_putreg(uart_base, PIC32MZ_UART_MODECLR_OFFSET, UART_MODE_ON);
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}
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#endif
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/******************************************************************************
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* Name: pic32mz_uartconfigure
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*
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* Description:
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* Configure a UART as a RS-232 UART.
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*
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******************************************************************************/
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#ifdef HAVE_UART_DEVICE
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void pic32mz_uartconfigure(uintptr_t uart_base, uint32_t baudrate,
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unsigned int parity, unsigned int nbits, bool stop2)
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{
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/* Clear mode and sta bits */
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pic32mz_putreg(uart_base, PIC32MZ_UART_MODECLR_OFFSET,
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UART_MODE_STSEL | UART_MODE_PDSEL_MASK | UART_MODE_BRGH |
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UART_MODE_RXINV | UART_MODE_WAKE | UART_MODE_LPBACK |
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UART_MODE_UEN_MASK | UART_MODE_RTSMD | UART_MODE_IREN |
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UART_MODE_SIDL | UART_MODE_ON);
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/* Configure the FIFOs:
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*
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* RX: Interrupt at 75% FIFO full (6 of 8 for 8-deep FIFO)
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* TX: Interrupt on FIFO empty
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* Invert transmit polarity.
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*
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* NOTE that there are not many options on trigger TX interrupts. The FIFO not
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* full might generate better through-put but with a higher interrupt rate. FIFO
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* empty should lower the interrupt rate but result in a burstier output. If
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* you change this, please read the comment for acknowledging the interrupt in
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* pic32mz-serial.c
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*/
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pic32mz_putreg(uart_base, PIC32MZ_UART_STACLR_OFFSET,
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UART_STA_UTXINV | UART_STA_UTXISEL_TXBE | UART_STA_URXISEL_RXB75);
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/* Configure the FIFO interrupts */
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pic32mz_putreg(uart_base, PIC32MZ_UART_STASET_OFFSET,
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UART_STA_UTXISEL_TXBNF | UART_STA_URXISEL_RECVD);
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/* Configure word size and parity */
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if (nbits == 9)
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{
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DEBUGASSERT(parity == 0);
|
||||
pic32mz_putreg(uart_base, PIC32MZ_UART_MODESET_OFFSET,
|
||||
UART_MODE_PDSEL_9NONE);
|
||||
}
|
||||
else
|
||||
{
|
||||
DEBUGASSERT(nbits == 8);
|
||||
if (parity == 1)
|
||||
{
|
||||
pic32mz_putreg(uart_base, PIC32MZ_UART_MODESET_OFFSET,
|
||||
UART_MODE_PDSEL_8ODD);
|
||||
}
|
||||
else if (parity == 2)
|
||||
{
|
||||
pic32mz_putreg(uart_base, PIC32MZ_UART_MODESET_OFFSET,
|
||||
UART_MODE_PDSEL_8EVEN);
|
||||
}
|
||||
}
|
||||
|
||||
/* Configure 1 or 2 stop bits */
|
||||
|
||||
if (stop2)
|
||||
{
|
||||
pic32mz_putreg(uart_base, PIC32MZ_UART_MODESET_OFFSET,
|
||||
UART_MODE_STSEL);
|
||||
}
|
||||
|
||||
/* Set the BRG divisor */
|
||||
|
||||
pic32mz_uartsetbaud(uart_base, baudrate);
|
||||
|
||||
/* Enable the UART */
|
||||
|
||||
pic32mz_putreg(uart_base, PIC32MZ_UART_STASET_OFFSET,
|
||||
UART_STA_UTXEN | UART_STA_URXEN);
|
||||
pic32mz_putreg(uart_base, PIC32MZ_UART_MODESET_OFFSET,
|
||||
UART_MODE_ON);
|
||||
}
|
||||
#endif
|
||||
|
||||
/******************************************************************************
|
||||
* Name: pic32mz_consoleinit
|
||||
*
|
||||
* Description:
|
||||
* Initialize a low-level console for debug output. This function is called
|
||||
* very early in the initialization sequence to configure the serial console
|
||||
* UART (only).
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
#ifdef HAVE_SERIAL_CONSOLE
|
||||
void pic32mz_consoleinit(void)
|
||||
{
|
||||
pic32mz_uartconfigure(PIC32MZ_CONSOLE_BASE, PIC32MZ_CONSOLE_BAUD,
|
||||
PIC32MZ_CONSOLE_PARITY, PIC32MZ_CONSOLE_BITS,
|
||||
PIC32MZ_CONSOLE_2STOP);
|
||||
}
|
||||
#endif
|
||||
|
||||
/******************************************************************************
|
||||
* Name: up_lowputc
|
||||
*
|
||||
* Description:
|
||||
* Output one byte on the serial console.
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
void up_lowputc(char ch)
|
||||
{
|
||||
#ifdef HAVE_SERIAL_CONSOLE
|
||||
/* Wait for the transmit buffer not full */
|
||||
|
||||
while ((pic32mz_getreg(PIC32MZ_CONSOLE_BASE, PIC32MZ_UART_STA_OFFSET) & UART_STA_UTXBF) != 0);
|
||||
|
||||
/* Then write the character to the TX data register */
|
||||
|
||||
pic32mz_putreg(PIC32MZ_CONSOLE_BASE, PIC32MZ_UART_TXREG_OFFSET, (uint32_t)ch);
|
||||
#endif
|
||||
}
|
||||
Loading…
Reference in New Issue