Address should not be shifted in SET_ADDRESS
git-svn-id: https://nuttx.svn.sourceforge.net/svnroot/nuttx/trunk@3225 7fd9a85b-ad96-42d3-883c-3090e2eb8679
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@ -656,12 +656,26 @@ static int lpc17_ctrltd(struct lpc17_usbhost_s *priv, uint32_t dirpid,
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priv->tdstatus = 0;
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priv->tdstatus = 0;
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lpc17_enqueuetd(EDCTRL, dirpid, toggle, buffer, buflen);
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lpc17_enqueuetd(EDCTRL, dirpid, toggle, buffer, buflen);
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/* Set the head of the control list to the EP0 EDCTRL (this would have to
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* change if we want more than on control EP queued at a time).
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*/
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lpc17_putreg(LPC17_EDCTRL_ADDR, LPC17_USBHOST_CTRLHEADED);
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lpc17_putreg(LPC17_EDCTRL_ADDR, LPC17_USBHOST_CTRLHEADED);
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/* Set ControlListFilled. This bit is used to indicate whether there are
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* TDs on the Control list.
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*/
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regval = lpc17_getreg(LPC17_USBHOST_CMDST);
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regval = lpc17_getreg(LPC17_USBHOST_CMDST);
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regval |= OHCI_CMDST_CLF;
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regval |= OHCI_CMDST_CLF;
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lpc17_putreg(regval, LPC17_USBHOST_CMDST);
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lpc17_putreg(regval, LPC17_USBHOST_CMDST);
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/* ControlListEnable. This bit is set to enable the processing of the
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* Control list. Note: once enabled, it remains enabled and we may even
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* complete list processing before we get the bit set. We really
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* should never modify the control list while CLE is set.
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*/
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regval = lpc17_getreg(LPC17_USBHOST_CTRL);
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regval = lpc17_getreg(LPC17_USBHOST_CTRL);
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regval |= OHCI_CTRL_CLE;
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regval |= OHCI_CTRL_CLE;
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lpc17_putreg(regval, LPC17_USBHOST_CTRL);
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lpc17_putreg(regval, LPC17_USBHOST_CTRL);
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@ -714,7 +728,7 @@ static int lpc17_usbinterrupt(int irq, FAR void *context)
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if ((intstatus & OHCI_INT_RHSC) != 0)
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if ((intstatus & OHCI_INT_RHSC) != 0)
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{
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{
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uint32_t rhportst1 = lpc17_getreg(LPC17_USBHOST_RHPORTST1);
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uint32_t rhportst1 = lpc17_getreg(LPC17_USBHOST_RHPORTST1);
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ullvdbg("Root Hub Status Change, RHPORTST: %08x\n", rhportst1);
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ullvdbg("Root Hub Status Change, RHPORTST1: %08x\n", rhportst1);
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if ((rhportst1 & OHCI_RHPORTST_CSC) != 0)
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if ((rhportst1 & OHCI_RHPORTST_CSC) != 0)
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{
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{
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@ -782,7 +796,7 @@ static int lpc17_usbinterrupt(int irq, FAR void *context)
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}
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}
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}
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}
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/* Clear the CSC interrupt */
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/* Clear the status change interrupt */
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lpc17_putreg(OHCI_RHPORTST_CSC, LPC17_USBHOST_RHPORTST1);
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lpc17_putreg(OHCI_RHPORTST_CSC, LPC17_USBHOST_RHPORTST1);
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}
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}
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@ -1245,12 +1259,26 @@ static int lpc17_transfer(FAR struct usbhost_driver_s *drvr,
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priv->tdstatus = 0;
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priv->tdstatus = 0;
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lpc17_enqueuetd(ed, dirpid, GTD_STATUS_T_TOGGLE, buffer, buflen);
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lpc17_enqueuetd(ed, dirpid, GTD_STATUS_T_TOGGLE, buffer, buflen);
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/* Set the head of the bulk list to the EP descriptor (this would have to
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* change if we want more than on bulk EP queued at a time).
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*/
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lpc17_putreg((uint32_t)ed, LPC17_USBHOST_BULKHEADED);
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lpc17_putreg((uint32_t)ed, LPC17_USBHOST_BULKHEADED);
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/* BulkListFilled. This bit is used to indicate whether there are any
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* TDs on the Bulk list.
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*/
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regval = lpc17_getreg(LPC17_USBHOST_CMDST);
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regval = lpc17_getreg(LPC17_USBHOST_CMDST);
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regval |= OHCI_CMDST_BLF;
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regval |= OHCI_CMDST_BLF;
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lpc17_putreg(regval, LPC17_USBHOST_CMDST);
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lpc17_putreg(regval, LPC17_USBHOST_CMDST);
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/* BulkListEnable. This bit is set to enable the processing of the Bulk
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* list. Note: once enabled, it remains enabled and we may even
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* complete list processing before we get the bit set. We really
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* should never modify the bulk list while BLE is set.
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*/
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regval = lpc17_getreg(LPC17_USBHOST_CTRL);
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regval = lpc17_getreg(LPC17_USBHOST_CTRL);
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regval |= OHCI_CTRL_BLE;
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regval |= OHCI_CTRL_BLE;
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lpc17_putreg(regval, LPC17_USBHOST_CTRL);
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lpc17_putreg(regval, LPC17_USBHOST_CTRL);
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@ -391,7 +391,7 @@ int usbhost_enumerate(FAR struct usbhost_driver_s *drvr,
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ctrlreq->type = USB_REQ_DIR_OUT|USB_REQ_RECIPIENT_DEVICE;
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ctrlreq->type = USB_REQ_DIR_OUT|USB_REQ_RECIPIENT_DEVICE;
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ctrlreq->req = USB_REQ_SETADDRESS;
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ctrlreq->req = USB_REQ_SETADDRESS;
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usbhost_putle16(ctrlreq->value, (1 << 8));
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usbhost_putle16(ctrlreq->value, 1);
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usbhost_putle16(ctrlreq->index, 0);
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usbhost_putle16(ctrlreq->index, 0);
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usbhost_putle16(ctrlreq->len, 0);
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usbhost_putle16(ctrlreq->len, 0);
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@ -240,7 +240,7 @@
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/* HcRhPortStatus: Root hub port status (7.4.4) */
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/* HcRhPortStatus: Root hub port status (7.4.4) */
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#define OHCI_RHPORTST_CCS (1 << 0) /* Bit 0: Current connect status */
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#define OHCI_RHPORTST_CCS (1 << 0) /* Bit 0: Current connect status */
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#define OHCI_RHPORTST_PES (1 << 1) /* Bit 1: Port enable status*/
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#define OHCI_RHPORTST_PES (1 << 1) /* Bit 1: Port enable status */
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#define OHCI_RHPORTST_PSS (1 << 2) /* Bit 2: Port suspend status */
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#define OHCI_RHPORTST_PSS (1 << 2) /* Bit 2: Port suspend status */
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#define OHCI_RHPORTST_POCI (1 << 3) /* Bit 3: Port over current indicator */
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#define OHCI_RHPORTST_POCI (1 << 3) /* Bit 3: Port over current indicator */
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#define OHCI_RHPORTST_PRS (1 << 4) /* Bit 4: Port reset status */
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#define OHCI_RHPORTST_PRS (1 << 4) /* Bit 4: Port reset status */
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