Update On-demand paging documentation
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@ -12,7 +12,7 @@
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<h1><big><font color="#3c34ec">
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<i>NuttX RTOS Porting Guide</i>
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</font></big></h1>
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<p>Last Updated: August 16, 2010</p>
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<p>Last Updated: August 21, 2010</p>
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</td>
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</tr>
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</table>
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@ -2390,7 +2390,6 @@ extern void up_ledoff(int led);
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If CONFIG_PAGING is selected, then the following also apply:
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</p>
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<ul>
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</li>
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<li>
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<code>CONFIG_PAGING_PAGESIZE</code>:
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The size of one managed page.
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@ -2403,30 +2402,68 @@ extern void up_ledoff(int led);
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(<code>CONFIG_DRAM_VSTART</code> + <code>CONFIG_PAGING_PAGESIZE</code>*<code>CONFIG_PAGING_NLOCKED</code>)
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</li>
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<li>
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<code>CONFIG_PAGING_NPAGES</code>:
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The number of pages in the paged region of the memory map.
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This paged region then begins at
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(<code>CONFIG_DRAM_VSTART</code> + <code>CONFIG_PAGING_PAGESIZE</code>*<code>CONFIG_PAGING_NLOCKED</code>)
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and continues until (<code>CONFIG_DRAM_VSTART</code> +
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<code>CONFIG_PAGING_PAGESIZE</code>*(<code>CONFIG_PAGING_NLOCKED</code> + <code>CONFIG_PAGING_NPAGES</code>)
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<code>CONFIG_PAGING_LOCKED_PBASE</code> and <code>CONFIG_PAGING_LOCKED_VBASE</code>:
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These may be defined to determine the base address of the locked page regions.
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If neither are defined, the logic will be set the bases to <code>CONFIG_DRAM_START</code>
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and <code>CONFIG_DRAM_VSTART</code> (i.e., it assumes that the base address of the locked
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region is at the beginning of RAM).
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<b>NOTE</b>:
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In some architectures, it may be necessary to take some memory from the beginning
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of this region for vectors or for a page table.
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In such cases, <code>CONFIG_PAGING_LOCKED_P/VBASE</code> should take that into consideration
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to prevent overlapping the locked memory region and the system data at the beginning of SRAM.
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</li>
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<li>
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<code>CONFIG_PAGING_NPPAGED</code>:
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This is the number of physical pages available to support the paged text region.
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This paged region begins at
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(<code>CONFIG_PAGING_LOCKED_PBASE</code> + <code>CONFIG_PAGING_PAGESIZE</code>*<code>CONFIG_PAGING_NPPAGED</code>)
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and continues until
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(<code>CONFIG_PAGING_LOCKED_PBASE</code> + <code>CONFIG_PAGING_PAGESIZE</code>*(<code>CONFIG_PAGING_NLOCKED</code> +
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<code>CONFIG_PAGING_NPPAGED</code>)
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</li>
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<li>
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<code>CONFIG_PAGING_NVPAGED</code>:
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This actual size of the paged text region (in pages).
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This is also the number of virtual pages required to support the entire paged region.
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The on-demand paging feature is intended to support only the case where the virtual paged text
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area is much larger the available physical pages.
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Otherwise, why would you enable on-demand paging?
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</li>
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<li>
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<code>CONFIG_PAGING_NDATA</code>:
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This is the number of data pages in the memory map.
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The data region will extend to the end of RAM unless overridden by a setting in the configuration file.
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<b>NOTE</b>:
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In some architectures, it may be necessary to take some memory from the end of RAM for page tables
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or other system usage.
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The configuration settings and linker directives must be cognizant of that:
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<code>CONFIG_PAGING_NDATA</code> should be defined to prevent the data region from extending all the way to the end of memory.
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</li>
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<li>
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<code>CONFIG_PAGING_DEFPRIO</code>:
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The default, minimum priority of the page fill worker thread.
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The priority of the page fill work thread will be boosted boosted dynmically so that it matches the priority of the task on behalf of which it peforms the fill.
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This defines the minimum priority that will be used.
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Default: 50.
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The priority of the page fill work thread will be boosted boosted dynmically so that it matches the
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priority of the task on behalf of which it peforms the fill.
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This defines the minimum priority that will be used. Default: 50.
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</li>
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<li>
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<code>CONFIG_PAGING_STACKSIZE </code>:
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Defines the size of the allocated stack for the page fill worker thread.
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Default: 1024.
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<code>CONFIG_PAGING_STACKSIZE</code>:
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Defines the size of the allocated stack for the page fill worker thread. Default: 1024.
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</li>
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<li>
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<code>CONFIG_PAGING_BLOCKINGFILL</code>:
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The architecture specific <code>up_fillpage()</code> function may be blocking or non-blocking.
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If defined, this setting indicates that the <code>up_fillpage()</code> implementation will block until the transfer is completed.
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Default: Undefined (non-blocking).
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If defined, this setting indicates that the <code>up_fillpage()</code> implementation will block until the
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transfer is completed. Default: Undefined (non-blocking).
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</li>
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<li>
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<code>CONFIG_PAGING_WORKPERIOD</code>:
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The page fill worker thread will wake periodically even if there is no mapping to do.
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This selection controls that wake-up period (in microseconds).
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This wake-up a failsafe that will handle any cases where a single is lost (that would
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really be a bug and shouldn't happen!)
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and also supports timeouts for case of non-blocking, asynchronous fills (see <code>CONFIG_PAGING_TIMEOUT_TICKS</code>).
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</li>
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<li>
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<code>CONFIG_PAGING_TIMEOUT_TICKS</code>:
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@ -2434,6 +2471,23 @@ extern void up_ledoff(int led);
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If the fill takes longer than this number if microseconds, then a fatal error will be declared.
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Default: No timeouts monitored.
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</li>
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<p>
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Some architecture-specific settings.
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Defaults are architecture specific.
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If you don't know what you are doing, it is best to leave these undefined and try the system defaults:
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</p>
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<li>
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<code>CONFIG_PAGING_VECPPAGE</code>:
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This the physical address of the page in memory to be mapped to the vector address.
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</li>
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<li>
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<code>CONFIG_PAGING_VECL2PADDR</code>:
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This is the physical address of the L2 page table entry to use for the vector mapping.
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</li>
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<li>
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<code>CONFIG_PAGING_VECL2VADDR</code>:
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This is the virtual address of the L2 page table entry to use for the vector mapping.
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</li>
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</ul>
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<p>
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The following can be used to disable categories of APIs supported
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@ -292,46 +292,49 @@
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#ifdef __ASSEMBLY__
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/****************************************************************************
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* Name: pg_map
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* Name: pg_l2map
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*
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* Description:
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* Write several, contiguous L2 page table entries. npages entries will be
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* written. This macro is used when CONFIG_PAGING is enable. This case,
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* it is used asfollows:
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*
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* ldr r0, =PG_L2_BASE_PADDR
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* ldr r1, =PG_LOCKED_PBASE
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* ldr r2, =CONFIG_PAGING_NLOCKED
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* ldr r3, =MMUFLAGS
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* pg_map r0, r1, r2, r3, r4
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* ldr r0, =PG_L2_BASE_PADDR <-- Address in L2 table
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* ldr r1, =PG_LOCKED_PBASE <-- Physical page memory address
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* ldr r2, =CONFIG_PAGING_NLOCKED <-- number of pages
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* ldr r3, =MMUFLAGS <-- L2 MMU flags
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* pg_l2map r0, r1, r2, r3, r4
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*
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* Inputs:
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* l2 - Physical start address in the L2 page table (modified)
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* paddr - The physical address of the start of the region to span. Must
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* be aligned to 1Mb section boundaries (modified)
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* l2 - Physical or virtual start address in the L2 page table, depending
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* upon the context. (modified)
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* ppage - The physical address of the start of the region to span. Must
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* be aligned to 1Mb section boundaries (modified)
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* npages - Number of pages to write in the section (modified)
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* mmuflags - L2 MMU FLAGS
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*
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* Scratch registers (modified): tmp
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* l2 - Physical address in the L2 page table.
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* l2 - Next address in the L2 page table.
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* ppage - Start of next physical page
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* npages - Loop counter
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* tmp - scratch
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*
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* Assumptions:
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* - The MMU is not yet enabled
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* - The L2 page tables have been zeroed prior to calling this function
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* - pg_span has been called to initialize the L1 table.
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* - pg_l1span has been called to initialize the L1 table.
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*
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****************************************************************************/
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#ifdef CONFIG_PAGING
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.macro pg_map, paddr, npages, mmuflags, l2, tmp
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.macro pg_l2map, l2, ppage, npages, mmuflags, tmp
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b 2f
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1:
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/* Write the one L2 entries. First, get tmp = (paddr | mmuflags),
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/* Write the one L2 entries. First, get tmp = (ppage | mmuflags),
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* the value to write into the L2 PTE
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*/
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orr \tmp, \paddr, \mmuflags
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orr \tmp, \ppage, \mmuflags
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/* Write value into table at the current table address */
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@ -341,7 +344,7 @@
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* table entry.
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*/
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add \paddr, \paddr, #CONFIG_PAGING_PAGESIZE
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add \ppage, \ppage, #CONFIG_PAGING_PAGESIZE
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add \l2, \l2, #4
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/* Decrement the number of pages written */
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@ -357,7 +360,7 @@
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#endif /* CONFIG_PAGING */
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/****************************************************************************
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* Name: pg_span
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* Name: pg_l1span
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*
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* Description:
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* Write several, contiguous unmapped coarse L1 page table entries. As
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@ -365,24 +368,24 @@
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* macro is used when CONFIG_PAGING is enable. This case, it is used as
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* follows:
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*
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* ldr r0, =PG_L2_BASE_PADDR
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* ldr r1, =PG_LOCKED_PBASE
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* ldr r2, =(CONFIG_PAGING_NLOCKED+CONFIG_PAGING_NPAGES)
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* ldr r3, =MMU_FLAGS
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* pg_span r0, r1, r2, r3, r4
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* ldr r0, =PGTABLE_BASE_PADDR <-- Address in L1 table
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* ldr r1, =PG_LOCKED_VBASE <-- Virtual address of region
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* pg_l1addr r0, r1, r0
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* ldr r1, =PG_LOCKED_PBASE <-- Physical address of region
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* ldr r1, =(CONFIG_PAGING_NLOCKED+CONFIG_PAGING_NVPAGED) <-- number of pages
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* ldr r3, =MMU_FLAGS <-- L1 MMU flags
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* pg_l1span r0, r1, r2, r3, r4
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*
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* Inputs (unmodified unless noted):
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* l1 - Physical or virtual address in the L1 table to begin writing (modified)
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* l2 - Physical start address in the L2 page table (modified)
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* addr - The virtual address of the start of the region to span. Must
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* be aligned to 1Mb section boundaries (modified)
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* npages - Number of pages to required to span that memory region (modified)
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* mmuflags - L1 MMU flags to use
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*
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* Scratch registers (modified):
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* addr, npages, tmp
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* l2 - L2 page table physical address
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* addr - Physical address in the L1 page table.
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* npages - The number of pages remaining to be accounted for
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* Scratch registers (modified): l1, l2, npages, tmp
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* l1 - Next L1 table address
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* l2 - Physical start address of the next L2 page table
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* npages - Loop counter
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* tmp - scratch
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*
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* Return:
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@ -395,32 +398,24 @@
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****************************************************************************/
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#ifdef CONFIG_PAGING
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.macro pg_span, l2, addr, npages, mmuflags, tmp
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/* Get addr = the L1 page table address coresponding to the virtual
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* address of the start of memory region to be mapped.
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*/
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ldr \tmp, =PGTABLE_BASE_PADDR
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lsr \addr, \addr, #20
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add \addr, \tmp, \addr, lsl #2
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.macro pg_l1span, l1, l2, npages, mmuflags, tmp
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b 2f
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1:
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/* Write the L1 table entry that refers to this (unmapped) coarse page
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* table.
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*
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* tmp = (paddr | mmuflags), the value to write into the page table
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* tmp = (l2table | mmuflags), the value to write into the page table
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*/
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orr \tmp, \l2, \mmuflags
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/* Write the value into the L1 table at the correct offset. */
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str \tmp, [\addr], #4
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str \tmp, [\l1], #4
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/* Update the L2 page table address for the next L1 table entry. */
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add \l2, \l2, #PT_SIZE /* Next L2 page table start paddr */
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add \l2, \l2, #PT_SIZE /* Next L2 page table start address */
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/* Update the number of pages that we have account for (with
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* non-mappings
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@ -436,6 +431,45 @@
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bgt 1b
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.endm
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/****************************************************************************
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* Name: pg_l1addr
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*
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* Description:
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* Given the start of an L1 table and a virtual address, return the offset
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* address into the L1 table for that address.
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*
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* ldr r0, =PGTABLE_BASE_PADDR
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* ldr r1, =PG_LOCKED_VBASE
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* pg_l1addr r0, r1, r0
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*
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* Inputs (unmodified unless noted):
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* l1 - The physical or virtual address of the start of the L1 table
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* vaddr - The virtual address of the start of the region to span. Must
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* be aligned to 1Mb section boundaries (modified)
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* npages - Number of pages to required to span that memory region (modified)
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* mmuflags - L1 MMU flags to use
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*
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* Scratch registers (modified): vaddr
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*
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* Return:
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* The offset L1 table address is returned in result.
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*
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* Assumptions:
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* None
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*
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****************************************************************************/
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#ifdef CONFIG_PAGING
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.macro pg_l1addr, l1, vaddr, result
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/* Get result = the L1 table address coresponding to a virtual
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* address.
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*/
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lsr \vaddr, \vaddr, #20
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add \result, \l1, \vaddr, lsl #2
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.endm
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#endif /* CONFIG_PAGING */
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#endif /* __ASSEMBLY__ */
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@ -185,34 +185,36 @@ __start:
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* effect. First populate the L1 table for the locked and paged
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* text regions.
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*
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* We could probably make the the pg_span and pg_map macros into
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* We could probably make the the pg_l1span and pg_l2map macros into
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* call-able subroutines, but we would have to be carefully during
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* this phase while we are operating in a physical address space.
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*/
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adr r0, .Ltxtspan
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ldmia r0, {r0, r1, r2, r3}
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pg_span r0, r1, r2, r3, r4
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ldmia r0, {r0, r1, r2, r3, r4}
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pg_l1addr r0, r1, r0
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pg_l1span r0, r2, r3, r4, r1
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/* Then populate the L2 table for the locked text region only. */
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adr r0, .Ltxtmap
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ldmia r0, {r0, r1, r2, r3}
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pg_map r0, r1, r2, r3, r4
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pg_l2map r0, r1, r2, r3, r4
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/* Make sure that the page table is itself mapped and and read/write-able.
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* First, populate the L1 table:
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*/
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adr r0, .Lptabspan
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ldmia r0, {r0, r1, r2, r3}
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pg_span r0, r1, r2, r3, r4
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ldmia r0, {r0, r1, r2, r3, r4}
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pg_l1addr r0, r1, r0
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pg_l1span r0, r2, r3, r4, r1
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/* Then populate the L2 table. */
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adr r0, .Lptabmap
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ldmia r0, {r0, r1, r2, r3}
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pg_map r0, r1, r2, r3, r4
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pg_l2map r0, r1, r2, r3, r4
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#else
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/* Create a virtual single section mapping for the first MB of the .text
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@ -350,27 +352,29 @@ __start:
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#ifdef CONFIG_PAGING
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.Ltxtspan:
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.long PG_L2_TEXT_PADDR /* Physical address of L2 table */
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.long PG_TEXT_VBASE /* Virtual address of text base */
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.long PG_TEXT_NVPAGES /* Total virtual text pages to be mapped */
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.long PGTABLE_BASE_PADDR /* Physical address of L1 table */
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.long PG_L2_TEXT_VADDR /* Virtual address of the L2 page table */
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.long PG_L2_TEXT_PADDR /* Physical address of the L2 page table */
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.long PG_TEXT_NVPAGES /* Total (virtual) text pages to be mapped */
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.long MMU_L1_TEXTFLAGS /* L1 MMU flags to use */
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.Ltxtmap:
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.long PG_L2_LOCKED_PADDR /* Physical address of L2 table */
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.long PG_LOCKED_PBASE /* Physical address of locked base */
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.long PG_LOCKED_PBASE /* Physical address of locked base memory */
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.long CONFIG_PAGING_NLOCKED /* Number of pages in the locked region */
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.long MMU_L2_TEXTFLAGS /* L2 MMU flags to use */
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.Lptabspan:
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.long PG_L2_PGTABLE_PADDR /* Physical address of L2 table */
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.long PGTABLE_BASE_VADDR /* Virtual address of the page table */
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.long PG_TEXT_NPAGES /* Total mapped page table pages */
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.long PGTABLE_BASE_PADDR /* Physical address of L1 table */
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.long PG_L2_PGTABLE_VADDR /* Virtual address of the L2 page table */
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.long PG_L2_PGTABLE_PADDR /* Physical address of the L2 page table */
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.long PG_PGTABLE_NPAGES /* Total mapped page table pages */
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.long MMU_L1_PGTABFLAGS /* L1 MMU flags to use */
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||||
.Lptabmap:
|
||||
.long PG_L2_PGTABLE_PADDR /* Physical address of L2 table */
|
||||
.long PGTABLE_BASE_PADDR /* Physical address of the page table */
|
||||
.long CONFIG_PAGING_NLOCKED /* Total mapped page table pages */
|
||||
.long PGTABLE_BASE_PADDR /* Physical address of the page table memory */
|
||||
.long PG_PGTABLE_NPAGES /* Total mapped page table pages */
|
||||
.long MMU_L2_PGTABFLAGS /* L2 MMU flags to use */
|
||||
#endif
|
||||
.size _start, .-_start
|
||||
|
|
@ -403,14 +407,15 @@ __start:
|
|||
/* Populate the L1 table for the data regions */
|
||||
|
||||
adr r0, .Ldataspan
|
||||
ldmia r0, {r0, r1, r2, r3}
|
||||
pg_span r0, r1, r2, r3, r4
|
||||
ldmia r0, {r0, r1, r2, r3, r4}
|
||||
pg_l1addr r0, r1, r0
|
||||
pg_l1span r0, r2, r3, r4, r1
|
||||
|
||||
/* Populate the L2 table for the data region */
|
||||
|
||||
adr r0, .Ldatamap
|
||||
ldmia r0, {r0, r1, r2, r3}
|
||||
pg_map r0, r1, r2, r3, r4
|
||||
pg_l2map r0, r1, r2, r3, r4
|
||||
|
||||
#elif defined(CONFIG_BOOT_RUNFROMFLASH)
|
||||
# error "Logic not implemented"
|
||||
|
|
@ -508,14 +513,15 @@ __start:
|
|||
|
||||
#ifdef CONFIG_PAGING
|
||||
.Ldataspan:
|
||||
.long PG_L2_DATA_PADDR /* Physical address of L2 table */
|
||||
.long PG_DATA_PBASE /* Physical address of data base */
|
||||
.long PGTABLE_BASE_VADDR /* Virtual address of the L1 table */
|
||||
.long PG_L2_DATA_VADDR /* Virtual address of the L2 page table */
|
||||
.long PG_L2_DATA_PADDR /* Physical address of the L2 page table */
|
||||
.long PG_DATA_NPAGED /* Number of pages in the data region */
|
||||
.long MMU_L1_DATAFLAGS /* L1 MMU flags to use */
|
||||
|
||||
.Ldatamap:
|
||||
.long PG_L2_DATA_PADDR /* Physical address of L2 table */
|
||||
.long PG_DATA_VBASE /* Virtual address of data base */
|
||||
.long PG_L2_DATA_VADDR /* Virtual address of L2 table */
|
||||
.long PG_DATA_VBASE /* Virtual address of data memory */
|
||||
.long PG_DATA_NPAGED /* Number of pages in the data region */
|
||||
.long MMU_L2_DATAFLAGS /* L2 MMU flags to use */
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -54,19 +54,7 @@
|
|||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
/* Configuration ************************************************************/
|
||||
|
||||
#ifdef CONFIG_PAGING
|
||||
# ifndef CONFIG_PAGING_PAGESIZE
|
||||
# error "CONFIG_PAGING_PAGESIZE is not defined in your .config file"
|
||||
# endif
|
||||
# ifndef CONFIG_PAGING_NLOCKED
|
||||
# error "CONFIG_PAGING_NLOCKED is not defined in your .config file"
|
||||
# endif
|
||||
# ifndef CONFIG_PAGING_NPAGES
|
||||
# error "CONFIG_PAGING_NPAGES is not defined in your .config file"
|
||||
# endif
|
||||
#endif
|
||||
/* Debug ********************************************************************/
|
||||
|
||||
/* Output debug info if stack dump is selected -- even if
|
||||
* debug is not selected.
|
||||
|
|
|
|||
|
|
@ -272,15 +272,40 @@ defconfig -- This is a configuration file similar to the Linux
|
|||
|
||||
CONFIG_PAGING_PAGESIZE - The size of one managed page. This must
|
||||
be a value supported by the processor's memory management unit.
|
||||
CONFIG_PAGING_NLOCKED - This is the number of locked pages in the
|
||||
CONFIG_PAGING_NLOCKED - This is the number of locked pages in the
|
||||
memory map. The locked address region will then be from
|
||||
CONFIG_DRAM_VSTART through (CONFIG_DRAM_VSTART +
|
||||
CONFIG_PAGING_PAGESIZE*CONFIG_PAGING_NLOCKED)
|
||||
CONFIG_PAGING_NPAGES - The number of pages in the paged region of
|
||||
the memory map. This paged region then begins at (CONFIG_DRAM_VSTART +
|
||||
CONFIG_PAGING_PAGESIZE*CONFIG_PAGING_NLOCKED) and continues until
|
||||
(CONFIG_DRAM_VSTART + CONFIG_PAGING_PAGESIZE*(CONFIG_PAGING_NLOCKED +
|
||||
CONFIG_PAGING_NPAGES)
|
||||
CONFIG_PAGING_LOCKED_PBASE and CONFIG_PAGING_LOCKED_VBASE - These
|
||||
may be defined to determine the base address of the locked page
|
||||
regions. If neither are defined, the logic will be set the bases
|
||||
to CONFIG_DRAM_START and CONFIG_DRAM_VSTART (i.e., it assumes
|
||||
that the base address of the locked region is at the beginning
|
||||
of RAM).
|
||||
NOTE: In some architectures, it may be necessary to take some
|
||||
memory from the beginning of this region for vectors or for a
|
||||
page table. In such cases, CONFIG_PAGING_LOCKED_P/VBASE should
|
||||
take that into consideration to prevent overlapping the locked
|
||||
memory region and the system data at the beginning of SRAM.
|
||||
CONFIG_PAGING_NPPAGED - This is the number of physical pages
|
||||
available to support the paged text region. This paged region
|
||||
begins at (CONFIG_PAGING_LOCKED_PBASE + CONFIG_PAGING_PAGESIZE*CONFIG_PAGING_NPPAGED)
|
||||
and continues until (CONFIG_PAGING_LOCKED_PBASE + CONFIG_PAGING_PAGESIZE*(CONFIG_PAGING_NLOCKED +
|
||||
CONFIG_PAGING_NPPAGED)
|
||||
CONFIG_PAGING_NVPAGED - This actual size of the paged text region
|
||||
(in pages). This is also the number of virtual pages required to
|
||||
support the entire paged region. The on-demand paging feature is
|
||||
intended to support only the case where the virtual paged text
|
||||
area is much larger the available physical pages. Otherwise, why
|
||||
would you enable on-demand paging?
|
||||
CONFIG_PAGING_NDATA - This is the number of data pages in the memory
|
||||
map. The data region will extend to the end of RAM unless overridden
|
||||
by a setting in the configuration file.
|
||||
NOTE: In some architectures, it may be necessary to take some memory
|
||||
from the end of RAM for page tables or other system usage. The
|
||||
configuration settings and linker directives must be cognizant of that:
|
||||
CONFIG_PAGING_NDATA should be defined to prevent the data region from
|
||||
extending all the way to the end of memory.
|
||||
CONFIG_PAGING_DEFPRIO - The default, minimum priority of the page fill
|
||||
worker thread. The priority of the page fill work thread will be boosted
|
||||
boosted dynmically so that it matches the priority of the task on behalf
|
||||
|
|
@ -292,11 +317,28 @@ defconfig -- This is a configuration file similar to the Linux
|
|||
function may be blocking or non-blocking. If defined, this setting
|
||||
indicates that the up_fillpage() implementation will block until the
|
||||
transfer is completed. Default: Undefined (non-blocking).
|
||||
CONFIG_PAGING_WORKPERIOD - The page fill worker thread will wake periodically
|
||||
even if there is no mapping to do. This selection controls that wake-up
|
||||
period (in microseconds). This wake-up a failsafe that will handle any
|
||||
cases where a single is lost (that would really be a bug and shouldn't
|
||||
happen!) and also supports timeouts for case of non-blocking, asynchronous
|
||||
fills (see CONFIG_PAGING_TIMEOUT_TICKS).
|
||||
CONFIG_PAGING_TIMEOUT_TICKS - If defined, the implementation will monitor
|
||||
the (asynchronous) page fill logic. If the fill takes longer than this
|
||||
number if microseconds, then a fatal error will be declared.
|
||||
Default: No timeouts monitored.
|
||||
|
||||
Some architecture-specific settings. Defaults are architecture specific.
|
||||
If you don't know what you are doing, it is best to leave these undefined
|
||||
and try the system defaults:
|
||||
|
||||
CONFIG_PAGING_VECPPAGE - This the physical address of the page in
|
||||
memory to be mapped to the vector address.
|
||||
CONFIG_PAGING_VECL2PADDR - This is the physical address of the L2
|
||||
page table entry to use for the vector mapping.
|
||||
CONFIG_PAGING_VECL2VADDR - This is the virtual address of the L2
|
||||
page table entry to use for the vector mapping.
|
||||
|
||||
The following can be used to disable categories of APIs supported
|
||||
by the OS. If the compiler supports weak functions, then it
|
||||
should not be necessary to disable functions unless you want to
|
||||
|
|
@ -416,7 +458,7 @@ defconfig -- This is a configuration file similar to the Linux
|
|||
CONFIG_NET - Enable or disable all network features
|
||||
CONFIG_NET_IPv6 - Build in support for IPv6
|
||||
CONFIG_NSOCKET_DESCRIPTORS - Maximum number of socket descriptors
|
||||
per task/thread.
|
||||
per task/thread.
|
||||
CONFIG_NET_NACTIVESOCKETS - Maximum number of concurrent socket
|
||||
operations (recv, send, etc.). Default: CONFIG_NET_TCP_CONNS+CONFIG_NET_UDP_CONNS
|
||||
CONFIG_NET_SOCKOPTS - Enable or disable support for socket options
|
||||
|
|
|
|||
|
|
@ -85,10 +85,10 @@
|
|||
#define PG_LOCKED_SIZE (CONFIG_PAGING_NLOCKED << PAGESHIFT)
|
||||
|
||||
/* CONFIG_PAGING_LOCKED_P/VBASE - May be defined to determine the base
|
||||
* address of the locked page regions (lowest in memory). If both are not
|
||||
* not defined, then this logic will be set to then to CONFIG_DRAM_START
|
||||
* and CONFIG_DRAM_VSTART (i.e., assuming that the base address of the
|
||||
* locked region is at the virtual address of the beginning of RAM).
|
||||
* address of the locked page regions (lowest in memory). If neither
|
||||
* are defined, then this logic will be set the bases to CONFIG_DRAM_START
|
||||
* and CONFIG_DRAM_VSTART (i.e., it assumes that the base address of the
|
||||
* locked region is at the beginning of RAM).
|
||||
*
|
||||
* NOTE: In some architectures, it may be necessary to take some memory
|
||||
* from the beginning of this region for vectors or for a page table.
|
||||
|
|
@ -116,9 +116,10 @@
|
|||
* support the paged text region.
|
||||
* CONFIG_PAGING_NVPAGED - This actual size of the paged text region (in
|
||||
* pages). This is also the number of virtual pages required to support
|
||||
* the entire paged retion. This feature is intended to support only the
|
||||
* case where the virtual paged text area is much larger the available
|
||||
* physical pages. Otherwise, why would you being on-demand paging?
|
||||
* the entire paged region. The on-demand paging feature is intended to
|
||||
* support only the case where the virtual paged text area is much larger
|
||||
* the available physical pages. Otherwise, why would you enable on-demand
|
||||
* paging?
|
||||
*/
|
||||
|
||||
#if CONFIG_PAGING_NPPAGED >= CONFIG_PAGING_NVPAGED
|
||||
|
|
@ -165,7 +166,7 @@
|
|||
*
|
||||
* NOTE: In some architectures, it may be necessary to take some memory
|
||||
* from the end of RAM for page tables or other system usage. The
|
||||
* configuration settings and linker directives must be cognizant of that.
|
||||
* configuration settings and linker directives must be cognizant of that:
|
||||
* CONFIG_PAGING_NDATA should be defined to prevent the data region from
|
||||
* extending all the way to the end of memory.
|
||||
*/
|
||||
|
|
@ -206,6 +207,12 @@
|
|||
* function may be blocking or non-blocking. If defined, this setting
|
||||
* indicates that the up_fillpage() implementation will block until the
|
||||
* transfer is completed. Default: Undefined (non-blocking).
|
||||
* CONFIG_PAGING_WORKPERIOD - The page fill worker thread will wake periodically
|
||||
* even if there is no mapping to do. This selection controls that wake-up
|
||||
* period (in microseconds). This wake-up a failsafe that will handle any
|
||||
* cases where a single is lost (that would really be a bug and shouldn't
|
||||
* happen!) and also supports timeouts for case of non-blocking, asynchronous
|
||||
* fills (see CONFIG_PAGING_TIMEOUT_TICKS).
|
||||
* CONFIG_PAGING_TIMEOUT_TICKS - If defined, the implementation will monitor
|
||||
* the (asynchronous) page fill logic. If the fill takes longer than this
|
||||
* number if microseconds, then a fatal error will be declared.
|
||||
|
|
|
|||
Loading…
Reference in New Issue