phone-side
/
nuttx-bb
9
0
Fork 0
Code Releases Activity

Correct STM32 SPI3 bug reported by Uros 

git-svn-id: https://nuttx.svn.sourceforge.net/svnroot/nuttx/trunk@3343 7fd9a85b-ad96-42d3-883c-3090e2eb8679
This commit is contained in:
patacongo 2011-03-06 00:19:59 +00:00
parent e3cdc2ea35
commit 4b47b949f1
3 changed files with 28 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
nuttx/ChangeLog
View File

@ -1524,5 +1524,5 @@
arch/x86/include/qemu, arch/x86/src/i486, and arch/x86/src/qemu.
* configs/qemu-i486 - "Board" support configurations for verifying the QEME
i486 port.
* arch/arm/src/stm32/stm32_spi.c -- Correct base address of SPI3 (reported by
Uros Platise).

26
nuttx/Documentation/NuttX.html
View File

@ -1378,7 +1378,7 @@
<tr>
<td valign="top"><img height="20" width="20" src="favicon.ico"></td>
<td bgcolor="#5eaee1">
<b>8052 Microcontroller</b>
<b>Intel 8052 Microcontroller</b>
</td>
</tr>
<tr>
@ -1401,6 +1401,28 @@
</ul>
</td>
</tr>
<tr>
<td valign="top"><img height="20" width="20" src="favicon.ico"></td>
<td bgcolor="#5eaee1">
<b>Intel 80486 (i486) Microprocessor</b>
</td>
</tr>
<tr>
<td><br></td>
<td>
<p>
<b>QEMU i486</b>.
This port uses the <a href="http://wiki.qemu.org/Main_Page">QEMU</a> i486 and the native
Linux, Cywgin, MinGW the GCC toolchain under Linux or Cygwin.
</p>
<ul>
<p>
<b>STATUS:</b>
This port is code complete but not yet tested. Stayed tuned.
</p>
</ul>
</td>
</tr>
<tr>
<td valign="top"><img height="20" width="20" src="favicon.ico"></td>
<td bgcolor="#5eaee1">
@ -2126,6 +2148,8 @@ nuttx-5.19 2011-xx-xx Gregory Nutt &lt;spudmonkey@racsa.co.cr&gt;
arch/x86/include/qemu, arch/x86/src/i486, and arch/x86/src/qemu.
* configs/qemu-i486 - "Board" support configurations for verifying the QEME
i486 port.
* arch/arm/src/stm32/stm32_spi.c -- Correct base address of SPI3 (reported by
Uros Platise).
pascal-2.1 2011-xx-xx Gregory Nutt &lt;spudmonkey@racsa.co.cr&gt;

2
nuttx/arch/arm/src/stm32/stm32_spi.c
View File

@ -303,7 +303,7 @@ static const struct spi_ops_s g_sp3iops =
static struct stm32_spidev_s g_spi3dev =
{
.spidev = { &g_sp3iops },
.spibase = STM32_SPI2_BASE,
.spibase = STM32_SPI3_BASE,
.spiclock = STM32_PCLK1_FREQUENCY,
#ifdef CONFIG_STM32_SPI_INTERRUPTS
.spiirq = STM32_IRQ_SPI3,