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PIC32MX SPI: Fix typos in Kconfig; Move constant SPI config data to ROM-able const structure

This commit is contained in:
Gregory Nutt 2015-03-03 10:06:49 -06:00
parent 7696ebf5da
commit 3623faa192
5 changed files with 116 additions and 90 deletions
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12
nuttx/arch/mips/src/pic32mz/Kconfig
View File

@ -142,32 +142,32 @@ config PIC32MZ_I2C5
config PIC32MZ_SPI1
bool "SPI1"
default n
select PIC32MX_SPI
select PIC32MZ_SPI
config PIC32MZ_SPI2
bool "SPI2"
default n
select PIC32MX_SPI
select PIC32MZ_SPI
config PIC32MZ_SPI3
bool "SPI3"
default n
select PIC32MX_SPI
select PIC32MZ_SPI
config PIC32MZ_SPI4
bool "SPI4"
default n
select PIC32MX_SPI
select PIC32MZ_SPI
config PIC32MZ_SPI5
bool "SPI5"
default n
select PIC32MX_SPI
select PIC32MZ_SPI
config PIC32MZ_SPI6
bool "SPI6"
default n
select PIC32MX_SPI
select PIC32MZ_SPI
config PIC32MZ_UART1
bool "UART1"

126
nuttx/arch/mips/src/pic32mz/pic32mz-spi.c
View File

@ -66,17 +66,7 @@
#define BOARD_PBCLOCK BOARD_PBCLK2
/* Enables non-standard debug output from this file.
*
* CONFIG_SPI_DEBUG && CONFIG_DEBUG - Define to enable basic SPI debug
* CONFIG_DEBUG_VERBOSE - Define to enable verbose SPI debug
*/
#ifndef CONFIG_DEBUG
# undef CONFIG_DEBUG_SPI
# undef CONFIG_DEBUG_VERBOSE
# undef CONFIG_SPI_REGDEBUG
#endif
/* Debug */
#ifdef CONFIG_DEBUG_SPI
# define spidbg lldbg
@ -93,12 +83,12 @@
/****************************************************************************
* Private Types
****************************************************************************/
/* This structure describes the fixed (ROM-able) configuration of the SPI
* peripheral.
*/
/* This structure describes the state of the SSP driver */
struct pic32mz_dev_s
struct pic32mz_config_s
{
struct spi_dev_s spidev; /* Externally visible part of the SPI interface */
uint32_t base; /* SPI register base address */
#ifdef CONFIG_PIC32MZ_SPI_INTERRUPTS
uint8_t firq; /* SPI fault interrupt number */
@ -108,6 +98,15 @@ struct pic32mz_dev_s
uint8_t sdipps; /* SDI peripheral pin selection */
uint8_t sdopps; /* SDO peripheral pin selection */
uintptr_t sdoreg; /* SDO peripheral pin configuration register */
};
/* This structure describes the state of the SPI driver */
struct pic32mz_dev_s
{
struct spi_dev_s spidev; /* Externally visible part of the SPI interface */
FAR const struct pic32mz_config_s *config;
#ifndef CONFIG_SPI_OWNBUS
sem_t exclsem; /* Held while chip is selected for mutual exclusion */
uint32_t frequency; /* Requested clock frequency */
@ -168,9 +167,8 @@ static const struct spi_ops_s g_spi1ops =
#endif
};
static struct pic32mz_dev_s g_spi1dev =
static const struct pic32mz_config_s g_spi1config =
{
.spidev = { &g_spi1ops },
.base = PIC32MZ_SPI1_K1BASE,
#ifdef CONFIG_PIC32MZ_SPI_INTERRUPTS
.firq = PIC32MZ_IRQ_SPI1F,
@ -181,6 +179,12 @@ static struct pic32mz_dev_s g_spi1dev =
.sdopps = PPS_OUTPUT_REGVAL(BOARD_SDO1_PPS),
.sdoreg = PPS_OUTPUT_REGADDR(BOARD_SDO1_PPS),
};
static struct pic32mz_dev_s g_spi1dev =
{
.spidev = { &g_spi1ops },
.config = &g_spi1config,
};
#endif
#ifdef CONFIG_PIC32MZ_SPI2
@ -207,9 +211,8 @@ static const struct spi_ops_s g_spi2ops =
#endif
};
static struct pic32mz_dev_s g_spi2dev =
static const struct pic32mz_config_s g_spi2config =
{
.spidev = { &g_spi2ops },
.base = PIC32MZ_SPI2_K1BASE,
#ifdef CONFIG_PIC32MZ_SPI_INTERRUPTS
.firq = PIC32MZ_IRQ_SPI2F,
@ -220,6 +223,12 @@ static struct pic32mz_dev_s g_spi2dev =
.sdopps = PPS_OUTPUT_REGVAL(BOARD_SDO2_PPS),
.sdoreg = PPS_OUTPUT_REGADDR(BOARD_SDO2_PPS),
};
static struct pic32mz_dev_s g_spi2dev =
{
.spidev = { &g_spi2ops },
.config = &g_spi2config,
};
#endif
#ifdef CONFIG_PIC32MZ_SPI3
@ -246,9 +255,8 @@ static const struct spi_ops_s g_spi3ops =
#endif
};
static struct pic32mz_dev_s g_spi3dev =
static const struct pic32mz_config_s g_spi3config =
{
.spidev = { &g_spi3ops },
.base = PIC32MZ_SPI3_K1BASE,
#ifdef CONFIG_PIC32MZ_SPI_INTERRUPTS
.firq = PIC32MZ_IRQ_SPI3F,
@ -259,6 +267,12 @@ static struct pic32mz_dev_s g_spi3dev =
.sdopps = PPS_OUTPUT_REGVAL(BOARD_SDO3_PPS),
.sdoreg = PPS_OUTPUT_REGADDR(BOARD_SDO3_PPS),
};
static struct pic32mz_dev_s g_spi3dev =
{
.spidev = { &g_spi3ops },
.config = &g_spi3config,
};
#endif
#ifdef CONFIG_PIC32MZ_SPI4
@ -285,9 +299,8 @@ static const struct spi_ops_s g_spi4ops =
#endif
};
static struct pic32mz_dev_s g_spi4dev =
static const struct pic32mz_config_s g_spi4config =
{
.spidev = { &g_spi4ops },
.base = PIC32MZ_SPI4_K1BASE,
#ifdef CONFIG_PIC32MZ_SPI_INTERRUPTS
.firq = PIC32MZ_IRQ_SPI4F,
@ -298,6 +311,12 @@ static struct pic32mz_dev_s g_spi4dev =
.sdopps = PPS_OUTPUT_REGVAL(BOARD_SDO4_PPS),
.sdoreg = PPS_OUTPUT_REGADDR(BOARD_SDO4_PPS),
};
static struct pic32mz_dev_s g_spi4dev =
{
.spidev = { &g_spi4ops },
.config = &g_spi4config,
};
#endif
#ifdef CONFIG_PIC32MZ_SPI5
@ -324,9 +343,8 @@ static const struct spi_ops_s g_spi5ops =
#endif
};
static struct pic32mz_dev_s g_spi5dev =
static const struct pic32mz_config_s g_spi5config =
{
.spidev = { &g_spi5ops },
.base = PIC32MZ_SPI5_K1BASE,
#ifdef CONFIG_PIC32MZ_SPI_INTERRUPTS
.firq = PIC32MZ_IRQ_SPI5F,
@ -337,6 +355,12 @@ static struct pic32mz_dev_s g_spi5dev =
.sdopps = PPS_OUTPUT_REGVAL(BOARD_SDO5_PPS),
.sdoreg = PPS_OUTPUT_REGADDR(BOARD_SDO5_PPS),
};
static struct pic32mz_dev_s g_spi5dev =
{
.spidev = { &g_spi5ops },
.config = &g_spi5config,
};
#endif
#ifdef CONFIG_PIC32MZ_SPI6
@ -363,9 +387,8 @@ static const struct spi_ops_s g_spi6ops =
#endif
};
static struct pic32mz_dev_s g_spi6dev =
static const struct pic32mz_config_s g_spi6config =
{
.spidev = { &g_spi6ops },
.base = PIC32MZ_SPI6_K1BASE,
#ifdef CONFIG_PIC32MZ_SPI_INTERRUPTS
.firq = PIC32MZ_IRQ_SPI6F,
@ -376,6 +399,12 @@ static struct pic32mz_dev_s g_spi6dev =
.sdopps = PPS_OUTPUT_REGVAL(BOARD_SDO6_PPS),
.sdoreg = PPS_OUTPUT_REGADDR(BOARD_SDO6_PPS),
};
static struct pic32mz_dev_s g_spi6dev =
{
.spidev = { &g_spi6ops },
.config = &g_spi6config,
};
#endif
/****************************************************************************
@ -417,7 +446,7 @@ static uint32_t spi_getreg(FAR struct pic32mz_dev_s *priv, unsigned int offset)
/* Read the value from the register */
addr = priv->base + offset;
addr = priv->config->base + offset;
value = getreg32(addr);
/* Is this the same value that we read from the same register last time?
@ -464,7 +493,7 @@ static uint32_t spi_getreg(FAR struct pic32mz_dev_s *priv, unsigned int offset)
#else
static uint32_t spi_getreg(FAR struct pic32mz_dev_s *priv, unsigned int offset)
{
return getreg32(priv->base + offset);
return getreg32(priv->config->base + offset);
}
#endif
@ -492,7 +521,7 @@ static void spi_putreg(FAR struct pic32mz_dev_s *priv, unsigned int offset,
/* Get the address to write to */
addr = priv->base + offset;
addr = priv->config->base + offset;
/* Show the register value being written */
@ -506,7 +535,7 @@ static void spi_putreg(FAR struct pic32mz_dev_s *priv, unsigned int offset,
static void spi_putreg(FAR struct pic32mz_dev_s *priv, unsigned int offset,
uint32_t value)
{
putreg32(value, priv->base + offset);
putreg32(value, priv->config->base + offset);
}
#endif
@ -1051,9 +1080,9 @@ FAR struct spi_dev_s *up_spiinitialize(int port)
flags = irqsave();
#ifdef CONFIG_PIC32MZ_SPI_INTERRUPTS
up_disable_irq(priv->firq);
up_disable_irq(priv->txirq);
up_disable_irq(priv->rxirq);
up_disable_irq(priv->config->firq);
up_disable_irq(priv->config->rxirq);
up_disable_irq(priv->config->txirq);
#endif
/* Stop and reset the SPI module by clearing the ON bit in the CON register. */
@ -1068,32 +1097,35 @@ FAR struct spi_dev_s *up_spiinitialize(int port)
* managed as GPIOs; CLK (output) pins are not selectable.
*/
putreg32((uint32_t)priv->sdipps, regaddr);
putreg32((uint32_t)priv->sdopps, priv->sdoreg);
putreg32((uint32_t)priv->config->sdipps, regaddr);
putreg32((uint32_t)priv->config->sdopps, priv->config->sdoreg);
#ifdef CONFIG_PIC32MZ_SPI_INTERRUPTS
/* Attach the interrupt handlers. We do this early to make sure that the
* resources are available.
*/
ret = irq_attach(priv->rxirq, spi_interrupt);
ret = irq_attach(priv->config->rxirq, spi_interrupt);
if (ret < 0)
{
spidbg("Failed to attach RX interrupt: %d port: %d\n", priv->rxirq, port);
spidbg("Failed to attach RX interrupt: %d port: %d\n",
priv->config->rxirq, port);
goto errout;
}
ret = irq_attach(priv->txirq, spi_interrupt);
ret = irq_attach(priv->config->txirq, spi_interrupt);
if (ret < 0)
{
spidbg("Failed to attach TX interrupt: %d port: %d\n", priv->txirq, port);
spidbg("Failed to attach TX interrupt: %d port: %d\n",
priv->tconfig->xirq, port);
goto errout_with_rxirq;
}
ret = irq_attach(priv->firq, spi_interrupt);
ret = irq_attach(priv->config->firq, spi_interrupt);
if (ret < 0)
{
spidbg("Failed to attach fault interrupt: %d port: %d\n", priv->firq, port);
spidbg("Failed to attach fault interrupt: %d port: %d\n",
priv->config->firq, port);
goto errout_with_txirq;
}
#endif
@ -1137,9 +1169,9 @@ FAR struct spi_dev_s *up_spiinitialize(int port)
#ifdef CONFIG_PIC32MZ_SPI_INTERRUPTS
/* Enable interrupts at the SPI controller */
up_enable_irq(priv->firq);
up_enable_irq(priv->txirq);
up_enable_irq(priv->rxirq);
up_enable_irq(priv->config->firq);
up_enable_irq(priv->config->rxirq);
up_enable_irq(priv->config->txirq);
#endif
/* Enable interrupts at the interrupt controller */
@ -1149,9 +1181,9 @@ FAR struct spi_dev_s *up_spiinitialize(int port)
#ifdef CONFIG_PIC32MZ_SPI_INTERRUPTS
errout_with_txirq:
irq_detatch(priv->txirq);
irq_detatch(priv->config->txirq);
errout_with_rxirq:
irq_detatch(priv->rxirq);
irq_detatch(priv->config->rxirq);
errout:
irqrestore(flags);
return NULL;

3
nuttx/configs/pic32mz-starterkit/src/pic32mz-starterkit.h
View File

@ -41,6 +41,7 @@
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/compiler.h>
/****************************************************************************
* Pre-Processor Definitions
@ -183,7 +184,7 @@ extern "C"
*
************************************************************************************/
#if defined(CONFIG_PIC32MZ_SPI2)
#ifdef CONFIG_PIC32MZ_SPI
void weak_function pic32mz_spiinitialize(void);
#endif

3
nuttx/configs/pic32mz-starterkit/src/pic32mz_boot.c
View File

@ -74,8 +74,7 @@ void pic32mz_boardinitialize(void)
* function pic32mz_spiinitialize() has been brought into the link.
*/
#if defined(CONFIG_PIC32MZ_SPI1) || defined(CONFIG_PIC32MZ_SPI2) || \
defined(CONFIG_PIC32MZ_SPI3) || defined(CONFIG_PIC32MZ_SPI4)
#ifdef CONFIG_PIC32MZ_SPI
if (pic32mz_spiinitialize)
{
pic32mz_spiinitialize();

62
nuttx/configs/pic32mz-starterkit/src/pic32mz_spi.c
View File

@ -50,31 +50,25 @@
#include "pic32mz-starterkit.h"
#if defined(CONFIG_PIC32MZ_SPI1) || defined(CONFIG_PIC32MZ_SPI2) || \
defined(CONFIG_PIC32MZ_SPI3) || defined(CONFIG_PIC32MZ_SPI4) || \
defined(CONFIG_PIC32MZ_SPI5) || defined(CONFIG_PIC32MZ_SPI6)
#ifdef CONFIG_PIC32MZ_SPI
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/* The following enable debug output from this file (needs CONFIG_DEBUG too).
*
* CONFIG_SPI_DEBUG - Define to enable basic SPI debug
* CONFIG_SPI_VERBOSE - Define to enable verbose SPI debug
*/
/* Debug */
#ifdef CONFIG_SPI_DEBUG
# define sspdbg lldbg
#ifdef CONFIG_DEBUG_SPI
# define spidbg lldbg
# ifdef CONFIG_SPI_VERBOSE
# define sspvdbg lldbg
# define spivdbg lldbg
# else
# define sspvdbg(x...)
# define spivdbg(x...)
# endif
#else
# undef CONFIG_SPI_VERBOSE
# define sspdbg(x...)
# define sspvdbg(x...)
# define spidbg(x...)
# define spivdbg(x...)
#endif
/************************************************************************************
@ -86,14 +80,14 @@
************************************************************************************/
/************************************************************************************
* Name: pic32mz_sspinitialize
* Name: pic32mz_spiinitialize
*
* Description:
* Called to configure SPI chip select GPIO pins for the Sure PIC32MZ board.
*
************************************************************************************/
void weak_function pic32mz_sspinitialize(void)
void weak_function pic32mz_spiinitialize(void)
{
/* Configure the SPI chip select GPIOs */
@ -110,7 +104,7 @@ void weak_function pic32mz_sspinitialize(void)
* including up_spiinitialize()) are provided by common PIC32MZ logic. To use
* this common SPI logic on your board:
*
* 1. Provide logic in pic32mz_boardinitialize() to configure SPI/SSP chip select
* 1. Provide logic in pic32mz_boardinitialize() to configure SPI/SPI chip select
* pins.
* 2. Provide pic32mz_spiNselect() and pic32mz_spiNstatus() functions
* in your board-specific logic. These functions will perform chip selection
@ -134,13 +128,13 @@ enum spi_dev_e;
#ifdef CONFIG_PIC32MZ_SPI1
void pic32mz_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
{
sspdbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
#warning "Missing logic"
}
uint8_t pic32mz_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
{
sspdbg("Returning nothing\n");
spidbg("Returning nothing\n");
#warning "Missing logic"
return 0;
}
@ -153,21 +147,21 @@ int pic32mz_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cm
#endif
#endif
#ifdef CONFIG_PIC32MZ_SPI1
void pic32mz_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
#ifdef CONFIG_PIC32MZ_SPI2
void pic32mz_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
{
sspdbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
#warning "Missing logic"
}
uint8_t pic32mz_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
uint8_t pic32mz_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
{
sspdbg("Returning nothing\n");
spidbg("Returning nothing\n");
#warning "Missing logic"
return 0;
}
#ifdef CONFIG_SPI_CMDDATA
int pic32mz_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
int pic32mz_spi2cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
{
#warning "Missing logic"
return 0;
@ -178,13 +172,13 @@ int pic32mz_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cm
#ifdef CONFIG_PIC32MZ_SPI3
void pic32mz_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
{
sspdbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
#warning "Missing logic"
}
uint8_t pic32mz_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
{
sspdbg("Returning nothing\n");
spidbg("Returning nothing\n");
#warning "Missing logic"
return 0;
}
@ -200,13 +194,13 @@ int pic32mz_spi3cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cm
#ifdef CONFIG_PIC32MZ_SPI4
void pic32mz_spi4select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
{
sspdbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
#warning "Missing logic"
}
uint8_t pic32mz_spi4status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
{
sspdbg("Returning nothing\n");
spidbg("Returning nothing\n");
#warning "Missing logic"
return 0;
}
@ -222,13 +216,13 @@ int pic32mz_spi4cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cm
#ifdef CONFIG_PIC32MZ_SPI5
void pic32mz_spi5select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
{
sspdbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
#warning "Missing logic"
}
uint8_t pic32mz_spi5status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
{
sspdbg("Returning nothing\n");
spidbg("Returning nothing\n");
#warning "Missing logic"
return 0;
}
@ -244,13 +238,13 @@ int pic32mz_spi5cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cm
#ifdef CONFIG_PIC32MZ_SPI6
void pic32mz_spi6select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
{
sspdbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
#warning "Missing logic"
}
uint8_t pic32mz_spi6status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
{
sspdbg("Returning nothing\n");
spidbg("Returning nothing\n");
#warning "Missing logic"
return 0;
}
@ -263,4 +257,4 @@ int pic32mz_spi6cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cm
#endif
#endif
#endif /* CONFIG_PIC32MZ_SPI1..6 */
#endif /* CONFIG_PIC32MZ_SPI */