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16z: Fix option bits; adjust system clock frequency

This commit is contained in:
Gregory Nutt 2014-01-23 12:06:57 -06:00
parent ab692e7453
commit 0f41a4f53d
11 changed files with 146 additions and 58 deletions
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30
nuttx/arch/z16/src/z16f/chip.h
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@ -95,26 +95,28 @@
#define Z16F_FLOPTION2 rom char _flash_option2 _At 0x2
#define Z16F_FLOPTION3 rom char _flash_option3 _At 0x3
#define Z16F_FLOPTION0_EXTRNRC _HX8(00) /* Bits 6-7: OSC_SEL */
#define Z16F_FLOPTION0_LOWFREQ _HX8(40)
#define Z16F_FLOPTION0_MEDFREQ _HX8(80)
#define Z16F_FLOPTION0_MAXPWR _HX8(c0)
#define Z16F_FLOPTION0_WDTRES _HX8(20) /* Bit 5 */
#define Z16F_FLOPTION0_WDTA0 _HX8(10) /* Bit 4 */
#define Z16F_FLOPTION0_VBOA0 _HX8(08) /* Bit 3 */
#define Z16F_FLOPTION0_DBGUART _HX8(04) /* Bit 2 */
#define Z16F_FLOPTION0_FWP _HX8(02) /* Bit 1 */
#define Z16F_FLOPTION0_RP _HX8(01) /* Bit 0 */
#define Z16F_FLOPTION0_OSCSEL _HX8(c0) /* Bits 6-7: OSC_SEL */
#define Z16F_FLOPTION0_EXTRNRC _HX8(00) /* 00: On-chip oscillator with ext RC networks */
#define Z16F_FLOPTION0_LOWFREQ _HX8(40) /* 01: Min. power with very low frequency crystals */
#define Z16F_FLOPTION0_MEDFREQ _HX8(80) /* 10: Medium power with medium frequency crystals */
#define Z16F_FLOPTION0_MAXPWR _HX8(c0) /* 11: Maximum power with high frequency crystals */
#define Z16F_FLOPTION0_WDTRES _HX8(20) /* Bit 5: WDT Reset */
#define Z16F_FLOPTION0_WDTA0 _HX8(10) /* Bit 4: WDT Always On */
#define Z16F_FLOPTION0_VBOA0 _HX8(08) /* Bit 3: Voltage Brown-Out Protection Always On */
#define Z16F_FLOPTION0_DBGUART _HX8(04) /* Bit 2: Debug UART Enable */
#define Z16F_FLOPTION0_FWP _HX8(02) /* Bit 1: Flash Write Protect */
#define Z16F_FLOPTION0_RP _HX8(01) /* Bit 0: Read Protect */
#define Z16F_FLOPTION1_RESVD _HX8(f8) /* Bits 3-7: reserved */
#define Z16F_FLOPTION1_RESVD _HX8(f8) /* Bits 3-7: Reserved */
#define Z16F_FLOPTION1_MCEN _HX8(04) /* Bit 2: Motor control pins enable */
#define Z16F_FLOPTION1_OFFH _HX8(02) /* High side OFF */
#define Z16F_FLOPTION1_OFFL _HX8(01) /* Low side OFF */
#define Z16F_FLOPTION1_OFFH _HX8(02) /* Bit 1: High side OFF */
#define Z16F_FLOPTION1_OFFL _HX8(01) /* Bit 0: Low side OFF */
#define Z16F_FLOPTION2_RESVD _HX8(ff) /* Bits 0-7: reserved */
#define Z16F_FLOPTION3_RESVD _HX8(bf) /* Bits 0-5,7: reserved */
#define Z16F_FLOPTION3_ROMLESS _HX8(80) /* Bit 7: ROMLESS 16 Select */
#define Z16F_FLOPTION3_NORMAL _HX8(40) /* Bit 6: 1:Normal 0:Low power mode */
#define Z16F_FLOPTION3_RESVD _HX8(3f) /* Bits 0-5: Reserved */
/* Memory areas *******************************************************************
*

13
nuttx/arch/z16/src/z16f/z16f_clkinit.c
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@ -55,19 +55,6 @@ extern _Erom unsigned long SYS_CLK_SRC;
extern _Erom unsigned long SYS_CLK_FREQ;
#define _DEFCLK ((unsigned long)&SYS_CLK_FREQ)
/* Setup FLASH options at address 0x00000000 */
#if 0 /* Setup in z16f_head.S */
Z16F_FLOPTION0 = (Z16F_FLOPTION0_MAXPWR|Z16F_FLOPTION0_WDTRES|\
Z16F_FLOPTION0_WDTA0|Z16F_FLOPTION0_VBOA0|\
Z16F_FLOPTION0_DBGUART|Z16F_FLOPTION0_FWP|\
Z16F_FLOPTION0_RP);
Z16F_FLOPTION1 = (Z16F_FLOPTION1_RESVD|Z16F_FLOPTION1_MCEN|\
Z16F_FLOPTION1_OFFH|Z16F_FLOPTION1_OFFL);
Z16F_FLOPTION2 = Z16F_FLOPTION2_RESVD;
Z16F_FLOPTION3 = (Z16F_FLOPTION3_RESVD|Z16F_FLOPTION3_NORMAL);
#endif
/***************************************************************************
* Private Functions
***************************************************************************/

9
nuttx/arch/z16/src/z16f/z16f_head.S
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@ -40,6 +40,7 @@
#include <nuttx/config.h>
#include <arch/irq.h>
#include <arch/board/board.h>
#include "common/up_internal.h"
/**************************************************************************
@ -85,10 +86,10 @@
define FOPTIONSEG, SPACE=ROM, ORG=0
segment FOPTIONSEG
db %FF
db %FF
db %FF
db %FF
db BOARD_FLOPTION0
db BOARD_FLOPTION1
db BOARD_FLOPTION2
db BOARD_FLOPTION3
/**************************************************************************
* vectors

52
nuttx/configs/16z/include/board.h
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@ -1,5 +1,5 @@
/****************************************************************************
* board/board.h
* configs/16z/include/board.h
*
* Copyright (C) 2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -33,8 +33,8 @@
*
****************************************************************************/
#ifndef __ARCH_BOARD_BOARD_H
#define __ARCH_BOARD_BOARD_H
#ifndef __CONFIGS_16Z_INCLUDE_BOARD_H
#define __CONFIGS_16Z_INCLUDE_BOARD_H
/****************************************************************************
* Included Files
@ -44,14 +44,54 @@
* Definitions
****************************************************************************/
/* The 16Z board has a 19.6608MHz crystal. The ZNEO clocking will be
/* The 16Z board has a 18.432MHz crystal. The ZNEO clocking will be
* configured to use this crystal frequency directly as the clock source
*/
#define BOARD_XTAL_FREQUENCY 19660800 /* 19.6608MHz */
#define BOARD_XTAL_FREQUENCY 18432000 /* 18.432MHz */
#define BOARD_CLKSRC 1 /* Clock source = external crystal */
#define BOARD_SYSTEM_FREQUENCY BOARD_XTAL_FREQUENCY
/* Flash option bits
*
* "Each time the option bits are programmed or erased, the device must be
* Reset for the change to take place. During any reset operation .., the
* option bits are automatically read from the Program memory and written
* to Option Configuration registers. ... Option Bit Control Register are
* loaded before the device exits Reset and the ZNEO CPU begins code
* execution. The Option Configuration registers are not part of the
* Register file and are not accessible for read or write access."
*
* "The FLASH3 value of 0x7f is very important because it enables the
* J-port, otherwise used for 16-bit data.
*
* "... in 16z there are some unusual hardware connections. ZNEO
* communicates with 16-bit memory via 8-bit bus and using the 16-bit
* control signals BHE and BLE."
*/
#ifndef __ASSEMBLY__
# define BOARD_FLOPTION0 (Z16F_FLOPTION0_MAXPWR | Z16F_FLOPTION0_WDTRES | \
Z16F_FLOPTION0_WDTA0 | Z16F_FLOPTION0_VBOA0 | \
Z16F_FLOPTION0_DBGUART | Z16F_FLOPTION0_FWP | \
Z16F_FLOPTION0_RP)
# define BOARD_FLOPTION1 (Z16F_FLOPTION1_RESVD | Z16F_FLOPTION1_MCEN | \
Z16F_FLOPTION1_OFFH | Z16F_FLOPTION1_OFFL)
# define BOARD_FLOPTION2 Z16F_FLOPTION2_RESVD
# define BOARD_FLOPTION3 (Z16F_FLOPTION3_RESVD | Z16F_FLOPTION3_NORMAL)
/* The same settings, pre-digested for assembly language */
#else
# define BOARD_FLOPTION0 %ff
# define BOARD_FLOPTION1 %ff
# define BOARD_FLOPTION2 %ff
# define BOARD_FLOPTION3 %7f
#endif
/* LEDs
*
* The 16z board has 7 LEDs, five of which are controllable via software:
@ -134,4 +174,4 @@ extern "C" {
}
#endif
#endif /* __ARCH_BOARD_BOARD_H */
#endif /* __CONFIGS_16Z_INCLUDE_BOARD_H */

4
nuttx/configs/16z/nsh/nsh.linkcmd
View File

@ -41,7 +41,7 @@ RANGE ROM $000000 : $007FFF
RANGE RAM $FFB000 : $FFBFFF
RANGE IODATA $FFC000 : $FFFFFF
RANGE EROM $008000 : $01FFFF
RANGE ERAM $800000 : $FFFFFF
RANGE ERAM $020000 : $EFFFFF
CHANGE NEAR_TEXT=NEAR_DATA
CHANGE FAR_TEXT=FAR_DATA
@ -70,7 +70,7 @@ define _near_heapbot = top of RAM
define _far_heapbot = top of ERAM
define _SYS_CLK_SRC = 1
define _SYS_CLK_FREQ = 19660800
define _SYS_CLK_FREQ = 18432000
define __EXTCT_INIT_PARAM = $40
define __EXTCS0_INIT_PARAM = $9001

4
nuttx/configs/16z/ostest/ostest.linkcmd
View File

@ -41,7 +41,7 @@ RANGE ROM $000000 : $007FFF
RANGE RAM $FFB000 : $FFBFFF
RANGE IODATA $FFC000 : $FFFFFF
RANGE EROM $008000 : $01FFFF
RANGE ERAM $800000 : $FFFFFF
RANGE ERAM $020000 : $EFFFFF
CHANGE NEAR_TEXT=NEAR_DATA
CHANGE FAR_TEXT=FAR_DATA
@ -70,7 +70,7 @@ define _near_heapbot = top of RAM
define _far_heapbot = top of ERAM
define _SYS_CLK_SRC = 1
define _SYS_CLK_FREQ = 19660800
define _SYS_CLK_FREQ = 18432000
define __EXTCT_INIT_PARAM = $40
define __EXTCS0_INIT_PARAM = $9001

16
nuttx/configs/16z/src/z16f_lowinit.c
View File

@ -51,6 +51,10 @@
* Private Functions
***************************************************************************/
/***************************************************************************
* Name: z16f_extcsinit
***************************************************************************/
static void z16f_extcsinit(void)
{
putreg8(0x40, Z16F_EXTCT); /* 8-bit External Bus Interface is enabled (Port E). */
@ -68,6 +72,10 @@ static void z16f_extcsinit(void)
putreg8(0x15, Z16F_EXTCS5L); /* Post Read: 1 wait state; Chip select: 5 wait states */
}
/***************************************************************************
* Name: z16f_gpioinit
***************************************************************************/
static void z16f_gpioinit(void)
{
/* NOTE: Here we assume that all ports are in the default reset state */
@ -249,8 +257,12 @@ static void z16f_gpioinit(void)
* Public Functions
***************************************************************************/
/***************************************************************************
* Name: z16f_lowinit
***************************************************************************/
void z16f_lowinit(void)
{
z16f_extcsinit();
z16f_gpioinit();
z16f_extcsinit(); /* Configure external memory */
z16f_gpioinit(); /* Configure board GPIOs */
}

4
nuttx/configs/Kconfig
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@ -142,6 +142,10 @@ config ARCH_BOARD_EFM32LG_DK3650
This is Energy Micro's development kit for the Leopard
Gecko MCU, which is an ARM Cortex-M3 device.
This port is uses the Energy Micro headers and peripheral drivers
as out of tree sources. In order to compile this, you need to set
ARCH_CHIP_EFM32_EMLIB_PATH to point to the external sources.
config ARCH_BOARD_EKKLM3S9B96
bool "TI/Stellaris EKK-LM3S9B96"
depends on ARCH_CHIP_LM3S9B96

4
nuttx/configs/README.txt
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@ -235,6 +235,10 @@ configs/efm32-dk3650
This is Energy Micro's development kit for the Leopard Gecko MCU, which
is an ARM Cortex-M3 device.
This port is uses the Energy Micro headers and peripheral drivers as out
of tree sources. In order to compile this, you need to set
CONFIG_ARCH_CHIP_EFM32_EMLIB_PATH to point to the external sources.
configs/ekk-lm3s9b96
TI/Stellaris EKK-LM3S9B96 board. This board is based on the
an EKK-LM3S9B96 which is a Cortex-M3.

61
nuttx/configs/z16f2800100zcog/include/board.h
View File

@ -1,5 +1,5 @@
/****************************************************************************
* board/board.h
* configs/z16f2800100zcog/board.h
*
* Copyright (C) 2008, 2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -33,13 +33,15 @@
*
****************************************************************************/
#ifndef __ARCH_BOARD_BOARD_H
#define __ARCH_BOARD_BOARD_H
#ifndef __CONFIGS_Z16F2800100ZCOG_INCLUDE_BOARD_H
#define __CONFIGS_Z16F2800100ZCOG_INCLUDE_BOARD_H
/****************************************************************************
* Included Files
****************************************************************************/
#include "chip.h"
/****************************************************************************
* Definitions
****************************************************************************/
@ -51,6 +53,39 @@
#define BOARD_CLKSRC 1 /* Clock source = external crystal */
#define BOARD_SYSTEM_FREQUENCY BOARD_XTAL_FREQUENCY
/* Flash option bits
*
* "Each time the option bits are programmed or erased, the device must be
* Reset for the change to take place. During any reset operation .., the
* option bits are automatically read from the Program memory and written
* to Option Configuration registers. ... Option Bit Control Register are
* loaded before the device exits Reset and the ZNEO CPU begins code
* execution. The Option Configuration registers are not part of the
* Register file and are not accessible for read or write access."
*/
#ifndef __ASSEMBLY__
# define BOARD_FLOPTION0 (Z16F_FLOPTION0_MAXPWR | Z16F_FLOPTION0_WDTRES | \
Z16F_FLOPTION0_WDTA0 | Z16F_FLOPTION0_VBOA0 | \
Z16F_FLOPTION0_DBGUART | Z16F_FLOPTION0_FWP | \
Z16F_FLOPTION0_RP)
# define BOARD_FLOPTION1 (Z16F_FLOPTION1_RESVD | Z16F_FLOPTION1_MCEN | \
Z16F_FLOPTION1_OFFH | Z16F_FLOPTION1_OFFL)
# define BOARD_FLOPTION2 Z16F_FLOPTION2_RESVD
# define BOARD_FLOPTION3 (Z16F_FLOPTION3_RESVD | Z16F_FLOPTION3_NORMAL | \
Z16F_FLOPTION3_ROMLESS)
/* The same settings, pre-digested for assembly language */
#else
# define BOARD_FLOPTION0 %ff
# define BOARD_FLOPTION1 %ff
# define BOARD_FLOPTION2 %ff
# define BOARD_FLOPTION3 %ff
#endif
/* LED pattern definitions
*
@ -62,15 +97,15 @@
* - Green LED D4 connected to chip port PA2_DE0
*/
#define LED_STARTED 0
#define LED_HEAPALLOCATE 1
#define LED_IRQSENABLED 2
#define LED_STACKCREATED 3
#define LED_IDLE 4
#define LED_INIRQ 5
#define LED_SIGNAL 6
#define LED_ASSERTION 7
#define LED_PANIC 8
#define LED_STARTED 0
#define LED_HEAPALLOCATE 1
#define LED_IRQSENABLED 2
#define LED_STACKCREATED 3
#define LED_IDLE 4
#define LED_INIRQ 5
#define LED_SIGNAL 6
#define LED_ASSERTION 7
#define LED_PANIC 8
/****************************************************************************
* Public Functions
@ -89,4 +124,4 @@ extern "C" {
}
#endif
#endif /* __ARCH_BOARD_BOARD_H */
#endif /* __CONFIGS_Z16F2800100ZCOG_INCLUDE_BOARD_H */

7
nuttx/mm/Kconfig
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@ -79,21 +79,24 @@ config MM_REGIONS
config ARCH_HAVE_HEAP2
bool
default n
if ARCH_HAVE_HEAP2
config HEAP2_BASE
hex "Start address of second user heap region"
default 0x00000000
depends on ARCH_HAVE_HEAP2
---help---
The base address of the second heap region.
config HEAP2_SIZE
int "Size of the second user heap region"
default 0
depends on ARCH_HAVE_HEAP2
---help---
The size of the second heap region.
endif # ARCH_HAVE_HEAP2
config GRAN
bool "Enable Granule Allocator"
default n