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Fix offset to STM32 F1 AFIO EXTICR register 

git-svn-id: https://nuttx.svn.sourceforge.net/svnroot/nuttx/trunk@4309 7fd9a85b-ad96-42d3-883c-3090e2eb8679
This commit is contained in:
patacongo 2012-01-18 17:48:46 +00:00
parent 77e4adaf17
commit 0d45a778d7
3 changed files with 34 additions and 29 deletions
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5
nuttx/ChangeLog
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@ -2376,3 +2376,8 @@
code complete, but still untested.
* confgs/sim/*/Make.defs and arch/sim/src/Makefile: Add support for building
a 32-bit executable on a 64-bit Linux target.
* configs/sure-pic32mx/src/up_leds.c: Correct GPIOs used for LEDs. The wrong
pins were being used.
* arch/arm/src/stm32/chip/stm32f10xxx_gpio.h: Correct offset to one AFIO EXICR
register.

6
nuttx/arch/arm/src/stm32/chip/stm32f10xxx_gpio.h
View File

@ -1,8 +1,8 @@
/************************************************************************************
* arch/arm/src/stm32/chip/stm32f10xxx_gpio.h
*
* Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Copyright (C) 2009, 2011-2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@ -136,7 +136,7 @@
#define STM32_AFIO_MAPR (STM32_AFIO_BASE+STM32_AFIO_MAPR_OFFSET)
#define STM32_AFIO_EXTICR(p) (STM32_AFIO_BASE+STM32_AFIO_EXTICR_OFFSET(p))
#define STM32_AFIO_EXTICR1 (STM32_AFIO_BASE+STM32_AFIO_EXTICR1_OFFSET)
#define STM32_AFIO_EXTICR2 (STM32_AFIO_BASE+STM32_AFIO_EXTICR3_OFFSET)
#define STM32_AFIO_EXTICR2 (STM32_AFIO_BASE+STM32_AFIO_EXTICR2_OFFSET)
#define STM32_AFIO_EXTICR3 (STM32_AFIO_BASE+STM32_AFIO_EXTICR3_OFFSET)
#define STM32_AFIO_EXTICR4 (STM32_AFIO_BASE+STM32_AFIO_EXTICR4_OFFSET)

52
nuttx/arch/arm/src/stm32/stm32_exti.c
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@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/stm32/stm32_exti.c
*
* Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved.
* Copyright (C) 2009, 2011-2012 Gregory Nutt. All rights reserved.
* Copyright (C) 2011 Uros Platise. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
* Uros Platise <uros.platise@isotel.eu>
@ -81,9 +81,9 @@ static int stm32_exti0_isr(int irq, void *context)
/* Clear the pending interrupt */
putreg32(0x0001, STM32_EXTI_PR);
/* And dispatch the interrupt to the handler */
if (stm32_exti_callbacks[0])
{
ret = stm32_exti_callbacks[0](irq, context);
@ -98,9 +98,9 @@ static int stm32_exti1_isr(int irq, void *context)
/* Clear the pending interrupt */
putreg32(0x0002, STM32_EXTI_PR);
/* And dispatch the interrupt to the handler */
if (stm32_exti_callbacks[1])
{
ret = stm32_exti_callbacks[1](irq, context);
@ -115,9 +115,9 @@ static int stm32_exti2_isr(int irq, void *context)
/* Clear the pending interrupt */
putreg32(0x0004, STM32_EXTI_PR);
/* And dispatch the interrupt to the handler */
if (stm32_exti_callbacks[2])
{
ret = stm32_exti_callbacks[2](irq, context);
@ -132,9 +132,9 @@ static int stm32_exti3_isr(int irq, void *context)
/* Clear the pending interrupt */
putreg32(0x0008, STM32_EXTI_PR);
/* And dispatch the interrupt to the handler */
if (stm32_exti_callbacks[3])
{
ret = stm32_exti_callbacks[3](irq, context);
@ -149,9 +149,9 @@ static int stm32_exti4_isr(int irq, void *context)
/* Clear the pending interrupt */
putreg32(0x0010, STM32_EXTI_PR);
/* And dispatch the interrupt to the handler */
if (stm32_exti_callbacks[4])
{
ret = stm32_exti_callbacks[4](irq, context);
@ -168,9 +168,9 @@ static int stm32_exti_multiisr(int irq, void *context, int first, int last)
/* Examine the state of each pin in the group */
pr = getreg32(STM32_EXTI_PR);
/* And dispatch the interrupt to the handler */
for (pin = first; pin <= last; pin++)
{
/* Is an interrupt pending on this pin? */
@ -181,9 +181,9 @@ static int stm32_exti_multiisr(int irq, void *context, int first, int last)
/* Clear the pending interrupt */
putreg32(mask, STM32_EXTI_PR);
/* And dispatch the interrupt to the handler */
if (stm32_exti_callbacks[pin])
{
int tmp = stm32_exti_callbacks[pin](irq, context);
@ -216,21 +216,21 @@ static int stm32_exti1510_isr(int irq, void *context)
*
* Description:
* Sets/clears GPIO based event and interrupt triggers.
*
*
* Parameters:
* - pinset: gpio pin configuration
* - rising/falling edge: enables
* - event: generate event when set
* - func: when non-NULL, generate interrupt
*
* Returns:
*
* Returns:
* The previous value of the interrupt handler function pointer. This value may,
* for example, be used to restore the previous handler when multiple handlers are
* used.
*
****************************************************************************/
xcpt_t stm32_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge,
xcpt_t stm32_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge,
bool event, xcpt_t func)
{
uint32_t pin = pinset & GPIO_PIN_MASK;
@ -238,9 +238,9 @@ xcpt_t stm32_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge,
int irq;
xcpt_t handler;
xcpt_t oldhandler = NULL;
/* Select the interrupt handler for this EXTI pin */
if (pin < 5)
{
irq = pin + STM32_IRQ_EXTI0;
@ -273,14 +273,14 @@ xcpt_t stm32_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge,
irq = STM32_IRQ_EXTI1510;
handler = stm32_exti1510_isr;
}
/* Get the previous GPIO IRQ handler; Save the new IRQ handler. */
oldhandler = stm32_exti_callbacks[pin];
stm32_exti_callbacks[pin] = func;
/* Install external interrupt handlers */
if (func)
{
irq_attach(irq, handler);
@ -292,12 +292,12 @@ xcpt_t stm32_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge,
}
/* Configure GPIO, enable EXTI line enabled if event or interrupt is enabled */
if (event || func)
if (event || func)
{
pinset |= GPIO_EXTI;
}
stm32_configgpio(pinset);
/* Configure rising/falling edges */