Harald Welte 44964981c2 i460: Fix bit- and subslots ordering of I.460 mux + demux ... When I wrote the new I.460 mux + demux code, I failed to realize that * bit numbers in relevant ITU specs start with 1 as MSB ... 8 as LSB * sub-slot 0 is bits 1+2, i.e. the two MSBs of a byte * bit-ordering within each sub-slot is also MSB first As a result, the code and test data was broken. Change-Id: I6df7dbf411efbdeaf516e72ac552432bf5a569d0		2020-08-02 21:57:05 +02:00
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i460_mux_test.c	i460: Fix bit- and subslots ordering of I.460 mux + demux	2020-08-02 21:57:05 +02:00
i460_mux_test.ok	i460: Fix bit- and subslots ordering of I.460 mux + demux	2020-08-02 21:57:05 +02:00