doc: add PDCH timing diagram illustrating UL/DL delay
Change-Id: I7d01c833b6b746d74e6ecd8c65c929a320a95d17changes/73/33673/1
parent
f60efde896
commit
fc2228e050
|
@ -0,0 +1,15 @@
|
|||
Assuming that PDCH is on TS1
|
||||
|
||||
| DL burst 1/4 | DL burst 2/4 | DL burst 3/4 | DL burst 4/4, our USF!
|
||||
| | | |
|
||||
|<----@------(Fn=0)------------>|<----@------(Fn=1)------------>|<----@------(Fn=2)------------>|<----@------(Fn=3)------------>|
|
||||
DL | 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 |
|
||||
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
UL | 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 |
|
||||
|<----@------(Fn=0)------------>|<----@------(Fn=1)------------>|<----@------(Fn=2)------------>|<----@------(Fn=3)------------>|<----@------(Fn=4)------------>|
|
||||
| | | | | | |
|
||||
| UL burst 1/4 | UL burst 2/4 | UL burst 3/4 | | UL burst 4/4 | | UL burst 1/4, Tx time!
|
||||
| |
|
||||
| |
|
||||
|<------------------------------------->|
|
||||
10 * 0.577 ms = 5.77 ms
|
Loading…
Reference in New Issue