packet-gmr1_rr: Add support for Immediate Assignement Type 4 decoding

This includes all the CSN.1.infrastructure and all the IEs needed for this particular message. Change-Id: I297ecb408952453878c0eaf0e5211e9cd1a3cdcc Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
packet-gmr1_rr: Update Request Reference IE to GMR-1 3G
2019-09-04 12:58:45 +02:00 · 2019-09-01 23:56:41 +02:00 · 2019-09-01 22:43:42 +02:00
1 changed files with 753 additions and 22 deletions
--- a/epan/dissectors/packet-gmr1_rr.c
+++ b/epan/dissectors/packet-gmr1_rr.c
@ -6,10 +6,11 @@
 * References:
 *  [1] ETSI TS 101 376-4-8 V1.3.1 - GMR-1 04.008
 *  [2] ETSI TS 101 376-4-8 V2.2.1 - GMPRS-1 04.008
- *  [3] ETSI TS 101 376-4-8 V3.1.1 - GMR-1 3G 44.008
+ *  [3] ETSI TS 101 376-4-8 V3.4.1 - GMR-1 3G 44.008
 *  [4] ETSI TS 100 940 V7.21.0 - GSM 04.08
 *  [5] ETSI TS 101 376-4-12 V3.2.1 - GMR-1 3G 44.060
 *  [6] ETSI TS 101 376-5-6 V1.3.1 - GMR-1 05.008
+ *  [7] ETSI TS 101 376-4-13 V3.4.1 - GMR-1 3G 44.118
 *
 * Wireshark - Network traffic analyzer
 * By Gerald Combs <gerald@wireshark.org>
@ -22,6 +23,7 @@

 #include <epan/packet.h>
 #include <epan/expert.h>
+#include "packet-csn1.h"

 #include "packet-gmr1_common.h"

@ -41,6 +43,451 @@ static gint ett_rr_pd = -1;
 static expert_field ei_gmr1_missing_mandatory_element = EI_INIT;


+/* ------------------------------------------------------------------------ */
+/* Misc helpers                                                             */
+/* ------------------------------------------------------------------------ */
+
+static void
+rr_bw_fmt(gchar *s, guint32 v)
+{
+	g_snprintf(s, ITEM_LABEL_LENGTH, "%d * 31.25 kHz = %.2f kHz (%d)", v, 31.25f*v, v);
+}
+
+
+/* ------------------------------------------------------------------------ */
+/* RR CSN1                                                                  */
+/* ------------------------------------------------------------------------ */
+
+	/* Fields */
+static int hf_rr_csn1_freq_alloc_ie_bw = -1;
+static int hf_rr_csn1_freq_alloc_ie_arfcn = -1;
+static int hf_rr_csn1_freq_alloc_ie_reserved = -1;
+static int hf_rr_csn1_freq_alloc_ie_ul_present = -1;
+static int hf_rr_csn1_slot_alloc_ie_start = -1;
+static int hf_rr_csn1_slot_alloc_ie_offset = -1;
+static int hf_rr_csn1_pdch_mcs_ie_mcs = -1;
+static int hf_rr_csn1_pdch_mcs_ie_mcs_1_6 = -1;
+static int hf_rr_csn1_pdch_mcs_ie_mcs_2_6 = -1;
+static int hf_rr_csn1_pdch_mcs_ie_mcs_5_12_present = -1;
+static int hf_rr_csn1_pdch_mcs_ie_mcs_5_12 = -1;
+static int hf_rr_csn1_dch_mcs_ie = -1;
+static int hf_rr_csn1_chan_info_ie_mode = -1;
+static int hf_rr_csn1_chan_info_ie_type = -1;
+static int hf_rr_csn1_pdch_chan_info_ie_type = -1;
+static int hf_rr_csn1_pdch_chan_info_ie_mcs = -1;
+static int hf_rr_csn1_pkt_imm_ass_4_ul_pdch_tbf_ul_tfi = -1;
+static int hf_rr_csn1_pkt_imm_ass_4_ul_pdch_tbf_usf_present = -1;
+static int hf_rr_csn1_pkt_imm_ass_4_ul_pdch_tbf_usf = -1;
+static int hf_rr_csn1_pkt_imm_ass_4_rb_id = -1;
+static int hf_rr_csn1_pkt_imm_ass_4_ul_pdch_tbf_ret_freq_set = -1;
+static int hf_rr_csn1_pkt_imm_ass_4_dch_pwr_ctrl_sync_ofs = -1;
+static int hf_rr_csn1_pkt_imm_ass_4_dch_dl_slot_alloc_type = -1;
+static int hf_rr_csn1_pkt_imm_ass_4_dch_dl_mac_slot_alloc = -1;
+static int hf_rr_csn1_pkt_imm_ass_4_dch_ul_slot_alloc_type = -1;
+static int hf_rr_csn1_pkt_imm_ass_4_dch_ul_mac_slot_alloc = -1;
+static int hf_rr_csn1_pkt_imm_ass_4_tbf_assign_type = -1;
+static int hf_rr_csn1_pkt_imm_ass_4_pc = -1;
+static int hf_rr_csn1_pkt_imm_ass_4_pdch_mcs_present = -1;
+static int hf_rr_csn1_pkt_imm_ass_4_dl_mac_slot_alloc_present = -1;
+static int hf_rr_csn1_pkt_imm_ass_4_dl_mac_slot_alloc = -1;
+static int hf_rr_csn1_pkt_imm_ass_4_tbf2_present = -1;
+static int hf_rr_csn1_pkt_imm_ass_4_ul_freq_alloc = -1;
+static int hf_rr_csn1_pkt_imm_ass_4_fwd_offset_present = -1;
+static int hf_rr_csn1_pkt_imm_ass_4_fwd_offset = -1;
+static int hf_rr_csn1_pkt_imm_ass_4_usf_delay = -1;
+static int hf_rr_csn1_pkt_imm_ass_4_ret_offset_present = -1;
+static int hf_rr_csn1_pkt_imm_ass_4_ret_offset = -1;
+static int hf_padding = -1;
+
+
+	/* Frequency Allocation IE - [5] 12.8a */
+typedef struct {
+	guint8		Bandwidth;
+	guint16		ARFCN;
+	guint8		_reserved;
+} Frequency_Struct_t;
+
+typedef struct {
+	Frequency_Struct_t	Downlink_Frequency;
+	guint8			Uplink_Frequency_present;
+	Frequency_Struct_t	Uplink_Frequency;
+} Frequency_Allocation_IE_t;
+
+static const
+CSN_DESCR_BEGIN(Frequency_Struct_t)
+  M_UINT       (Frequency_Struct_t, Bandwidth, 3, &hf_rr_csn1_freq_alloc_ie_bw),
+  M_UINT       (Frequency_Struct_t, ARFCN, 11, &hf_rr_csn1_freq_alloc_ie_arfcn),
+  M_UINT       (Frequency_Struct_t, _reserved, 1, &hf_rr_csn1_freq_alloc_ie_reserved),
+CSN_DESCR_END  (Frequency_Struct_t)
+
+static const
+CSN_DESCR_BEGIN(Frequency_Allocation_IE_t)
+  M_TYPE_LABEL (Frequency_Allocation_IE_t, Downlink_Frequency, Frequency_Struct_t, "Downlink Frequency"),
+  M_NEXT_EXIST (Frequency_Allocation_IE_t, Uplink_Frequency_present, 1, &hf_rr_csn1_freq_alloc_ie_ul_present),
+  M_TYPE_LABEL (Frequency_Allocation_IE_t, Uplink_Frequency, Frequency_Struct_t, "Uplink Frequency"),
+CSN_DESCR_END  (Frequency_Allocation_IE_t)
+
+
+	/* Slot Allocation IE - [5] 12.18a */
+typedef struct {
+	guint8		Starting_MAC_Slot;
+	guint8		Offset_Within_MAC_Slot;
+} Slot_Allocation_IE_t;
+
+static const
+CSN_DESCR_BEGIN(Slot_Allocation_IE_t)
+  M_UINT       (Slot_Allocation_IE_t, Starting_MAC_Slot, 3, &hf_rr_csn1_slot_alloc_ie_start),
+  M_UINT       (Slot_Allocation_IE_t, Offset_Within_MAC_Slot, 2, &hf_rr_csn1_slot_alloc_ie_offset),
+CSN_DESCR_END  (Slot_Allocation_IE_t)
+
+static const value_string rr_csn1_slot_alloc_ie_offset_vals[] = {
+	{ 0, "Physical Layer burst offset by 0 Time Slots from the start of MAC slot" },
+	{ 1, "Physical Layer burst offset by 1 Time Slots from the start of MAC slot" },
+	{ 2, "Physical Layer burst offset by 2 Time Slots from the start of MAC slot" },
+	{ 3, "Reserved" },
+	{ 0, NULL }
+};
+
+
+	/* PDCH MCS IE - [5] 12.35 */
+typedef struct {
+	guint8		CHANNEL_MCS_COMMAND;
+	guint8		CHANNEL_MCS_COMMAND_1_6;
+	guint8		CHANNEL_MCS_COMMAND_2_6;
+	guint8		CHANNEL_MCS_COMMAND_5_12_present;
+	guint8		CHANNEL_MCS_COMMAND_5_12;
+} PDCH_MCS_IE_t;
+
+static const
+CSN_DESCR_BEGIN(PDCH_MCS_IE_t)
+  M_UINT       (PDCH_MCS_IE_t, CHANNEL_MCS_COMMAND, 4, &hf_rr_csn1_pdch_mcs_ie_mcs),
+  M_UINT       (PDCH_MCS_IE_t, CHANNEL_MCS_COMMAND_1_6, 3, &hf_rr_csn1_pdch_mcs_ie_mcs_1_6),
+  M_UINT       (PDCH_MCS_IE_t, CHANNEL_MCS_COMMAND_2_6, 3, &hf_rr_csn1_pdch_mcs_ie_mcs_2_6),
+  M_NEXT_EXIST (PDCH_MCS_IE_t, CHANNEL_MCS_COMMAND_5_12_present, 1, &hf_rr_csn1_pdch_mcs_ie_mcs_5_12_present),
+  M_UINT       (PDCH_MCS_IE_t, CHANNEL_MCS_COMMAND_5_12, 4, &hf_rr_csn1_pdch_mcs_ie_mcs_5_12),
+CSN_DESCR_END  (PDCH_MCS_IE_t)
+
+
+static const value_string rr_csn1_pdch_mcs_ie_mcs_vals[] = {
+	/* Table 10.1a: PDCH(4,3) and PDCH(5,n) */
+	{ 0x00, "PNB: pi/4 CQPSK, Conv R1/2  ||  PNB3: pi/4 QPSK, Turbo R1/2" },
+	{ 0x01, "PNB: pi/4 CQPSK, Conv R5/8  ||  PNB3: pi/4 QPSK, Turbo R5/8" },
+	{ 0x02, "PNB: pi/4 CQPSK, Conv R3/4  ||  PNB3: pi/4 QPSK, Turbo R3/4" },
+	{ 0x03, "PNB: pi/4 QPSK, LDPC R1/2  ||  PNB3: pi/4 QPSK, Turbo R5/6" },
+	{ 0x04, "PNB: pi/4 QPSK, LDPC R2/3  ||  PNB3: 16 APSK, Turbo R2/3" },
+	{ 0x05, "PNB: pi/4 QPSK, LDPC R4/5  ||  PNB3: 16 APSK, Turbo R1/2" },
+	{ 0x06, "PNB: pi/4 QPSK, LDPC R9/10  ||  PNB3: 16 APSK, Turbo R4/7" },
+	{ 0x07, "PNB: 16 APSK, LDPC R2/3" },
+	{ 0x08, "PNB: 16 APSK, LDPC R4/5" },
+	{ 0x09, "PNB: 16 APSK, LDPC R9/10" },
+	{ 0x0a, "PNB: 32 APSK, LDPC R3/4" },
+	{ 0x0b, "PNB: 32 APSK, LDPC R4/5" },
+	{ 0x0f, "n/a" },
+	{ 0, NULL }
+};
+
+static const value_string rr_csn1_pdch_mcs_ie_mcs_1_6_vals[] = {
+	{ 0x00, "PNB(1,6): pi/4 CQPSK Conv R3/5  ||  PNB3(1,6): pi/2 BPSK, Tail-Biting Conv R10/19" },
+	{ 0x01, "PNB(1,6): pi/4 CQPSK Conv R7/10  ||  PNB3(1,6): pi/4 QPSK, Tail-Biting Conv R2/5" },
+	{ 0x02, "PNB(1,6): pi/4 CQPSK Conv R4/5" },
+	{ 0x06, "PNB3(1,6): pi/2 BPSK, Tail-Biting Conv R10/19, Header Type 2" },
+	{ 0x07, "n/a" },
+	{ 0, NULL }
+};
+
+static const value_string rr_csn1_pdch_mcs_ie_mcs_2_6_vals[] = {
+	{ 0x00, "PNB(2,6): pi/4 CQPSK Conv R3/5  ||  PNB3(2,6): pi/4 QPSK, Turbo R3/5" },
+	{ 0x01, "PNB(2,6): pi/4 CQPSK Conv R7/10  ||  PNB3(2,6): pi/4 QPSK, Turbo R7/10" },
+	{ 0x02, "PNB(2,6): pi/4 CQPSK Conv R4/5  ||  PNB3(2,6): pi/4 QPSK, Turbo R4/5" },
+	{ 0x07, "n/a" },
+	{ 0, NULL }
+};
+
+static const value_string rr_csn1_pdch_mcs_ie_mcs_5_12_vals[] = {
+	{ 0x00, "PNB3(5,12): pi/4 QPSK, Turbo R1/2" },
+	{ 0x01, "PNB3(5,12): pi/4 QPSK, Turbo R5/8" },
+	{ 0x02, "PNB3(5,12): pi/4 QPSK, Turbo R3/4" },
+	{ 0x03, "PNB2(5,12): pi/4 CQPSK, LDPC R1/2  ||  PNB3(5,12): pi/4 QPSK, Turbo R5/6" },
+	{ 0x04, "PNB2(5,12): pi/4 CQPSK, LDPC R2/3  ||  PNB3(5,12): 16 APSK, Turbo R2/3" },
+	{ 0x05, "PNB2(5,12): pi/4 CQPSK, LDPC R4/5  ||  PNB3(5,12): 16 APSK, Turbo R1/2" },
+	{ 0x06, "PNB2(5,12): pi/4 CQPSK, LDPC R9/10  ||  PNB3(5,12): 16 APSK, Turbo R4/7" },
+	{ 0x07, "PNB2(5,12): 16 APSK, LDPC R2/3" },
+	{ 0x08, "PNB2(5,12): 16 APSK, LDPC R4/5" },
+	{ 0x09, "PNB2(5,12): 16 APSK, LDPC R9/10" },
+	{ 0x0a, "PNB2(5,12): 32 APSK, LDPC R3/4" },
+	{ 0x0b, "PNB2(5,12): 32 APSK, LDPC R4/5" },
+	{ 0x0f, "n/a" },
+	{ 0, NULL }
+};
+
+
+	/* DCH MCS IE - [5] 12.35a */
+typedef struct {
+	guint8		CHANNEL_MCS_COMMAND_DCH_PNB_n_m;
+} DCH_MCS_IE_t;
+
+static const
+CSN_DESCR_BEGIN(DCH_MCS_IE_t)
+  M_UINT       (DCH_MCS_IE_t, CHANNEL_MCS_COMMAND_DCH_PNB_n_m, 3, &hf_rr_csn1_dch_mcs_ie),
+CSN_DESCR_END  (DCH_MCS_IE_t)
+
+static const value_string rr_csn1_dch_mcs_ie_vals[] = {
+	{ 0x00, "PNB3(1,3): pi/2 QPSK, Tail-Biting Conv R7/13  ||  PNB3(1,6): pi/2 BPSK, Tail-Biting Conv R10/19  ||  PNB3(1,8): pi/2 BPSK, Tail Biting Conv R4/7" },
+	{ 0x01, "PNB3(1,3): pi/4 QPSK, Tail-Biting Conv R4/5  ||  PNB3(1,6): pi/4 QPSK, Tail-Biting Conv R2/5" },
+	{ 0x07, "n/a" },
+	{ 0, NULL }
+};
+
+
+	/* Channel Info IE - [5] 12.36 */
+typedef struct {
+	guint8		Channel_Mode;
+	guint8		Channel_Type;
+} Channel_Info_IE_t;
+
+static const
+CSN_DESCR_BEGIN(Channel_Info_IE_t)
+  M_UINT       (Channel_Info_IE_t, Channel_Mode,  1, &hf_rr_csn1_chan_info_ie_mode),
+  M_UINT       (Channel_Info_IE_t, Channel_Type,  3, &hf_rr_csn1_chan_info_ie_type),
+CSN_DESCR_END  (Channel_Info_IE_t)
+
+static const value_string rr_csn1_chan_info_ie_mode_vals[] = {
+	{ 0, "Non-speech (Signalling / Data)" },
+	{ 1, "Speech" },
+	{ 0, NULL }
+};
+
+static const value_string rr_csn1_chan_info_ie_type_vals[] = {
+	{ 0, "DCH(1,3)" },
+	{ 1, "DCH(1,6)" },
+	{ 2, "DCH(1,8)" },
+	{ 0, NULL }
+};
+
+
+	/* PDCH Channel Info IE - [5] 12.36a */
+#if 0
+typedef struct {
+	guint8		Channel_Type;
+	guint8		Channel_MCS;
+} PDCH_Channel_Info_IE_t;
+
+static const
+CSN_DESCR_BEGIN(PDCH_Channel_Info_IE_t)
+  M_UINT       (PDCH_Channel_Info_IE_t, Channel_Type, 3, &hf_rr_csn1_pdch_chan_info_ie_type),
+  M_UINT       (PDCH_Channel_Info_IE_t, Channel_MCS,  4, &hf_rr_csn1_pdch_chan_info_ie_mcs),
+CSN_DESCR_END  (PDCH_Channel_Info_IE_t)
+#endif
+
+static const value_string rr_csn1_pdch_chan_info_ie_type_vals[] = {
+	{ 0, "PDCH3(1,6)" },
+	{ 1, "PDCH3(2,6)" },
+	{ 2, "PDCH3(5,3)" },
+	{ 3, "PDCH3(5,12)" },
+	{ 0, NULL }
+};
+
+static const value_string rr_csn1_pdch_chan_info_ie_mcs[] = {
+	{ 0x00, "PNB3(1,6): pi/2 BPSK, Tail-Biting Conv R10/19  ||  PNB3(2,6): pi/4 QPSK, Turbo R3/5  ||  PNB3(5,x): pi/4 QPSK, Turbo R1/2" },
+	{ 0x01, "PNB3(1,6): pi/4 QPSK, Tail-Biting Conv R2/5  ||  PNB3(2,6): pi/4 QPSK, Turbo R7/10  ||  PNB3(5,x): pi/4 QPSK, Turbo R5/8" },
+	{ 0x02, "PNB3(2,6): pi/4 QPSK, Turbo R4/5  ||  PNB3(5,x): pi/4 QPSK, Turbo R3/4" },
+	{ 0x03, "PNB3(5,x): pi/4 QPSK, Turbo R5/6" },
+	{ 0x04, "PNB3(5,x): 16 APSK, Turbo R2/3" },
+	{ 0x05, "PNB3(5,x): 16 APSK, Turbo R1/2" },
+	{ 0x06, "PNB3(5,x): 16 APSK, Turbo R4/7" },
+	{ 0, NULL }
+};
+
+
+	/* Packet Imm. Ass. Type 4 Parameters - [3] 11.5.2.125 */
+typedef struct {
+	guint8		Uplink_TFI;
+	guint8		Uplink_Status_Flag_present;
+	guint8		Uplink_Status_Flag;
+	guint8		RB_Id;
+	guint8		Return_Frequency_Set;
+} Uplink_TBF_Allocation_Struct_t;
+
+typedef struct {
+	Channel_Info_IE_t	Channel_Info;
+	guint8			Power_Control_Synch_Offset;
+	DCH_MCS_IE_t		DCH_Channel_MCS_Info;
+	guint8			Uplink_Slot_Allocation_Type;
+	union {
+		guint8			raw;
+		Slot_Allocation_IE_t	ie;
+	} Uplink_Slot_Allocation;
+	guint8			RB_Id;
+} UL_DCH_TBF_Allocation_Struct_t;
+
+typedef struct {
+	Channel_Info_IE_t	Channel_Info;
+	guint8			Power_Control_Synch_Offset;
+	DCH_MCS_IE_t		DCH_Channel_MCS_Info;
+	guint8			Downlink_Slot_Allocation_Type;
+	union {
+		guint8			raw;
+		Slot_Allocation_IE_t	ie;
+	} Downlink_Slot_Allocation;
+	guint8			Uplink_Slot_Allocation_Type;
+	union {
+		guint8			raw;
+		Slot_Allocation_IE_t	ie;
+	} Uplink_Slot_Allocation;
+	guint8			RB_Id;
+} ULDL_DCH_TBF_Allocation_Struct_t;
+
+typedef struct {
+  guint8 AssignementType;
+  union {
+    Uplink_TBF_Allocation_Struct_t	Uplink_PDCH_TBF_Allocation;
+    UL_DCH_TBF_Allocation_Struct_t	Uplink_DCH_TBF_Allocation;
+    ULDL_DCH_TBF_Allocation_Struct_t	Uplink_and_Downlink_DCH_TBF_Allocation;
+  } u;
+} TBF_Assignement_Struct_t;
+
+typedef struct {
+	guint8				Power_Control_Parameter;
+	guint8				PDCH_Channel_MCS_Info_present;
+	PDCH_MCS_IE_t			PDCH_Channel_MCS_Info;
+	guint8				Downlink_MAC_Slot_Allocation_present;
+	guint8				Downlink_MAC_Slot_Allocation;
+	TBF_Assignement_Struct_t	TBF1;
+	guint8				TBF2_present;
+	TBF_Assignement_Struct_t	TBF2;
+	guint8				Uplink_Frequency_Allocation;
+	Frequency_Allocation_IE_t	Frequency_Allocation;
+	guint8				Color_Code_Usage;
+	guint8				MAC_FORWARD_TS_OFFSET_and_USF_DELAY_present;
+	guint8				MAC_FORWARD_TS_OFFSET;
+	guint8				USF_DELAY;
+	guint8				MAC_RETURN_TS_OFFSET_present;
+	guint8				MAC_RETURN_TS_OFFSET;
+} Packet_Immediate_Assignment_Type_4_Parameters_t;
+
+static const
+CSN_DESCR_BEGIN(Uplink_TBF_Allocation_Struct_t)
+  M_UINT       (Uplink_TBF_Allocation_Struct_t, Uplink_TFI, 8, &hf_rr_csn1_pkt_imm_ass_4_ul_pdch_tbf_ul_tfi),
+  M_NEXT_EXIST (Uplink_TBF_Allocation_Struct_t, Uplink_Status_Flag_present, 1, &hf_rr_csn1_pkt_imm_ass_4_ul_pdch_tbf_usf_present),
+  M_UINT       (Uplink_TBF_Allocation_Struct_t, Uplink_Status_Flag, 8, &hf_rr_csn1_pkt_imm_ass_4_ul_pdch_tbf_usf),
+  M_UINT       (Uplink_TBF_Allocation_Struct_t, RB_Id, 5, &hf_rr_csn1_pkt_imm_ass_4_rb_id),
+  M_UINT       (Uplink_TBF_Allocation_Struct_t, Return_Frequency_Set, 1, &hf_rr_csn1_pkt_imm_ass_4_ul_pdch_tbf_ret_freq_set),
+CSN_DESCR_END  (Uplink_TBF_Allocation_Struct_t)
+
+static const
+CSN_ChoiceElement_t UL_DCH_TBF_Allocation_USA_Choice[] ={
+  {1, 0x00, 0, M_UINT      (UL_DCH_TBF_Allocation_Struct_t, Uplink_Slot_Allocation.raw, 8, &hf_rr_csn1_pkt_imm_ass_4_dch_ul_mac_slot_alloc)},
+  {1, 0x01, 0, M_TYPE_LABEL(UL_DCH_TBF_Allocation_Struct_t, Uplink_Slot_Allocation.ie, Slot_Allocation_IE_t, "Uplink Slot Allocation")},
+};
+
+static const
+CSN_DESCR_BEGIN(UL_DCH_TBF_Allocation_Struct_t)
+  M_TYPE_LABEL (UL_DCH_TBF_Allocation_Struct_t, Channel_Info, Channel_Info_IE_t, "Channel Info"),
+  M_UINT       (UL_DCH_TBF_Allocation_Struct_t, Power_Control_Synch_Offset, 2, &hf_rr_csn1_pkt_imm_ass_4_dch_pwr_ctrl_sync_ofs),
+  M_TYPE_LABEL (UL_DCH_TBF_Allocation_Struct_t, DCH_Channel_MCS_Info, DCH_MCS_IE_t, "DCH Channel MCS Info"),
+  M_CHOICE_IL  (UL_DCH_TBF_Allocation_Struct_t, Uplink_Slot_Allocation_Type, UL_DCH_TBF_Allocation_USA_Choice, ElementsOf(UL_DCH_TBF_Allocation_USA_Choice), &hf_rr_csn1_pkt_imm_ass_4_dch_ul_slot_alloc_type),
+  M_UINT       (UL_DCH_TBF_Allocation_Struct_t, RB_Id, 5, &hf_rr_csn1_pkt_imm_ass_4_rb_id),
+CSN_DESCR_END  (UL_DCH_TBF_Allocation_Struct_t)
+
+static const
+CSN_ChoiceElement_t ULDL_DCH_TBF_Allocation_DSA_Choice[] ={
+  {1, 0x00, 0, M_UINT      (ULDL_DCH_TBF_Allocation_Struct_t, Downlink_Slot_Allocation.raw, 8, &hf_rr_csn1_pkt_imm_ass_4_dch_dl_mac_slot_alloc)},
+  {1, 0x01, 0, M_TYPE_LABEL(ULDL_DCH_TBF_Allocation_Struct_t, Downlink_Slot_Allocation.ie, Slot_Allocation_IE_t, "Downlink Slot Allocation")},
+};
+
+static const
+CSN_ChoiceElement_t ULDL_DCH_TBF_Allocation_USA_Choice[] ={
+  {1, 0x00, 0, M_UINT      (ULDL_DCH_TBF_Allocation_Struct_t, Uplink_Slot_Allocation.raw, 8, &hf_rr_csn1_pkt_imm_ass_4_dch_ul_mac_slot_alloc)},
+  {1, 0x01, 0, M_TYPE_LABEL(ULDL_DCH_TBF_Allocation_Struct_t, Uplink_Slot_Allocation.ie, Slot_Allocation_IE_t, "Uplink Slot Allocation")},
+};
+
+static const
+CSN_DESCR_BEGIN(ULDL_DCH_TBF_Allocation_Struct_t)
+  M_TYPE_LABEL (ULDL_DCH_TBF_Allocation_Struct_t, Channel_Info, Channel_Info_IE_t, "Channel Info"),
+  M_UINT       (ULDL_DCH_TBF_Allocation_Struct_t, Power_Control_Synch_Offset, 2, &hf_rr_csn1_pkt_imm_ass_4_dch_pwr_ctrl_sync_ofs),
+  M_TYPE_LABEL (ULDL_DCH_TBF_Allocation_Struct_t, DCH_Channel_MCS_Info, DCH_MCS_IE_t, "DCH Channel MCS Info"),
+  M_CHOICE_IL  (ULDL_DCH_TBF_Allocation_Struct_t, Downlink_Slot_Allocation_Type, ULDL_DCH_TBF_Allocation_DSA_Choice, ElementsOf(ULDL_DCH_TBF_Allocation_DSA_Choice), &hf_rr_csn1_pkt_imm_ass_4_dch_dl_slot_alloc_type),
+  M_CHOICE_IL  (ULDL_DCH_TBF_Allocation_Struct_t, Uplink_Slot_Allocation_Type, ULDL_DCH_TBF_Allocation_USA_Choice, ElementsOf(ULDL_DCH_TBF_Allocation_USA_Choice), &hf_rr_csn1_pkt_imm_ass_4_dch_ul_slot_alloc_type),
+  M_UINT       (ULDL_DCH_TBF_Allocation_Struct_t, RB_Id, 5, &hf_rr_csn1_pkt_imm_ass_4_rb_id),
+CSN_DESCR_END  (ULDL_DCH_TBF_Allocation_Struct_t)
+
+static const
+CSN_ChoiceElement_t TBF_Assignement_Choice[] =
+{
+  {1, 0x00, 0, M_TYPE_LABEL(TBF_Assignement_Struct_t, u.Uplink_PDCH_TBF_Allocation, Uplink_TBF_Allocation_Struct_t, "Uplink PDCH TBF Allocation")},
+  {2, 0x02, 0, M_TYPE_LABEL(TBF_Assignement_Struct_t, u.Uplink_DCH_TBF_Allocation, UL_DCH_TBF_Allocation_Struct_t, "Uplink DCH TBF Allocation")},
+  {3, 0x06, 0, M_TYPE_LABEL(TBF_Assignement_Struct_t, u.Uplink_and_Downlink_DCH_TBF_Allocation, ULDL_DCH_TBF_Allocation_Struct_t, "Uplink and Downlink DCH TBF Allocation")},
+};
+
+static const
+CSN_DESCR_BEGIN(TBF_Assignement_Struct_t)
+  M_CHOICE_IL  (TBF_Assignement_Struct_t, AssignementType, TBF_Assignement_Choice, ElementsOf(TBF_Assignement_Choice), &hf_rr_csn1_pkt_imm_ass_4_tbf_assign_type),
+CSN_DESCR_END  (TBF_Assignement_Struct_t)
+
+static const
+CSN_DESCR_BEGIN(Packet_Immediate_Assignment_Type_4_Parameters_t)
+  M_UINT       (Packet_Immediate_Assignment_Type_4_Parameters_t, Power_Control_Parameter, 6, &hf_rr_csn1_pkt_imm_ass_4_pc),
+  M_NEXT_EXIST (Packet_Immediate_Assignment_Type_4_Parameters_t, PDCH_Channel_MCS_Info_present, 1, &hf_rr_csn1_pkt_imm_ass_4_pdch_mcs_present),
+  M_TYPE_LABEL (Packet_Immediate_Assignment_Type_4_Parameters_t, PDCH_Channel_MCS_Info, PDCH_MCS_IE_t, "PDCH Channel MCS Info"),
+  M_NEXT_EXIST (Packet_Immediate_Assignment_Type_4_Parameters_t, Downlink_MAC_Slot_Allocation_present, 1, &hf_rr_csn1_pkt_imm_ass_4_dl_mac_slot_alloc_present),
+  M_UINT       (Packet_Immediate_Assignment_Type_4_Parameters_t, Downlink_MAC_Slot_Allocation, 8, &hf_rr_csn1_pkt_imm_ass_4_dl_mac_slot_alloc),
+  M_TYPE_LABEL (Packet_Immediate_Assignment_Type_4_Parameters_t, TBF1, TBF_Assignement_Struct_t, "TBF 1"),
+  M_NEXT_EXIST (Packet_Immediate_Assignment_Type_4_Parameters_t, TBF2_present, 1, &hf_rr_csn1_pkt_imm_ass_4_tbf2_present),
+  M_TYPE_LABEL (Packet_Immediate_Assignment_Type_4_Parameters_t, TBF2, TBF_Assignement_Struct_t, "TBF 2"),
+  M_UINT       (Packet_Immediate_Assignment_Type_4_Parameters_t, Uplink_Frequency_Allocation, 1, &hf_rr_csn1_pkt_imm_ass_4_ul_freq_alloc),
+  M_TYPE_LABEL (Packet_Immediate_Assignment_Type_4_Parameters_t, Frequency_Allocation, Frequency_Allocation_IE_t, "Frequency Allocation"),
+  M_NEXT_EXIST (Packet_Immediate_Assignment_Type_4_Parameters_t, MAC_FORWARD_TS_OFFSET_and_USF_DELAY_present, 2, &hf_rr_csn1_pkt_imm_ass_4_fwd_offset_present),
+  M_UINT       (Packet_Immediate_Assignment_Type_4_Parameters_t, MAC_FORWARD_TS_OFFSET, 2, &hf_rr_csn1_pkt_imm_ass_4_fwd_offset),
+  M_UINT       (Packet_Immediate_Assignment_Type_4_Parameters_t, USF_DELAY, 3, &hf_rr_csn1_pkt_imm_ass_4_usf_delay),
+  M_NEXT_EXIST (Packet_Immediate_Assignment_Type_4_Parameters_t, MAC_RETURN_TS_OFFSET_present, 1, &hf_rr_csn1_pkt_imm_ass_4_ret_offset_present),
+  M_UINT       (Packet_Immediate_Assignment_Type_4_Parameters_t, MAC_RETURN_TS_OFFSET, 5, &hf_rr_csn1_pkt_imm_ass_4_ret_offset),
+  M_PADDING_BITS(Packet_Immediate_Assignment_Type_4_Parameters_t, &hf_padding),
+CSN_DESCR_END  (Packet_Immediate_Assignment_Type_4_Parameters_t)
+
+static const value_string rr_csn1_pkt_imm_ass_4_ul_pdch_tbf_usf_present_vals[] = {
+	{ 0, "USF value is the same as Uplink TFI" },
+	{ 1, "USF value present" },
+	{ 0, NULL }
+};
+
+static const value_string rr_csn1_pkt_imm_ass_4_ul_pdch_tbf_ret_freq_set_vals[] = {
+	{ 0, "First Set" },
+	{ 1, "Second Set" },
+	{ 0, NULL }
+};
+
+static const value_string rr_csn1_pkt_imm_ass_4_dch_pwr_ctrl_sync_ofs_vals[] = {
+	{ 0, "K = 6" },
+	{ 1, "K = 7" },
+	{ 2, "K = 8" },
+	{ 3, "K = 9" },
+	{ 0, NULL }
+};
+
+static const value_string rr_csn1_pkt_imm_ass_4_dch_slot_alloc_type_vals[] = {
+	{ 0, "MAC Slot Allocation" },
+	{ 1, "Slot Allocation IE" },
+	{ 0, NULL }
+};
+
+static const value_string rr_csn1_pkt_imm_ass_4_ul_freq_alloc_vals[] = {
+	{ 0, "Uplink ARFCN in Frequency Allocation is applicable for PDCH allocations" },
+	{ 1, "Uplink ARFCN for PDCH allocations specified in PDCH Organization message or PDCH Uplink Organization IE" },
+	{ 0, NULL }
+};
+
+static void
+rr_csn1_pkt_imm_ass_4_pc_fmt(gchar *s, guint32 v)
+{
+        gint32 sv = (gint32)v;
+	if (sv > 60)
+		g_snprintf(s, ITEM_LABEL_LENGTH, "Escape %d (%d)", sv-60, sv);
+	else
+		g_snprintf(s, ITEM_LABEL_LENGTH, "%.1f dB (%d)", sv * 0.4f, sv);
+}
+
+
+
 /* ------------------------------------------------------------------------ */
 /* RR Information Elements                                                  */
 /* ------------------------------------------------------------------------ */
@ -52,7 +499,7 @@ enum gmr1_ie_rr_idx {
 	GMR1_IE_RR_CIPH_RESP,			/* [4] 10.5.2.10  */
 	GMR1_IE_RR_L2_PSEUDO_LEN,		/* [1] 11.5.2.19  */
 	GMR1_IE_RR_PAGE_MODE,			/* [1] 11.5.2.26  */
-	GMR1_IE_RR_REQ_REF,			/* [1] 11.5.2.30  */
+	GMR1_IE_RR_REQ_REF,			/* [3] 11.5.2.30  */
 	GMR1_IE_RR_CAUSE,			/* [1] 11.5.2.31  */
 	GMR1_IE_RR_TIMING_OFS,			/* [1] 11.5.2.40  */
 	GMR1_IE_RR_TMSI_PTMSI,			/* [4] 10.5.2.42  */
@ -74,10 +521,12 @@ enum gmr1_ie_rr_idx {
 	GMR1_IE_RR_PKT_FREQ_PRM,		/* [3] 11.5.2.106 */
 	GMR1_IE_RR_PKT_IMM_ASS_2_PRM,		/* [3] 11.5.2.107 */
 	GMR1_IE_RR_USF,				/* [3] 11.5.2.110 */
+	GMR1_IE_RR_PKT_IMM_ASS_4_PRM,		/* [3] 11.5.2.125 */
 	GMR1_IE_RR_TIMING_ADV_IDX,		/* [3] 10.1.18.3.4 */
 	GMR1_IE_RR_TLLI,			/* [5] 12.16      */
 	GMR1_IE_RR_PKT_PWR_CTRL_PRM,		/* [3] 10.1.18.3.3 */
 	GMR1_IE_RR_PERSISTENCE_LVL,		/* [3] 10.1.18.4.2 */
+	GMR1_IE_RR_SRNTI,			/* [7] 7.18.1     */
 	NUM_GMR1_IE_RR	/* Terminator */
 };

@ -95,7 +544,7 @@ static const value_string gmr1_ie_rr_strings[] = {
 	{ GMR1_IE_RR_PAGE_MODE,
 	  "Page Mode" },			/* [1] 11.5.2.26  */
 	{ GMR1_IE_RR_REQ_REF,
-	  "Request Reference" },		/* [1] 11.5.2.30  */
+	  "Request Reference" },		/* [3] 11.5.2.30  */
 	{ GMR1_IE_RR_CAUSE,
 	  "RR Cause" },				/* [1] 11.5.2.31  */
 	{ GMR1_IE_RR_TIMING_OFS,
@ -138,6 +587,8 @@ static const value_string gmr1_ie_rr_strings[] = {
 	  "Packet Imm. Ass. Type 2 Params" },	/* [3] 11.5.2.107 */
 	{ GMR1_IE_RR_USF,
 	  "USF" },				/* [3] 11.5.2.110 */
+	{ GMR1_IE_RR_PKT_IMM_ASS_4_PRM,
+	  "Packet Imm. Ass. Type 4 Params" },	/* [3] 11.5.2.125 */
 	{ GMR1_IE_RR_TIMING_ADV_IDX,
 	  "Timing Advance Index" },		/* [3] 10.1.18.3.4 */
 	{ GMR1_IE_RR_TLLI,
@ -146,6 +597,8 @@ static const value_string gmr1_ie_rr_strings[] = {
 	  "Packet Power Control Params" },	/* [3] 10.1.18.3.3 */
 	{ GMR1_IE_RR_PERSISTENCE_LVL,
 	  "Persistence Level" },		/* [3] 10.1.18.4.2 */
+	{ GMR1_IE_RR_SRNTI,
+	  "S-RNTI" },				/* [7] 7.18.1     */
 	{ 0, NULL },
 };
 value_string_ext gmr1_ie_rr_strings_ext = VALUE_STRING_EXT_INIT(gmr1_ie_rr_strings);
@ -170,6 +623,7 @@ static int hf_rr_page_mode = -1;
 static int hf_rr_page_mode_spare = -1;
 static int hf_rr_req_ref_est_cause = -1;
 static int hf_rr_req_ref_ra = -1;
+static int hf_rr_req_ref_retry = -1;
 static int hf_rr_req_ref_fn = -1;
 static int hf_rr_cause = -1;
 static int hf_rr_timing_ofs_ti = -1;
@ -243,12 +697,14 @@ static int hf_rr_pkt_imm_ass_2_prm_d_usf_granularity = -1;
 static int hf_rr_pkt_imm_ass_2_prm_d_mac_slot_alloc = -1;
 static int hf_rr_usf_value = -1;
 static int hf_rr_usf_spare = -1;
+static int hf_rr_pkt_imm_ass_4_prm = -1;
 static int hf_rr_timing_adv_idx_value = -1;
 static int hf_rr_timing_adv_idx_spare = -1;
 static int hf_rr_tlli = -1;
 static int hf_rr_pkt_pwr_ctrl_prm_par = -1;
 static int hf_rr_pkt_pwr_ctrl_prm_spare = -1;
 static int hf_rr_persistence_lvl[4] = { -1, -1, -1, -1 };
+static int hf_rr_srnti = -1;
 static int hf_rr_protocol_discriminator = -1;
 static int hf_rr_message_elements = -1;

@ -411,7 +867,7 @@ GMR1_IE_FUNC(gmr1_ie_rr_page_mode)
 	return 1;
 }

-/* [1] 11.5.2.30 - Request Reference */
+/* [3] 11.5.2.30 - Request Reference */
 static const value_string rr_req_ref_est_cause_vals[] = {
 	{ 0, "MO call" },
 	{ 1, "In response to paging/alerting" },
@ -420,7 +876,7 @@ static const value_string rr_req_ref_est_cause_vals[] = {
 	{ 4, "Supplementary/short message service" },
 	{ 5, "Position verification" },
 	{ 6, "Any other valid cause" },
-	{ 7, "Reserved" },
+	{ 7, "Packet Switched Services" },
 	{ 0, NULL }
 };

@ -429,6 +885,7 @@ GMR1_IE_FUNC(gmr1_ie_rr_req_ref)
 	/* Establishement Cause + RA */
 	proto_tree_add_item(tree, hf_rr_req_ref_est_cause, tvb, offset, 1, ENC_BIG_ENDIAN);
 	proto_tree_add_item(tree, hf_rr_req_ref_ra, tvb, offset, 1, ENC_BIG_ENDIAN);
+	proto_tree_add_item(tree, hf_rr_req_ref_retry, tvb, offset, 1, ENC_BIG_ENDIAN);
 	offset++;

 	/* Frame number % 256 */
@ -935,12 +1392,6 @@ static const crumb_spec_t rr_pkt_freq_prm_ul_freq_dist_crumbs[] = {
 	{  0, 0 }
 };

-static void
-rr_pkt_freq_prm_xx_bw_fmt(gchar *s, guint32 v)
-{
-	g_snprintf(s, ITEM_LABEL_LENGTH, "%d * 31.25 kHz = %.2f kHz (%d)", v, 31.25f*v, v);
-}
-
 GMR1_IE_FUNC(gmr1_ie_rr_pkt_freq_prm)
 {
 	/* ARFCN */
@ -1105,6 +1556,23 @@ GMR1_IE_FUNC(gmr1_ie_rr_usf)
 	return 3;
 }

+/* [3] 11.5.2.125 - Packet Imm. Ass. Type 4 Params */
+GMR1_IE_FUNC(gmr1_ie_rr_pkt_imm_ass_4_prm)
+{
+	int bofs = offset * 8 + 4;	/* Start at half byte */
+
+	proto_tree_add_item(tree, hf_rr_pkt_imm_ass_4_prm, tvb, offset, 13, ENC_NA);
+
+	Packet_Immediate_Assignment_Type_4_Parameters_t *data;
+	data = wmem_new(wmem_packet_scope(), Packet_Immediate_Assignment_Type_4_Parameters_t);
+
+	csnStream_t ar;
+	csnStreamInit(&ar, bofs, tvb_captured_length(tvb)*8-bofs, pinfo);
+	csnStreamDissector(tree, &ar, CSNDESCR(Packet_Immediate_Assignment_Type_4_Parameters_t), tvb, data, ett_gmr1_ie_rr[GMR1_IE_RR_PKT_IMM_ASS_4_PRM]);
+
+	return 13;
+}
+
 /* [3] 10.1.18.3.4 & [5] 12.29 - Timing Advance Index */
 GMR1_IE_FUNC(gmr1_ie_rr_timing_adv_idx)
 {
@ -1165,6 +1633,15 @@ GMR1_IE_FUNC(gmr1_ie_rr_persistence_lvl)
 	return 2;
 }

+/* [7] 7.18.1 - S-RNTI */
+GMR1_IE_FUNC(gmr1_ie_rr_srnti)
+{
+	/* S-RNTI value as hex */
+	proto_tree_add_item(tree, hf_rr_srnti, tvb, offset, 3, ENC_BIG_ENDIAN);
+
+	return 2;
+}
+

 elem_fcn gmr1_ie_rr_func[NUM_GMR1_IE_RR] = {
 	gmr1_ie_rr_chan_desc,		/* Channel Description */
@ -1195,10 +1672,12 @@ elem_fcn gmr1_ie_rr_func[NUM_GMR1_IE_RR] = {
 	gmr1_ie_rr_pkt_freq_prm,	/* Packet Frequency Parameters */
 	gmr1_ie_rr_pkt_imm_ass_2_prm,	/* Packet Imm. Ass. Type 2 Params */
 	gmr1_ie_rr_usf,			/* USF */
+	gmr1_ie_rr_pkt_imm_ass_4_prm,	/* Packet Imm. Ass. Type 4 Params */
 	gmr1_ie_rr_timing_adv_idx,	/* Timing Advance Index */
 	gmr1_ie_rr_tlli,		/* TLLI */
 	gmr1_ie_rr_pkt_pwr_ctrl_prm,	/* Packet Power Control Params */
 	gmr1_ie_rr_persistence_lvl,	/* Persistence Level */
+	gmr1_ie_rr_srnti,		/* S-RNTI */
 };


@ -1218,7 +1697,7 @@ GMR1_MSG_FUNC(gmr1_rr_msg_imm_ass)

 	ELEM_MAND_V(GMR1_IE_RR, GMR1_IE_RR_MES_INFO_FLG, NULL, ei_gmr1_missing_mandatory_element);

-	/* Request Reference 1 (MES1)		[1] 11.5.2.30	- M V 2 */
+	/* Request Reference 1 (MES1)		[3] 11.5.2.30	- M V 2 */
 	ELEM_MAND_V(GMR1_IE_RR, GMR1_IE_RR_REQ_REF, " - MES1", ei_gmr1_missing_mandatory_element);

 	/* GPS Discriminator			[1] 11.5.2.101	- C V 2 */
@ -1251,17 +1730,17 @@ GMR1_MSG_FUNC(gmr1_rr_msg_imm_ass)
 		ELEM_MAND_V(GMR1_IE_RR, GMR1_IE_RR_POS_UPD_INFO, " - Dedicated Mode", ei_gmr1_missing_mandatory_element);
 	}

-	/* Request Reference 2 (MES2)		[1] 11.5.2.30	- C V 2 */
+	/* Request Reference 2 (MES2)		[3] 11.5.2.30	- C V 2 */
 	if (mif & 0x10) {
 		ELEM_MAND_V(GMR1_IE_RR, GMR1_IE_RR_REQ_REF, " - MES2", ei_gmr1_missing_mandatory_element);
 	}

-	/* Request Reference 3 (MES3)		[1] 11.5.2.30	- C V 2 */
+	/* Request Reference 3 (MES3)		[3] 11.5.2.30	- C V 2 */
 	if (mif & 0x20) {
 		ELEM_MAND_V(GMR1_IE_RR, GMR1_IE_RR_REQ_REF, " - MES3", ei_gmr1_missing_mandatory_element);
 	}

-	/* Request Reference 4 (MES4)		[1] 11.5.2.30	- C V 2 */
+	/* Request Reference 4 (MES4)		[3] 11.5.2.30	- C V 2 */
 	if (mif & 0x40) {
 		ELEM_MAND_V(GMR1_IE_RR, GMR1_IE_RR_REQ_REF, " - MES4", ei_gmr1_missing_mandatory_element);
 	}
@ -1279,7 +1758,7 @@ GMR1_MSG_FUNC(gmr1_rr_msg_imm_ass_rej_1)

 	GMR1_MSG_FUNC_BEGIN

-	/* Request Reference 1 (MES1) 		[1] 11.5.2.30	- M V 2 */
+	/* Request Reference 1 (MES1) 		[3] 11.5.2.30	- M V 2 */
 	ELEM_MAND_V(GMR1_IE_RR, GMR1_IE_RR_REQ_REF, " - MES1", ei_gmr1_missing_mandatory_element);

 	/* GPS Discriminator			[1] 11.5.2.101	- M V 2 */
@ -1295,19 +1774,19 @@ GMR1_MSG_FUNC(gmr1_rr_msg_imm_ass_rej_1)
 		ELEM_MAND_V(GMR1_IE_RR, GMR1_IE_RR_WAIT_IND, " - MES1", ei_gmr1_missing_mandatory_element);
 	}

-	/* Request Reference 2 (MES2) 		[1] 11.5.2.30	- M V 2 */
+	/* Request Reference 2 (MES2) 		[3] 11.5.2.30	- M V 2 */
 	ELEM_MAND_V(GMR1_IE_RR, GMR1_IE_RR_REQ_REF, " - MES2", ei_gmr1_missing_mandatory_element);

 	/* Wait Indication 2 (MES2)		[4] 10.5.2.43	- M V 1 */
 	ELEM_MAND_V(GMR1_IE_RR, GMR1_IE_RR_WAIT_IND, " - MES2", ei_gmr1_missing_mandatory_element);

-	/* Request Reference 3 (MES3)		[1] 11.5.2.30	- M V 2 */
+	/* Request Reference 3 (MES3)		[3] 11.5.2.30	- M V 2 */
 	ELEM_MAND_V(GMR1_IE_RR, GMR1_IE_RR_REQ_REF, " - MES3", ei_gmr1_missing_mandatory_element);

 	/* Wait Indication 3 (MES3)		[4] 10.5.2.43	- M V 1 */
 	ELEM_MAND_V(GMR1_IE_RR, GMR1_IE_RR_WAIT_IND, " - MES3", ei_gmr1_missing_mandatory_element);

-	/* Request Reference 4 (MES4)		[1] 11.5.2.30	- M V 2 */
+	/* Request Reference 4 (MES4)		[3] 11.5.2.30	- M V 2 */
 	ELEM_MAND_V(GMR1_IE_RR, GMR1_IE_RR_REQ_REF, " - MES4", ei_gmr1_missing_mandatory_element);

 	/* Wait Indication 4 (MES4)		[4] 10.5.2.43	- M V 1 */
@ -1337,7 +1816,7 @@ GMR1_MSG_FUNC(gmr1_rr_msg_pos_verif_notify)
 {
 	GMR1_MSG_FUNC_BEGIN

-	/* Request Reference 			[1] 11.5.2.30	- M V 2 */
+	/* Request Reference 			[3] 11.5.2.30	- M V 2 */
 	ELEM_MAND_V(GMR1_IE_RR, GMR1_IE_RR_REQ_REF, NULL, ei_gmr1_missing_mandatory_element);

 	/* GPS Discriminator			[1] 11.5.2.101	- M V 2 */
@ -1612,6 +2091,29 @@ GMR1_MSG_FUNC(gmr1_rr_msg_chan_mode_mod_ack)
 	GMR1_MSG_FUNC_END
 }

+/* [3] 10.1.18.5 - Immediate Assignement Type 4 */
+GMR1_MSG_FUNC(gmr1_rr_msg_imm_ass_4)
+{
+	GMR1_MSG_FUNC_BEGIN
+
+	/* Timing Offset			[1] 11.5.2.40	- M V 2 */
+	ELEM_MAND_V(GMR1_IE_RR, GMR1_IE_RR_TIMING_OFS, NULL, ei_gmr1_missing_mandatory_element);
+
+	/* Frequency Offset			[1] 11.5.2.49	- M V 2 */
+	ELEM_MAND_V(GMR1_IE_RR, GMR1_IE_RR_FREQ_OFS, NULL, ei_gmr1_missing_mandatory_element);
+
+	/* Request Reference 			[3] 11.5.2.30	- M V 2 */
+	ELEM_MAND_V(GMR1_IE_RR, GMR1_IE_RR_REQ_REF, NULL, ei_gmr1_missing_mandatory_element);
+
+	/* S-RNTI                               [7] 7.18.1      - M V 2.5 */
+	ELEM_MAND_V(GMR1_IE_RR, GMR1_IE_RR_SRNTI, NULL, ei_gmr1_missing_mandatory_element);
+
+	/* Packet Imm. Ass. Type 4 Params	[3] 11.5.2.125  - M V 12.5 */
+	ELEM_MAND_V(GMR1_IE_RR, GMR1_IE_RR_PKT_IMM_ASS_4_PRM, NULL, ei_gmr1_missing_mandatory_element);
+
+	GMR1_MSG_FUNC_END
+}
+

 /* See [3] 11.4.1 - Table 11.1 */
 static const value_string gmr1_msg_rr_strings[] = {
@ -1672,6 +2174,14 @@ static const value_string gmr1_msg_rr_strings[] = {
 	{ 0x46, "Information Response Current Beam" },
 	{ 0x4f, "Information Response Error" },

+	/* Other / GMR1-3G */
+	{ 0x80, "Immediate Assignment Type 4" },
+	{ 0x81, "Paging Request Type 4" },
+	{ 0x82, "Position Verification Notify Type 2" },
+	{ 0x83, "Immediate Assignment Type 5" },
+	{ 0x84, "Immediate Assignment Reject Type 4" },
+	{ 0x85, "System Information Type 2bis" },
+
 	/* End */
 	{ 0, NULL }
 };
@ -1739,6 +2249,14 @@ static const gmr1_msg_func_t gmr1_msg_rr_func[NUM_GMR1_MSG_RR] = {
 	NULL,				/* Info. Resp. Current Beam */
 	NULL,				/* Info. Resp. Error */

+	/* Other / GMR1-3G */
+	gmr1_rr_msg_imm_ass_4,		/* Imm. Ass. Type 4 */
+	NULL,				/* Paging Request Type 4 */
+	NULL,				/* Position Verification Notify Type 2 */
+	NULL,				/* Imm. Ass. Type 5 */
+	NULL,				/* Imm. Ass. Reject Type 4 */
+	NULL,				/* Sys. Info. Type 2bis */
+
 	NULL,
 };

@ -1891,6 +2409,204 @@ void
 proto_register_gmr1_rr(void)
 {
 	static hf_register_info hf[] = {
+		/* CSN1 fields */
+		{ &hf_rr_csn1_freq_alloc_ie_bw,
+		  { "Bandwidth", "gmr1.rr.freq_alloc_ie.bw",
+		    FT_UINT8, BASE_CUSTOM, CF_FUNC(rr_bw_fmt), 0x00,
+		    NULL, HFILL }
+		},
+		{ &hf_rr_csn1_freq_alloc_ie_arfcn,
+		  { "ARFCN", "gmr1.rr.freq_alloc_ie.arfcn",
+		    FT_UINT8, BASE_DEC, NULL, 0x00,
+		    NULL, HFILL }
+		},
+		{ &hf_rr_csn1_freq_alloc_ie_reserved,
+		  { "Reserved", "gmr1.rr.freq_alloc_ie.reserved",
+		    FT_UINT8, BASE_DEC, NULL, 0x00,
+		    NULL, HFILL }
+		},
+		{ &hf_rr_csn1_freq_alloc_ie_ul_present,
+		  { "Uplink allocation present", "gmr1.rr.freq_alloc_ie.ul_present",
+		    FT_UINT8, BASE_DEC, NULL, 0x00,
+		    NULL, HFILL }
+		},
+		{ &hf_rr_csn1_slot_alloc_ie_start,
+		  { "Starting MAC Slot", "gmr1.rr.slot_alloc_ie.start",
+		    FT_UINT8, BASE_DEC, NULL, 0x00,
+		    NULL, HFILL }
+		},
+		{ &hf_rr_csn1_slot_alloc_ie_offset,
+		  { "Offset withing MAC Slot", "gmr1.rr.slot_alloc_ie.offset",
+		    FT_UINT8, BASE_DEC, VALS(rr_csn1_slot_alloc_ie_offset_vals), 0x00,
+		    NULL, HFILL }
+		},
+		{ &hf_rr_csn1_pdch_mcs_ie_mcs,
+		  { "MCS PNBx(4,3)/PNBx(5,3)", "gmr1.rr.pdch_mcs_ie.mcs",
+		    FT_UINT8, BASE_DEC, VALS(rr_csn1_pdch_mcs_ie_mcs_vals), 0x00,
+		    "Channel Coding Indicator for PNB(4,3)/PNB(5,3)/PNB2(5,3)/PNB3(5,3)", HFILL }
+		},
+		{ &hf_rr_csn1_pdch_mcs_ie_mcs_1_6,
+		  { "MCS PNB(1,6)", "gmr1.rr.pdch_mcs_ie.mcs_1_6",
+		    FT_UINT8, BASE_DEC, VALS(rr_csn1_pdch_mcs_ie_mcs_1_6_vals), 0x00,
+		    "Channel Coding Indicator for PNB(1,6)/PNB3(1,6)", HFILL }
+		},
+		{ &hf_rr_csn1_pdch_mcs_ie_mcs_2_6,
+		  { "MCS PNBx(2,6)", "gmr1.rr.pdch_mcs_ie.mcs_2_6",
+		    FT_UINT8, BASE_DEC, VALS(rr_csn1_pdch_mcs_ie_mcs_2_6_vals), 0x00,
+		    "Channel Coding Indicator for PNB(2,6)/PNB3(2,6)", HFILL }
+		},
+		{ &hf_rr_csn1_pdch_mcs_ie_mcs_5_12_present,
+		  { "MCS PNBx(5,12) present", "gmr1.rr.pdch_mcs_ie.mcs_5_12_present",
+		    FT_UINT8, BASE_DEC, NULL, 0x00,
+		    NULL, HFILL }
+		},
+		{ &hf_rr_csn1_pdch_mcs_ie_mcs_5_12,
+		  { "MCS PNB2(5,12)/PNB3(5,12)", "gmr1.rr.pdch_mcs_ie.mcs_5_12",
+		    FT_UINT8, BASE_DEC, VALS(rr_csn1_pdch_mcs_ie_mcs_5_12_vals), 0x00,
+		    "Channel Coding Indicator for PNB2(5,12)/PNB3(5,12)", HFILL }
+		},
+		{ &hf_rr_csn1_dch_mcs_ie,
+		  { "MCS", "gmr1.rr.dch_mcs_ie",
+		    FT_UINT8, BASE_DEC, VALS(rr_csn1_dch_mcs_ie_vals), 0x00,
+		    NULL, HFILL }
+		},
+		{ &hf_rr_csn1_chan_info_ie_mode,
+		  { "Channel Mode", "gmr1.rr.chan_info_ie.mode",
+		    FT_UINT8, BASE_DEC, VALS(rr_csn1_chan_info_ie_mode_vals), 0x00,
+		    NULL, HFILL }
+		},
+		{ &hf_rr_csn1_chan_info_ie_type,
+		  { "Channel Type", "gmr1.rr.chan_info_ie.type",
+		    FT_UINT8, BASE_DEC, VALS(rr_csn1_chan_info_ie_type_vals), 0x00,
+		    NULL, HFILL }
+		},
+		{ &hf_rr_csn1_pdch_chan_info_ie_type,
+		  { "Channel Type", "gmr1.rr.pdch_chan_info_ie.type",
+		    FT_UINT8, BASE_DEC, VALS(rr_csn1_pdch_chan_info_ie_type_vals), 0x00,
+		    NULL, HFILL }
+		},
+		{ &hf_rr_csn1_pdch_chan_info_ie_mcs,
+		  { "Channel MCS", "gmr1.rr.pdch_chan_info_ie.mcs",
+		    FT_UINT8, BASE_DEC, VALS(rr_csn1_pdch_chan_info_ie_mcs), 0x00,
+		    NULL, HFILL }
+		},
+		{ &hf_rr_csn1_pkt_imm_ass_4_ul_pdch_tbf_ul_tfi,
+		  { "Uplink TFI", "gmr1.rr.pkt_imm_ass_4.ul_pdch_tbf.ul_tfi",
+		    FT_UINT8, BASE_HEX, NULL, 0x00,
+		    "Uplink Temporary Flow Identifier", HFILL }
+		},
+		{ &hf_rr_csn1_pkt_imm_ass_4_ul_pdch_tbf_usf_present,
+		  { "USF present", "gmr1.rr.pkt_imm_ass_4.ul_pdch_tbf.usf_present",
+		    FT_UINT8, BASE_DEC, VALS(rr_csn1_pkt_imm_ass_4_ul_pdch_tbf_usf_present_vals), 0x00,
+		    NULL, HFILL }
+		},
+		{ &hf_rr_csn1_pkt_imm_ass_4_ul_pdch_tbf_usf,
+		  { "USF", "gmr1.rr.pkt_imm_ass_4.ul_pdch_tbf.usf",
+		    FT_UINT8, BASE_HEX, NULL, 0x00,
+		    "Uplink Status Flag", HFILL }
+		},
+		{ &hf_rr_csn1_pkt_imm_ass_4_rb_id,
+		  { "Radio Bearer ID", "gmr1.rr.pkt_imm_ass_4.rb_id",
+		    FT_UINT8, BASE_DEC, NULL, 0x00,
+		    NULL, HFILL }
+		},
+		{ &hf_rr_csn1_pkt_imm_ass_4_ul_pdch_tbf_ret_freq_set,
+		  { "Return Frequency Set", "gmr1.rr.pkt_imm_ass_4.ul_pdch_tbf.ret_freq_set",
+		    FT_UINT8, BASE_DEC, VALS(rr_csn1_pkt_imm_ass_4_ul_pdch_tbf_ret_freq_set_vals), 0x00,
+		    NULL, HFILL }
+		},
+		{ &hf_rr_csn1_pkt_imm_ass_4_dch_pwr_ctrl_sync_ofs,
+		  { "Power Control Synch Offset", "gmr1.rr.pkt_imm_ass_4.dch.pwr_ctrl_sync_ofs",
+		    FT_UINT8, BASE_DEC, VALS(rr_csn1_pkt_imm_ass_4_dch_pwr_ctrl_sync_ofs_vals), 0x00,
+		    NULL, HFILL }
+		},
+		{ &hf_rr_csn1_pkt_imm_ass_4_dch_dl_slot_alloc_type,
+		  { "Downlink Slot Allocation type", "gmr1.rr.pkt_imm_ass_4.dch.dl_slot_alloc_type",
+		    FT_UINT8, BASE_DEC, VALS(rr_csn1_pkt_imm_ass_4_dch_slot_alloc_type_vals), 0x00,
+		    NULL, HFILL }
+		},
+		{ &hf_rr_csn1_pkt_imm_ass_4_dch_dl_mac_slot_alloc,
+		  { "Downlink MAC Slot Allocation", "gmr1.rr.pkt_imm_ass_4.dch.dl_mac_slot_alloc",
+		    FT_UINT8, BASE_HEX, NULL, 0x00,
+		    "Bitmap of allocated MAC Slots", HFILL }
+		},
+		{ &hf_rr_csn1_pkt_imm_ass_4_dch_ul_slot_alloc_type,
+		  { "Uplink Slot Allocation type", "gmr1.rr.pkt_imm_ass_4.dch.ul_slot_alloc_type",
+		    FT_UINT8, BASE_DEC, VALS(rr_csn1_pkt_imm_ass_4_dch_slot_alloc_type_vals), 0x00,
+		    NULL, HFILL }
+		},
+		{ &hf_rr_csn1_pkt_imm_ass_4_dch_ul_mac_slot_alloc,
+		  { "Uplink MAC Slot Allocation", "gmr1.rr.pkt_imm_ass_4.dch.ul_mac_slot_alloc",
+		    FT_UINT8, BASE_HEX, NULL, 0x00,
+		    "Bitmap of allocated MAC Slots", HFILL }
+		},
+		{ &hf_rr_csn1_pkt_imm_ass_4_tbf_assign_type,
+		  { "TBF Assignement type", "gmr1.rr.pkt_imm_ass_4.tbf.assign_type",
+		    FT_UINT8, BASE_DEC, NULL, 0x00,
+		    NULL, HFILL }
+		},
+		{ &hf_rr_csn1_pkt_imm_ass_4_pc,
+		  { "Power Control Parameters", "gmr1.rr.pkt_imm_ass_4.pkt_imm_ass_4_prm.pc",
+		    FT_UINT8, BASE_CUSTOM, CF_FUNC(rr_csn1_pkt_imm_ass_4_pc_fmt), 0x00,
+		    "PAR = Power Attenuation Request", HFILL }
+		},
+		{ &hf_rr_csn1_pkt_imm_ass_4_pdch_mcs_present,
+		  { "PDCH Channel MCS Info present", "gmr1.rr.pkt_imm_ass_4.pdch_mcs_present",
+		    FT_UINT8, BASE_DEC, NULL, 0x00,
+		    NULL, HFILL }
+		},
+		{ &hf_rr_csn1_pkt_imm_ass_4_dl_mac_slot_alloc_present,
+		  { "Downlink MAC Slot Allocation present", "gmr1.rr.pkt_imm_ass_4.dl_mac_slot_alloc_present",
+		    FT_UINT8, BASE_DEC, NULL, 0x00,
+		    NULL, HFILL }
+		},
+		{ &hf_rr_csn1_pkt_imm_ass_4_dl_mac_slot_alloc,
+		  { "Downlink MAC Slot Allocation", "gmr1.rr.pkt_imm_ass_4.dl_mac_slot_alloc",
+		    FT_UINT8, BASE_HEX, NULL, 0x00,
+		    "Bitmap of allocated MAC Slots", HFILL }
+		},
+		{ &hf_rr_csn1_pkt_imm_ass_4_tbf2_present,
+		  { "TBF2 present", "gmr1.rr.pkt_imm_ass_4.tbf2_present",
+		    FT_UINT8, BASE_DEC, NULL, 0x00,
+		    NULL, HFILL }
+		},
+		{ &hf_rr_csn1_pkt_imm_ass_4_ul_freq_alloc,
+		  { "Uplink Frequency Allocation", "gmr1.rr.pkt_imm_ass_4.ul_freq_alloc",
+		    FT_UINT8, BASE_DEC, VALS(rr_csn1_pkt_imm_ass_4_ul_freq_alloc_vals), 0x00,
+		    NULL, HFILL }
+		},
+		{ &hf_rr_csn1_pkt_imm_ass_4_fwd_offset_present,
+		  { "Forward Offset Infos present", "gmr1.rr.pkt_imm_ass_4.fwd_offset_present",
+		    FT_UINT8, BASE_DEC, NULL, 0x00,
+		    NULL, HFILL }
+		},
+		{ &hf_rr_csn1_pkt_imm_ass_4_fwd_offset,
+		  { "MAC_FORWARD_TS_OFFSET", "gmr1.rr.pkt_imm_ass_4.fwd_offset",
+		    FT_UINT8, BASE_DEC, NULL, 0x00,
+		    "Offset in # of timeslots of MAC-slot 0 or D-MAC-slot 0 relative to start of the downlink frame", HFILL }
+		},
+		{ &hf_rr_csn1_pkt_imm_ass_4_usf_delay,
+		  { "USF_DELAY", "gmr1.rr.pkt_imm_ass_4.usf_delay",
+		    FT_UINT8, BASE_DEC, NULL, 0x00,
+		    "Needs to be combined with BCCH USF_DELAY Adjustement to get final USF Delay Value", HFILL }
+		},
+		{ &hf_rr_csn1_pkt_imm_ass_4_ret_offset_present,
+		  { "Return Offset Infos present", "gmr1.rr.pkt_imm_ass_4.ret_offset_present",
+		    FT_UINT8, BASE_DEC, NULL, 0x00,
+		    NULL, HFILL }
+		},
+		{ &hf_rr_csn1_pkt_imm_ass_4_ret_offset,
+		  { "MAC_RETURN_TS_OFFSET", "gmr1.rr.pkt_imm_ass_4.ret_offset",
+		    FT_UINT8, BASE_DEC, NULL, 0x00,
+		    "Offset in # of timeslots of MAC-slot 0 or D-MAC-slot 0 relative to start of the uplink frame", HFILL }
+		},
+		{ &hf_padding,
+		  { "Padding", "gmr1.rr.padding",
+		    FT_UINT8, BASE_DEC, NULL, 0x00,
+		    NULL, HFILL }
+		},
+
+		/* IEs */
 		{ &hf_rr_msg_type,
 		  { "Radio Resources Management Message Type", "gmr1.rr.msg_type",
 		    FT_UINT8, BASE_HEX, VALS(gmr1_msg_rr_strings), 0x00,
@ -1971,6 +2687,11 @@ proto_register_gmr1_rr(void)
 		    FT_UINT8, BASE_HEX, NULL, 0x1f,
 		    NULL, HFILL }
 		},
+		{ &hf_rr_req_ref_retry,
+		  { "Retry Counter (chan req type 3)", "gmr1.rr.req_ref.retry",
+		    FT_UINT8, BASE_HEX, NULL, 0x03,
+		    NULL, HFILL }
+		},
 		{ &hf_rr_req_ref_fn,
 		  { "Frame Number mod 256", "gmr1.rr.req_ref.fn",
 		    FT_UINT8, BASE_DEC, NULL, 0x00,
@ -2228,7 +2949,7 @@ proto_register_gmr1_rr(void)
 		},
 		{ &hf_rr_pkt_freq_prm_dl_bw,
 		  { "Downlink Bandwidth", "gmr1.rr.pkt_freq_prm.dl_bw",
-		    FT_UINT8, BASE_CUSTOM, CF_FUNC(rr_pkt_freq_prm_xx_bw_fmt), 0x70,
+		    FT_UINT8, BASE_CUSTOM, CF_FUNC(rr_bw_fmt), 0x70,
 		    NULL, HFILL }
 		},
 		{ &hf_rr_pkt_freq_prm_ul_freq_dist,
@ -2238,7 +2959,7 @@ proto_register_gmr1_rr(void)
 		},
 		{ &hf_rr_pkt_freq_prm_ul_bw,
 		  { "Uplink Bandwidth", "gmr1.rr.pkt_freq_prm.ul_bw",
-		    FT_UINT8, BASE_CUSTOM, CF_FUNC(rr_pkt_freq_prm_xx_bw_fmt), 0x70,
+		    FT_UINT8, BASE_CUSTOM, CF_FUNC(rr_bw_fmt), 0x70,
 		    NULL, HFILL }
 		},
 		{ &hf_rr_pkt_freq_prm_spare,
@ -2351,6 +3072,11 @@ proto_register_gmr1_rr(void)
 		    FT_UINT24, BASE_DEC, NULL, 0xffffc0,
 		    NULL, HFILL }
 		},
+		{ &hf_rr_pkt_imm_ass_4_prm,
+		  { "Packet Imm. Ass. Type 4 Params", "gmr1.rr.pkt_imm_ass_4_prm",
+		    FT_BYTES, BASE_NONE, NULL, 0x0,
+		    NULL, HFILL }
+		},
 		{ &hf_rr_timing_adv_idx_value,
 		  { "TAI Value", "gmr1.rr.timing_adv_idx.tai",
 		    FT_UINT8, BASE_DEC, NULL, 0x7f,
@ -2396,6 +3122,11 @@ proto_register_gmr1_rr(void)
 		    FT_UINT8, BASE_DEC, NULL, 0x0f,
 		    NULL, HFILL }
 		},
+		{ &hf_rr_srnti,
+		  { "S-RNTI", "gmr1.rr.srnti",
+		    FT_UINT24, BASE_HEX, NULL, 0xfffff0,
+		    NULL, HFILL }
+		},
 		{ &hf_rr_protocol_discriminator,
 		  { "Protocol Discriminator", "gmr1.rr.protocol_discriminator",
 			FT_UINT8, BASE_DEC, VALS(gmr1_pd_vals), 0x0,