forked from sdr/rtl-sdr
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11 Commits
af33886796
...
619ac3186e
Author | SHA1 | Date |
---|---|---|
Oliver Smith | 619ac3186e | |
Steve Markgraf | 7ebcb041f2 | |
Harald Welte | ab2434e30d | |
Ethan Halsall | d81ef9a9d9 | |
Ethan Halsall | e04c42c019 | |
Steve Markgraf | ef23f806ec | |
Steve Markgraf | dd2511a7c2 | |
Sultan Qasim Khan | 2acb75cff3 | |
Sultan Qasim Khan | 0b64f07fd5 | |
Oliver Jowett | f5978e8871 | |
hayati ayguen | 91ef34d922 |
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@ -0,0 +1 @@
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open_collective: osmocom
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@ -1,3 +1,34 @@
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rtl-sdr (2.0.2) unstable; urgency=medium
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[ Mikael Falkvidd ]
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* Fix small typo in rtl_sdr man page
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[ Clayton Smith ]
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* Use library paths from pkg-config
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* Only use LIBUSB_LINK_LIBRARIES if it exists
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[ hayati ayguen ]
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* improve CLI usage docs: '-d' also accepts serial
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[ Oliver Jowett ]
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* r82xx: improve tuner precision
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[ Sultan Qasim Khan ]
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* r82xx: avoid redundant register writes for speed
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* r82xx: batch register writes for tuning
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[ Ethan Halsall ]
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* fix: set fc0012 gain to low on init
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* fix: round gain input to nearest value
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[ Harald Welte ]
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* Add funding link to github mirror
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[ Steve Markgraf ]
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* lib: set SOVERSION back to 0
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-- Oliver Smith <osmith@sysmocom.de> Tue, 23 Apr 2024 11:40:18 +0200
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rtl-sdr (2.0.1) unstable; urgency=medium
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* debian/changelog: update for 2.0.0 and 2.0.1
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@ -29,7 +29,7 @@ target_include_directories(rtlsdr PUBLIC
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)
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set_target_properties(rtlsdr PROPERTIES DEFINE_SYMBOL "rtlsdr_EXPORTS")
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set_target_properties(rtlsdr PROPERTIES OUTPUT_NAME rtlsdr)
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set_target_properties(rtlsdr PROPERTIES SOVERSION ${MAJOR_VERSION})
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set_target_properties(rtlsdr PROPERTIES SOVERSION 0)
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set_target_properties(rtlsdr PROPERTIES VERSION ${LIBVER})
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generate_export_header(rtlsdr)
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@ -89,7 +89,7 @@ void usage(void)
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fprintf(stderr,
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"rtl_adsb, a simple ADS-B decoder\n\n"
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"Use:\trtl_adsb [-R] [-g gain] [-p ppm] [output file]\n"
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"\t[-d device_index (default: 0)]\n"
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"\t[-d device_index or serial (default: 0)]\n"
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"\t[-V verbove output (default: off)]\n"
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"\t[-S show short frames (default: off)]\n"
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"\t[-Q quality (0: no sanity checks, 0.5: half bit, 1: one bit (default), 2: two bits)]\n"
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@ -192,7 +192,7 @@ void usage(void)
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"\t wbfm == -M fm -s 170k -o 4 -A fast -r 32k -l 0 -E deemp\n"
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"\t raw mode outputs 2x16 bit IQ pairs\n"
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"\t[-s sample_rate (default: 24k)]\n"
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"\t[-d device_index (default: 0)]\n"
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"\t[-d device_index or serial (default: 0)]\n"
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"\t[-T enable bias-T on GPIO PIN 0 (works for rtl-sdr.com v3 dongles)]\n"
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"\t[-g tuner_gain (default: automatic)]\n"
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"\t[-l squelch_level (default: 0/off)]\n"
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@ -130,7 +130,7 @@ void usage(void)
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"\t[-e exit_timer (default: off/0)]\n"
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//"\t[-s avg/iir smoothing (default: avg)]\n"
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//"\t[-t threads (default: 1)]\n"
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"\t[-d device_index (default: 0)]\n"
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"\t[-d device_index or serial (default: 0)]\n"
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"\t[-g tuner_gain (default: automatic)]\n"
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"\t[-p ppm_error (default: 0)]\n"
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"\t[-T enable bias-T on GPIO PIN 0 (works for rtl-sdr.com v3 dongles)]\n"
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@ -49,7 +49,7 @@ void usage(void)
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"rtl_sdr, an I/Q recorder for RTL2832 based DVB-T receivers\n\n"
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"Usage:\t -f frequency_to_tune_to [Hz]\n"
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"\t[-s samplerate (default: 2048000 Hz)]\n"
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"\t[-d device_index (default: 0)]\n"
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"\t[-d device_index or serial (default: 0)]\n"
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"\t[-g gain (default: 0 for auto)]\n"
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"\t[-p ppm_error (default: 0)]\n"
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"\t[-b output_block_size (default: 16 * 16384)]\n"
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@ -102,7 +102,7 @@ void usage(void)
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printf("\t[-s samplerate in Hz (default: %d Hz)]\n", DEFAULT_SAMPLE_RATE_HZ);
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printf("\t[-b number of buffers (default: 15, set by library)]\n");
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printf("\t[-n max number of linked list buffers to keep (default: %d)]\n", DEFAULT_MAX_NUM_BUFFERS);
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printf("\t[-d device index (default: 0)]\n");
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printf("\t[-d device index or serial (default: 0)]\n");
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printf("\t[-P ppm_error (default: 0)]\n");
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printf("\t[-T enable bias-T on GPIO PIN 0 (works for rtl-sdr.com v3 dongles)]\n");
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printf("\t[-D enable direct sampling (default: off)]\n");
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@ -90,7 +90,7 @@ void usage(void)
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"rtl_test, a benchmark tool for RTL2832 based DVB-T receivers\n\n"
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"Usage:\n"
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"\t[-s samplerate (default: 2048000 Hz)]\n"
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"\t[-d device_index (default: 0)]\n"
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"\t[-d device_index or serial (default: 0)]\n"
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"\t[-t enable Elonics E4000 tuner benchmark]\n"
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#ifndef _WIN32
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"\t[-p[seconds] enable PPM error measurement (default: 10 seconds)]\n"
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@ -114,7 +114,7 @@ int fc0012_init(void *dev)
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0x00, /* reg. 0x10: may also be 0x0d */
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0x00, /* reg. 0x11 */
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0x1f, /* reg. 0x12: Set to maximum gain */
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0x08, /* reg. 0x13: Set to Middle Gain: 0x08,
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0x00, /* reg. 0x13: Set to Low Gain: 0x00,
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Low Gain: 0x00, High Gain: 0x10, enable IX2: 0x80 */
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0x00, /* reg. 0x14 */
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0x04, /* reg. 0x15: Enable LNA COMPS */
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@ -321,23 +321,11 @@ int fc0012_set_gain(void *dev, int gain)
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/* mask bits off */
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tmp &= 0xe0;
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switch (gain) {
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case -99: /* -9.9 dB */
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tmp |= 0x02;
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break;
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case -40: /* -4 dB */
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break;
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case 71:
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tmp |= 0x08; /* 7.1 dB */
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break;
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case 179:
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tmp |= 0x17; /* 17.9 dB */
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break;
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case 192:
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default:
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tmp |= 0x10; /* 19.2 dB */
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break;
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}
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if (gain < -40) tmp |= 0x02; /* -9.9 dB */
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else if (gain < 71) tmp |= 0x00; /* -4.0 dB */
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else if (gain < 179) tmp |= 0x08; /* 7.1 dB */
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else if (gain < 192) tmp |= 0x17; /* 17.9 dB */
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else tmp |= 0x10; /* 19.2 dB */
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ret = fc0012_writereg(dev, 0x13, tmp);
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@ -25,6 +25,7 @@
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#include <stdio.h>
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#include <stdint.h>
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#include <string.h>
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#include <stdbool.h>
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#include "rtlsdr_i2c.h"
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#include "tuner_r82xx.h"
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@ -243,6 +244,7 @@ static void shadow_store(struct r82xx_priv *priv, uint8_t reg, const uint8_t *va
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if (r < 0) {
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len += r;
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val -= r;
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r = 0;
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}
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if (len <= 0)
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@ -253,11 +255,29 @@ static void shadow_store(struct r82xx_priv *priv, uint8_t reg, const uint8_t *va
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memcpy(&priv->regs[r], val, len);
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}
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static bool shadow_equal(struct r82xx_priv *priv, uint8_t reg, const uint8_t *val,
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int len)
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{
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int r = reg - REG_SHADOW_START;
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if (r < 0 || len < 0 || len > NUM_REGS - r)
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return false;
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if (memcmp(&priv->regs[r], val, len) == 0)
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return true;
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return false;
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}
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static int r82xx_write(struct r82xx_priv *priv, uint8_t reg, const uint8_t *val,
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unsigned int len)
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{
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int rc, size, pos = 0;
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/* Avoid setting registers unnecessarily since it's slow */
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if (shadow_equal(priv, reg, val, len))
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return 0;
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/* Store the shadow registers */
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shadow_store(priv, reg, val, len);
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@ -424,17 +444,21 @@ static int r82xx_set_mux(struct r82xx_priv *priv, uint32_t freq)
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return rc;
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}
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static inline uint8_t mask_reg8(uint8_t reg, uint8_t val, uint8_t mask)
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{
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return (reg & ~mask) | (val & mask);
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}
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static int r82xx_set_pll(struct r82xx_priv *priv, uint32_t freq)
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{
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int rc, i;
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unsigned sleep_time = 10000;
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uint64_t vco_freq;
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uint32_t vco_fra; /* VCO contribution by SDM (kHz) */
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uint32_t vco_min = 1770000;
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uint32_t vco_max = vco_min * 2;
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uint32_t freq_khz, pll_ref, pll_ref_khz;
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uint16_t n_sdm = 2;
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uint16_t sdm = 0;
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uint64_t vco_div;
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uint32_t vco_min = 1770000; /* kHz */
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uint32_t vco_max = vco_min * 2; /* kHz */
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uint32_t freq_khz, pll_ref;
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uint32_t sdm = 0;
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uint8_t mix_div = 2;
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uint8_t div_buf = 0;
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uint8_t div_num = 0;
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@ -442,25 +466,24 @@ static int r82xx_set_pll(struct r82xx_priv *priv, uint32_t freq)
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uint8_t refdiv2 = 0;
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uint8_t ni, si, nint, vco_fine_tune, val;
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uint8_t data[5];
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uint8_t regs[7];
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/* Frequency in kHz */
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freq_khz = (freq + 500) / 1000;
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pll_ref = priv->cfg->xtal;
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pll_ref_khz = (priv->cfg->xtal + 500) / 1000;
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rc = r82xx_write_reg_mask(priv, 0x10, refdiv2, 0x10);
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if (rc < 0)
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return rc;
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/* set pll autotune = 128kHz */
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rc = r82xx_write_reg_mask(priv, 0x1a, 0x00, 0x0c);
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if (rc < 0)
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return rc;
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/* regs 0x10 to 0x16 */
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memcpy(regs, &priv->regs[0x10 - REG_SHADOW_START], 7);
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regs[0] = mask_reg8(regs[0], refdiv2, 0x10);
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/* set VCO current = 100 */
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rc = r82xx_write_reg_mask(priv, 0x12, 0x80, 0xe0);
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if (rc < 0)
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return rc;
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regs[2] = mask_reg8(regs[2], 0x80, 0xe0);
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/* Calculate divider */
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while (mix_div <= 64) {
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@ -490,13 +513,27 @@ static int r82xx_set_pll(struct r82xx_priv *priv, uint32_t freq)
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else if (vco_fine_tune < vco_power_ref)
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div_num = div_num + 1;
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rc = r82xx_write_reg_mask(priv, 0x10, div_num << 5, 0xe0);
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if (rc < 0)
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return rc;
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regs[0] = mask_reg8(regs[0], div_num << 5, 0xe0);
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vco_freq = (uint64_t)freq * (uint64_t)mix_div;
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nint = vco_freq / (2 * pll_ref);
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vco_fra = (vco_freq - 2 * pll_ref * nint) / 1000;
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/* We want to approximate:
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* vco_freq / (2 * pll_ref)
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*
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* in the form:
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* nint + sdm/65536
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*
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* where nint,sdm are integers and 0 < nint, 0 <= sdm < 65536
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*
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* Scaling to fixed point and rounding:
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*
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* vco_div = 65536*(nint + sdm/65536) = int( 0.5 + 65536 * vco_freq / (2 * pll_ref) )
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* vco_div = 65536*nint + sdm = int( (pll_ref + 65536 * vco_freq) / (2 * pll_ref) )
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*/
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vco_div = (pll_ref + 65536 * vco_freq) / (2 * pll_ref);
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nint = (uint32_t) (vco_div / 65536);
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sdm = (uint32_t) (vco_div % 65536);
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if (nint > ((128 / vco_power_ref) - 1)) {
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fprintf(stderr, "[R82XX] No valid PLL values for %u Hz!\n", freq);
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@ -506,35 +543,20 @@ static int r82xx_set_pll(struct r82xx_priv *priv, uint32_t freq)
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ni = (nint - 13) / 4;
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si = nint - 4 * ni - 13;
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rc = r82xx_write_reg(priv, 0x14, ni + (si << 6));
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if (rc < 0)
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return rc;
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regs[4] = ni + (si << 6);
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/* pw_sdm */
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if (!vco_fra)
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if (sdm == 0)
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val = 0x08;
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else
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val = 0x00;
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rc = r82xx_write_reg_mask(priv, 0x12, val, 0x08);
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if (rc < 0)
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return rc;
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regs[2] = mask_reg8(regs[2], val, 0x08);
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/* sdm calculator */
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while (vco_fra > 1) {
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if (vco_fra > (2 * pll_ref_khz / n_sdm)) {
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sdm = sdm + 32768 / (n_sdm / 2);
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vco_fra = vco_fra - 2 * pll_ref_khz / n_sdm;
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if (n_sdm >= 0x8000)
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break;
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}
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n_sdm <<= 1;
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}
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regs[5] = sdm & 0xff;
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regs[6] = sdm >> 8;
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rc = r82xx_write_reg(priv, 0x16, sdm >> 8);
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if (rc < 0)
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return rc;
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rc = r82xx_write_reg(priv, 0x15, sdm & 0xff);
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rc = r82xx_write(priv, 0x10, regs, 7);
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if (rc < 0)
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return rc;
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@ -1317,6 +1339,7 @@ int r82xx_init(struct r82xx_priv *priv)
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priv->xtal_cap_sel = XTAL_HIGH_CAP_0P;
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/* Initialize registers */
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memset(priv->regs, 0, NUM_REGS);
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rc = r82xx_write(priv, 0x05,
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r82xx_init_array, sizeof(r82xx_init_array));
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