fix disctap if rate
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94dc7536e6
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a5df0ec044
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@ -135,6 +135,7 @@ class channel(object):
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self.demod = p25_demodulator.p25_demod_fb(
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self.demod = p25_demodulator.p25_demod_fb(
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input_rate = dev.sample_rate,
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input_rate = dev.sample_rate,
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filter_type = config['filter_type'],
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filter_type = config['filter_type'],
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if_rate = config['if_rate'],
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symbol_rate = self.symbol_rate)
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symbol_rate = self.symbol_rate)
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else:
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else:
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self.demod = p25_demodulator.p25_demod_cb(
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self.demod = p25_demodulator.p25_demod_cb(
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@ -166,6 +166,7 @@ class p25_demod_fb(p25_demod_base):
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input_rate = None,
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input_rate = None,
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filter_type = None,
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filter_type = None,
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excess_bw = _def_excess_bw,
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excess_bw = _def_excess_bw,
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if_rate = _def_if_rate,
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symbol_rate = _def_symbol_rate):
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symbol_rate = _def_symbol_rate):
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"""
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"""
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Hierarchical block for P25 demodulation.
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Hierarchical block for P25 demodulation.
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@ -179,12 +180,21 @@ class p25_demod_fb(p25_demod_base):
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gr.io_signature(1, 1, gr.sizeof_float), # Input signature
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gr.io_signature(1, 1, gr.sizeof_float), # Input signature
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gr.io_signature(1, 1, gr.sizeof_char)) # Output signature
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gr.io_signature(1, 1, gr.sizeof_char)) # Output signature
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p25_demod_base.__init__(self, if_rate=input_rate, symbol_rate=symbol_rate, filter_type=filter_type)
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p25_demod_base.__init__(self, if_rate=if_rate, symbol_rate=symbol_rate, filter_type=filter_type)
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self.input_rate = input_rate
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self.input_rate = input_rate
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self.if_rate = if_rate
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self.float_sink = None
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self.float_sink = None
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if input_rate != if_rate:
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self.connect(self, self.baseband_amp, self.symbol_filter, self.fsk4_demod, self.slicer, self)
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assert if_rate < input_rate
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assert input_rate % if_rate == 0 ### input rate must be multiple of if rate
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decim = input_rate // if_rate
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maxf = min(if_rate // 2, 6000) ### lpf cutoff at most 6 KHz
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lpf_coeffs = filter.firdes.low_pass(1.0, input_rate, maxf, maxf//8, filter.firdes.WIN_HAMMING)
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self.bb_decim = filter.fir_filter_fff(decim, lpf_coeffs)
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self.connect(self, self.bb_decim, self.baseband_amp, self.symbol_filter, self.fsk4_demod, self.slicer, self)
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else:
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self.connect(self, self.baseband_amp, self.symbol_filter, self.fsk4_demod, self.slicer, self)
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def disconnect_float(self):
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def disconnect_float(self):
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# assumes lock held or init
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# assumes lock held or init
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@ -215,6 +215,7 @@ class p25_rx_block (gr.top_block):
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global WIRESHARK_PORT
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global WIRESHARK_PORT
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sps = 5 # samples / symbol
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sps = 5 # samples / symbol
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if_rate = sps * 4800
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self.rx_q = gr.msg_queue(100)
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self.rx_q = gr.msg_queue(100)
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udp_port = 0
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udp_port = 0
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@ -234,7 +235,7 @@ class p25_rx_block (gr.top_block):
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self.xor_cache = {}
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self.xor_cache = {}
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if self.baseband_input:
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if self.baseband_input:
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self.demod = p25_demodulator.p25_demod_fb(input_rate=capture_rate, excess_bw=self.options.excess_bw)
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self.demod = p25_demodulator.p25_demod_fb(input_rate=capture_rate, excess_bw=self.options.excess_bw,if_rate=if_rate)
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else: # complex input
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else: # complex input
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# local osc
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# local osc
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self.lo_freq = self.options.offset
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self.lo_freq = self.options.offset
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@ -244,7 +245,7 @@ class p25_rx_block (gr.top_block):
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demod_type = self.options.demod_type,
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demod_type = self.options.demod_type,
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relative_freq = self.lo_freq,
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relative_freq = self.lo_freq,
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offset = self.options.offset,
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offset = self.options.offset,
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if_rate = sps * 4800,
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if_rate = if_rate,
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gain_mu = self.options.gain_mu,
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gain_mu = self.options.gain_mu,
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costas_alpha = self.options.costas_alpha,
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costas_alpha = self.options.costas_alpha,
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excess_bw = self.options.excess_bw,
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excess_bw = self.options.excess_bw,
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@ -260,7 +261,7 @@ class p25_rx_block (gr.top_block):
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self.connect(source, self.demod, self.decoder)
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self.connect(source, self.demod, self.decoder)
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if self.baseband_input:
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if self.baseband_input:
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sps = int(capture_rate / 4800)
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sps = if_rate // 4800
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plot_modes = []
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plot_modes = []
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if self.options.plot_mode is not None:
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if self.options.plot_mode is not None:
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plot_modes = self.options.plot_mode.split(',')
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plot_modes = self.options.plot_mode.split(',')
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