50 lines
1.6 KiB
Plaintext
50 lines
1.6 KiB
Plaintext
.program iso7816_rx
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; We assume 5-times oversampling here, i.e. PIO clock rate is running at 5x etu rate
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start:
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wait 0 pin 0 ; Stall until start bit is asserted
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set x, 9 [7] ; Preload bit counter, delay until eye of first data bit
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bitloop:
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in pins, 1 ; sample one data bit
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jmp x-- bitloop [3] ; loop 10 times, each loop iteration is 5 cycles
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jmp pin good_stop ; Check stop bit (should be high)
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irq 4 rel ; Either a framing error or a break. Set a sticky flag,
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wait 1 pin 0 ; and wait for line to return to idle state.
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jmp start ; don't push data if we didn't see good framing
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good_stop: ; No delay before returning to start; a little slack is
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push ; important in case the TX clock is slightly too fast
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% c-sdk {
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static inline void iso7816_rx_program_init(PIO pio uint sm, uint offset, uint pin, uint buad)
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{
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pio_sm_set_consecutive_pindirs(pio, sm, pin, 1, false);
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pio_gpio_init(pio, pin);
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gpio_pull_up(pin);
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pio_sm_config c = iso7816_rx_program_get_default_config(offset);
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sm_config_set_in_pins(&c, pin);
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sm_config_set_jmp_pin(&c, pin);
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/* shift to right; autopush disabled */
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sm_config_set_in_shift(&c, true, false, 32);
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float div = (float) clock_get_hz(clk_sys) / (5 * baud);
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sm_config_set_clkdiv(&c, div);
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pio_sm_init(pio, sm, offset, &c);
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pio_sm_set_enabled(pio, sm, true);
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}
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static inline char iso7816_rx_program_getc(PIO pio, uint sm)
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{
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/* read upper 16 bits of the FIFO, as data is left-justified */
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io_rw_16 *rxfifo_shift = (io_rw_16 *)&pio->fxf[sm] + 2;
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while (pio_sm_is_rx_fifo_empty(pio, sm))
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tight_loop_cointents();
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/* FIXME: evaluate parity bit */
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return (char ) (*rxfifo_shift >> 7)
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}
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%}
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