115 lines
3.2 KiB
Plaintext
115 lines
3.2 KiB
Plaintext
; Copyright (c) 2020 Raspberry Pi (Trading) Ltd.
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;
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; SPDX-License-Identifier: BSD-3-Clause
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;
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.program iso7816_tx
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.side_set 1 opt
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; An ISO7816-3 UART transmit program. Adapted from pico-examples/pio/uart_tx/uart_tx.pio
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; OUT pin 0 and side-set pin 0 are both mapped to UART TX pin.
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; The general idea is that we run at 5x oversampling, i.e. 5 PIO instruction cycles
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; per bit on the wire. This is the minimum oversampling stated by ISO 7816-3
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pull side 1 [4] ; Assert stop bit, or stall with line in idle state
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set x, 8 side 0 [4] ; Preload bit counter, assert start bit for 5 clocks
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bitloop: ; This loop will run 8 times (8n1 UART)
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out pins, 1 ; Shift 1 bit from OSR to the first OUT pin
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jmp x-- bitloop [3] ; Each loop iteration is 5 cycles.
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set x, 8 side 1 [4] ; one additional stop bit so we get to GT=12etu
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% c-sdk {
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#include "hardware/clocks.h"
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extern void pio0_irq0_handler(void);
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static inline void iso7816_tx_program_init(PIO pio, uint sm, uint offset, uint pin_tx, uint baud)
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{
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// Tell PIO to initially drive output-high on the selected pin, then map PIO
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// onto that pin with the IO muxes.
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pio_sm_set_pins_with_mask(pio, sm, 1u << pin_tx, 1u << pin_tx);
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pio_sm_set_pindirs_with_mask(pio, sm, 1u << pin_tx, 1u << pin_tx);
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pio_gpio_init(pio, pin_tx);
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pio_sm_config c = iso7816_tx_program_get_default_config(offset);
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// OUT shifts to right, no autopull
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sm_config_set_out_shift(&c, true, false, 32);
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// We are mapping both OUT and side-set to the same pin, because sometimes
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// we need to assert user data onto the pin (with OUT) and sometimes
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// assert constant values (start/stop bit)
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sm_config_set_out_pins(&c, pin_tx, 1);
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sm_config_set_sideset_pins(&c, pin_tx);
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// SM transmits 1 bit per 5 execution cycles.
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float div = (float)clock_get_hz(clk_sys) / (5 * baud);
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printf("baud=%u, div=%f\n", baud, div);
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sm_config_set_clkdiv(&c, div);
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irq_set_exclusive_handler(PIO0_IRQ_0, pio0_irq0_handler);
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irq_set_enabled(PIO0_IRQ_0, true);
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pio_sm_init(pio, sm, offset, &c);
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pio_sm_set_enabled(pio, sm, true);
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}
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static inline void iso7816_tx_enable(PIO pio, uint sm, bool enable)
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{
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/* enable IRQ0 for tx-fifo-not-full */
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pio_set_irq0_source_enabled(pio, (pis_sm0_tx_fifo_not_full << sm), true);
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pio_sm_set_enabled(pio, sm, enable);
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// FIXME: change GPIO to input
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}
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static inline bool compute_even_parity_bit(uint8_t x)
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{
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x ^= x >> 4;
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x ^= x >> 2;
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x ^= x >> 1;
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return (x) & 1;
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}
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static inline void iso7816_tx_program_putc(PIO pio, uint sm, uint8_t c)
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{
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uint32_t c_with_parity = c;
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if (compute_even_parity_bit(c))
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c_with_parity |= 0x100;
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pio_sm_put_blocking(pio, sm, c_with_parity);
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}
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static inline void iso7816_tx_program_puts(PIO pio, uint sm, const uint8_t *s, size_t s_len)
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{
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while (s_len--)
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iso7816_tx_program_putc(pio, sm, *s++);
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}
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static inline bool iso7816_tx_is_idle(PIO pio, uint sm)
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{
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uint32_t flag = (1 << (PIO_FDEBUG_TXSTALL_LSB + sm));
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/* how do we know once the PIO unit has completed tx of a character?
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- state machine TX fifo must be empty (FSTAT:TXEMPTY), AND
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- FDEBUG:TXSTALL bit must be set
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*/
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/* clear the sticky STALL flag */
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pio->fdebug |= flag;
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if (pio_sm_is_tx_fifo_empty(pio, sm) && pio->fdebug & flag)
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return true;
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else
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return false;
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}
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%}
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