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transceiver: Fix misusage of ~ in bitfields 

Somehow it seems the author tought using ~ would set that bit to 0. But
it invert all bits and as such set all others to '1'.

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
This commit is contained in:
Sylvain Munaut 2010-07-14 22:16:09 +02:00
parent d82d8b9496
commit a8834fde88
2 changed files with 8 additions and 10 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

9
public-trunk/Transceiver/USRPDevice.cpp
View File

@ -232,8 +232,7 @@ bool USRPDevice::start()
// power up and configure daughterboards
m_uTx->_write_oe(0,0,0xffff);
m_uTx->_write_oe(0,(POWER_UP|RX_TXN|ENABLE), 0xffff);
m_uTx->write_io(0,(~POWER_UP|RX_TXN),(POWER_UP|RX_TXN|ENABLE));
m_uTx->write_io(0,ENABLE,(RX_TXN | ENABLE));
m_uTx->write_io(0,ENABLE,(POWER_UP|RX_TXN|ENABLE)); /* POWER_UP inverted */
m_uTx->_write_fpga_reg(FR_ATR_MASK_0 ,0);//RX_TXN|ENABLE);
m_uTx->_write_fpga_reg(FR_ATR_TXVAL_0,0);//,0 |ENABLE);
m_uTx->_write_fpga_reg(FR_ATR_RXVAL_0,0);//,RX_TXN|0);
@ -250,7 +249,7 @@ bool USRPDevice::start()
m_uRx->_write_fpga_reg(FR_ATR_RXVAL_0 + 3*3,0);
m_uRx->_write_fpga_reg(43,0);
m_uRx->_write_oe(1,(POWER_UP|RX_TXN|ENABLE), 0xffff);
m_uRx->write_io(1,(~POWER_UP|RX_TXN|ENABLE),(POWER_UP|RX_TXN|ENABLE));
m_uRx->write_io(1,(RX_TXN|ENABLE),(POWER_UP|RX_TXN|ENABLE)); /* POWER_UP inverted */
//m_uRx->write_io(1,0,RX2_RX1N); // using Tx/Rx/
m_uRx->write_io(1,RX2_RX1N,RX2_RX1N); // using Rx2
m_uRx->set_adc_buffer_bypass(2,true);
@ -291,8 +290,8 @@ bool USRPDevice::stop()
if (!m_uTx) return false;
// power down
m_uTx->write_io(0,(~POWER_UP|RX_TXN),(POWER_UP|RX_TXN|ENABLE));
m_uRx->write_io(1,~POWER_UP,(POWER_UP|ENABLE));
m_uTx->write_io(0,(POWER_UP|RX_TXN),(POWER_UP|RX_TXN|ENABLE));
m_uRx->write_io(1,POWER_UP,(POWER_UP|ENABLE));
delete[] currData;

9
public-trunk/Transceiver52M/USRPDevice.cpp
View File

@ -249,8 +249,7 @@ bool USRPDevice::start()
// power up and configure daughterboards
m_uTx->_write_oe(0,0,0xffff);
m_uTx->_write_oe(0,(POWER_UP|RX_TXN|ENABLE), 0xffff);
m_uTx->write_io(0,(~POWER_UP|RX_TXN),(POWER_UP|RX_TXN|ENABLE));
m_uTx->write_io(0,ENABLE,(RX_TXN | ENABLE));
m_uTx->write_io(0,ENABLE,(POWER_UP|RX_TXN|ENABLE)); /* POWER_UP inverted */
m_uTx->_write_fpga_reg(FR_ATR_MASK_0 ,0);//RX_TXN|ENABLE);
m_uTx->_write_fpga_reg(FR_ATR_TXVAL_0,0);//,0 |ENABLE);
m_uTx->_write_fpga_reg(FR_ATR_RXVAL_0,0);//,RX_TXN|0);
@ -269,7 +268,7 @@ bool USRPDevice::start()
m_uRx->_write_fpga_reg(FR_ATR_RXVAL_0 + 3*3,0);
m_uRx->_write_fpga_reg(43,0);
m_uRx->_write_oe(1,(POWER_UP|RX_TXN|ENABLE), 0xffff);
m_uRx->write_io(1,(~POWER_UP|RX_TXN|ENABLE),(POWER_UP|RX_TXN|ENABLE));
m_uRx->write_io(1,(RX_TXN|ENABLE),(POWER_UP|RX_TXN|ENABLE)); /* POWER_UP inverted */
//m_uRx->write_io(1,0,RX2_RX1N); // using Tx/Rx/
m_uRx->write_io(1,RX2_RX1N,RX2_RX1N); // using Rx2
m_uRx->set_adc_buffer_bypass(2,true);
@ -312,8 +311,8 @@ bool USRPDevice::stop()
if (!m_uTx) return false;
// power down
m_uTx->write_io(0,(~POWER_UP|RX_TXN),(POWER_UP|RX_TXN|ENABLE));
m_uRx->write_io(1,~POWER_UP,(POWER_UP|ENABLE));
m_uTx->write_io(0,(POWER_UP|RX_TXN),(POWER_UP|RX_TXN|ENABLE));
m_uRx->write_io(1,POWER_UP,(POWER_UP|ENABLE));
delete[] currData;