79 lines
1.7 KiB
Plaintext
79 lines
1.7 KiB
Plaintext
# SDRAM initialization script for the AT91SAM9263
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#------------------------------------------------
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# Configure master clock
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echo Configuring the master clock...\n
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# Enable main oscillator
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set *0xFFFFFC20 = 0x00004001
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while ((*0xFFFFFC68 & 0x1) == 0)
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end
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# Set PLLA to 200MHz
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set *0xFFFFFC28 = 0x206DBF09
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while ((*0xFFFFFC68 & 0x2) == 0)
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end
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# Set PLLB for USB usage
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set *0xFFFFFC2C = 0x20AF3F0F
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while ((*0xFFFFFC68 & 0x4) == 0)
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end
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# Select prescaler
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set *0xFFFFFC30 = 0x00000100
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while ((*0xFFFFFC68 & 0x8) == 0)
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end
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# Select master clock
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set *0xFFFFFC30 = 0x00000102
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while ((*0xFFFFFC68 & 0x8) == 0)
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end
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echo Master clock ok.\n
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echo Configuring the SDRAM controller...\n
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# Configure PIOD as peripheral (D16/D31)
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# __writeMemory32(0xFFFF0000,0xFFFFF870,"Memory");
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set *0xFFFFF870 = 0xFFFF0000
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# __writeMemory32(0x00000000,0xFFFFF874,"Memory");
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set *0xFFFFF874 = 0x00000000
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# __writeMemory32(0xFFFF0000,0xFFFFF804,"Memory");
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set *0xFFFFF804 = 0xFFFF0000
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# Enable EBI chip select for the SDRAM
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set *0xFFFFED20 = 0x2
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# SDRAM configuration
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set *0xFFFFE208 = 0x85227259
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set *0xFFFFE200 = 0x1
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set *0x20000000 = 0
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set *0xFFFFE200 = 0x2
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set *0x20000000 = 0
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set *0xFFFFE200 = 0x4
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set *0x20000000 = 0
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set *0xFFFFE200 = 0x4
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set *0x20000000 = 0
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set *0xFFFFE200 = 0x4
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set *0x20000000 = 0
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set *0xFFFFE200 = 0x4
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set *0x20000000 = 0
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set *0xFFFFE200 = 0x4
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set *0x20000000 = 0
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set *0xFFFFE200 = 0x4
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set *0x20000000 = 0
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set *0xFFFFE200 = 0x4
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set *0x20000000 = 0
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set *0xFFFFE200 = 0x4
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set *0x20000000 = 0
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set *0xFFFFE200 = 0x3
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set *0x20000000 = 0
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set *0xFFFFE200 = 0x0
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set *0x20000000 = 0
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set *0xFFFFE204 = 0x2B7
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echo SDRAM configuration ok.\n
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