297 lines
11 KiB
C
297 lines
11 KiB
C
/* ----------------------------------------------------------------------------
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* ATMEL Microcontroller Software Support
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* ----------------------------------------------------------------------------
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* Copyright (c) 2008, Atmel Corporation
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*
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* - Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the disclaimer below.
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*
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* - Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the disclaimer below in the documentation and/or
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* other materials provided with the distribution.
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*
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* Atmel's name may not be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
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* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
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* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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* ----------------------------------------------------------------------------
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*/
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/*
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Title: Memories implementation
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*/
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//------------------------------------------------------------------------------
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// Headers
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//------------------------------------------------------------------------------
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#include <board.h>
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#include <pio/pio.h>
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#include "board_memories.h"
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/*
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Macros:
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READ - Reads a register value. Useful to add trace information to read
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accesses.
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WRITE - Writes data in a register. Useful to add trace information to
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write accesses.
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*/
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#define READ(peripheral, register) (peripheral->register)
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#define WRITE(peripheral, register, value) (peripheral->register = value)
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//------------------------------------------------------------------------------
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// Internal definitions
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//------------------------------------------------------------------------------
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/*
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Constants: Remap types
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BOARD_ROM - ROM or EBI CS0 is mirrored in the remap zone.
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BOARD_RAM - RAM is mirrored in the remap zone.
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*/
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#define BOARD_ROM 0
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#define BOARD_RAM 1
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//------------------------------------------------------------------------------
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// Internal functions
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//------------------------------------------------------------------------------
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//------------------------------------------------------------------------------
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/// Returns the current remap (see <Remap types>).
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//------------------------------------------------------------------------------
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static unsigned char BOARD_GetRemap()
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{
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volatile unsigned int *remap = (volatile unsigned int *) 0;
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volatile unsigned int *ram = (volatile unsigned int *) AT91C_IRAM;
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// Try to write in 0 and see if this affects the RAM
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unsigned int temp = *ram;
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*ram = temp + 1;
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if (*remap == *ram) {
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*ram = temp;
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return BOARD_RAM;
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}
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else {
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*ram = temp;
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return BOARD_ROM;
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}
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}
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//------------------------------------------------------------------------------
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/// Use in SDRAM and DDRAM configuration
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//------------------------------------------------------------------------------
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void sleep_time(unsigned int timeval)
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{
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unsigned int i;
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for( i=0; i<timeval; i++);
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}
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//------------------------------------------------------------------------------
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// Exported functions
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//------------------------------------------------------------------------------
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//------------------------------------------------------------------------------
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/// Initialize Vdd EBI external memory
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//------------------------------------------------------------------------------
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int BOARD_ConfigureVddMemSel(unsigned char VddMemSel)
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{
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return 0;
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}
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//------------------------------------------------------------------------------
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/// Changes the mapping of the chip so that the remap area mirrors the
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/// internal ROM or the EBI CS0.
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//------------------------------------------------------------------------------
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void BOARD_RemapRom()
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{
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if (BOARD_GetRemap() != BOARD_ROM)
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{
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WRITE(AT91C_BASE_MATRIX, MATRIX_MRCR, 0);
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}
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}
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//------------------------------------------------------------------------------
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/// Changes the mapping of the chip so that the remap area mirrors the
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/// internal RAM.
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//------------------------------------------------------------------------------
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void BOARD_RemapRam()
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{
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if (BOARD_GetRemap() != BOARD_RAM)
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{
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WRITE(AT91C_BASE_MATRIX, MATRIX_MRCR, (AT91C_MATRIX_RCB0_ARM7TDMI | AT91C_MATRIX_RCB1_PDC));
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}
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}
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//------------------------------------------------------------------------------
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/// Initialize and configure the SDRAM
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//------------------------------------------------------------------------------
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#define AT91C_SDRAM ((volatile unsigned int *)0x20000000)
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#define SDRAM_TOP 0x24000000 // 64 MByte
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#define SDRAM_BASE 0x20000000 //
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void BOARD_ConfigureSdram(unsigned char busWidth)
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{
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volatile unsigned int i=0;
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static const Pin pinsSdram[] = {PINS_SDRAM};
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volatile unsigned int *pSdram = (unsigned int *) AT91C_EBI_SDRAM;
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unsigned short sdrc_dbw = 0;
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switch (busWidth) {
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case 16:
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sdrc_dbw = AT91C_SDRAMC_DBW_16_BITS;
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break;
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case 32:
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default:
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sdrc_dbw = AT91C_SDRAMC_DBW_32_BITS;
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break;
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}
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// Enable EBI chip select for the SDRAM
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AT91C_BASE_MATRIX->MATRIX_EBICSA |= AT91C_MATRIX_EBI_CS1A_SDRAMC;
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// Enable corresponding PIOs
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PIO_Configure(pinsSdram, 1);
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// CFG Control Register
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WRITE(AT91C_BASE_SDRAMC, SDRAMC_CR , ( AT91C_SDRAMC_TXSR_10 |
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AT91C_SDRAMC_TRAS_6 |
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AT91C_SDRAMC_TRCD_3 |
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AT91C_SDRAMC_TRP_3 |
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AT91C_SDRAMC_TRC_9 |
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AT91C_SDRAMC_TWR_2 |
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sdrc_dbw |
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AT91C_SDRAMC_CAS_2 |
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AT91C_SDRAMC_NB_4_BANKS |
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AT91C_SDRAMC_NR_13 |
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AT91C_SDRAMC_NC_9)); // row = 13, column = 9 SDRAM CAS = 3
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// CFG Memory Device Register
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WRITE(AT91C_BASE_SDRAMC, SDRAMC_MDR, AT91C_SDRAMC_MD_SDRAM);
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// Wait for at least 200us
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for (i = 0; i < 3000; i++);
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// Perform NOP
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WRITE(AT91C_BASE_SDRAMC, SDRAMC_MR, AT91C_SDRAMC_MODE_NOP_CMD) ;
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pSdram[0] = 0x00000000;
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// Perform All Bank Precharge
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WRITE(AT91C_BASE_SDRAMC, SDRAMC_MR, AT91C_SDRAMC_MODE_PRCGALL_CMD) ;
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pSdram[0] = 0x00000000;
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// Perform 8 CBR cycles
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WRITE(AT91C_BASE_SDRAMC, SDRAMC_MR, AT91C_SDRAMC_MODE_RFSH_CMD) ;
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for (i = 0 ; i < 8 ; i++)
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{
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pSdram[0] = 0x00000000;
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}
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// Program the SDRAM
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// Perform LMR operation
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WRITE(AT91C_BASE_SDRAMC, SDRAMC_MR, AT91C_SDRAMC_MODE_LMR_CMD) ;
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pSdram[0] = 0x00000000;
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// Set Normal CTRL
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WRITE(AT91C_BASE_SDRAMC, SDRAMC_MR, AT91C_SDRAMC_MODE_NORMAL_CMD) ;
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pSdram[0] = 0x00000000;
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// Set Refresh timer
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//pSDRAMC->SDRAMC_TR = sdram_Ptr->sdram_tr;
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WRITE(AT91C_BASE_SDRAMC, SDRAMC_TR, 375); //Refresh Timer (ex: ((64 x 10^-3)/8192) x 48 x 10^6 ) => 375 or 0x177 for MCK 48 MHz
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//SDRAM is ready to use
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}
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//------------------------------------------------------------------------------
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/// Configures the EBI for NandFlash access
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/// \Param busWidth Bus width
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//------------------------------------------------------------------------------
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void BOARD_ConfigureNandFlash(unsigned char busWidth)
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{
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// Configure EBI
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AT91C_BASE_MATRIX->MATRIX_EBICSA |= AT91C_MATRIX_EBI_CS3A_SM;
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AT91C_BASE_SMC->SMC_SETUP3 = ((AT91C_SMC_NWESETUP & (0x1)) |
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( AT91C_SMC_NCSSETUPWR & (0x1<<8)) |
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( AT91C_SMC_NRDSETUP & (0x1<<16)) |
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( AT91C_SMC_NCSSETUPRD & (0x1<<24)));
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AT91C_BASE_SMC->SMC_PULSE3 = (( AT91C_SMC_NCSPULSERD & (0x03 <<24)) |
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( AT91C_SMC_NRDPULSE & (0x02 <<16)) |
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( AT91C_SMC_NCSPULSEWR & (0x03 <<8)) |
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( AT91C_SMC_NWEPULSE & 0x02));
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AT91C_BASE_SMC->SMC_CYCLE3 = ((AT91C_SMC_NRDCYCLE & (0x06<<16)) |
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( AT91C_SMC_NWECYCLE & 0x06));
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AT91C_BASE_SMC->SMC_CTRL3 = ( AT91C_SMC_BAT_BYTE_WRITE |
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AT91C_SMC_READMODE |
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AT91C_SMC_WRITEMODE |
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AT91C_SMC_DBW_WIDTH_EIGTH_BITS |
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(AT91C_SMC_TDF & (0x2 <<16)));
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if (busWidth == 8) {
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AT91C_BASE_SMC->SMC_CTRL3 |= AT91C_SMC_DBW_WIDTH_EIGTH_BITS;
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}
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else if (busWidth == 16) {
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AT91C_BASE_SMC->SMC_CTRL3 |= AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS;
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}
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else if (busWidth == 32) {
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AT91C_BASE_SMC->SMC_CTRL3 |= AT91C_SMC_DBW_WIDTH_THIRTY_TWO_BITS;
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}
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}
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//------------------------------------------------------------------------------
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/// Configures the EBI for NandFlash access at 48MHz.
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/// \Param busWidth Bus width
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//------------------------------------------------------------------------------
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void BOARD_ConfigureNandFlash48MHz(unsigned char busWidth)
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{
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// Configure EBI
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AT91C_BASE_MATRIX->MATRIX_EBICSA |= AT91C_MATRIX_EBI_CS3A_SM;
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// Configure SMC
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AT91C_BASE_SMC->SMC_SETUP3 = 0x00010001;
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AT91C_BASE_SMC->SMC_PULSE3 = 0x04030302;
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AT91C_BASE_SMC->SMC_CYCLE3 = 0x00070004;
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AT91C_BASE_SMC->SMC_CTRL3 = (AT91C_SMC_READMODE
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| AT91C_SMC_WRITEMODE
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| AT91C_SMC_NWAITM_NWAIT_DISABLE
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| ((0x1 << 16) & AT91C_SMC_TDF));
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if (busWidth == 8) {
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AT91C_BASE_SMC->SMC_CTRL3 |= AT91C_SMC_DBW_WIDTH_EIGTH_BITS;
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}
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else if (busWidth == 16) {
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AT91C_BASE_SMC->SMC_CTRL3 |= AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS;
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}
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else if (busWidth == 32) {
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AT91C_BASE_SMC->SMC_CTRL3 |= AT91C_SMC_DBW_WIDTH_THIRTY_TWO_BITS;
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}
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}
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