155 lines
4.4 KiB
C
155 lines
4.4 KiB
C
/******************************************************************************
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Copyright (c) 2011
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Lantiq Deutschland GmbH
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For licensing information, see the file 'LICENSE' in the root folder of
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this software module.
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******************************************************************************/
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#ifndef _drv_onu_register_h
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#define _drv_onu_register_h
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/* exclude some parts from SWIG generation */
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#ifndef SWIG
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EXTERN_C_BEGIN
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/** \addtogroup ONU_MAPI_REFERENCE_INTERNAL
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@{
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*/
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/*! \defgroup ONU_REGISTER_INTERNAL Device Register Access
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@{
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*/
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#include "drv_onu_std_defs.h"
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#include "drv_onu_reg_base.h"
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#include "drv_onu_reg_fsqm.h"
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#include "drv_onu_reg_gtc.h"
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#include "drv_onu_reg_gpearb.h"
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#include "drv_onu_reg_iqm.h"
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#include "drv_onu_reg_eim.h"
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#include "drv_onu_reg_sxgmii.h"
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#include "drv_onu_reg_ictrll.h"
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#include "drv_onu_reg_ictrlg.h"
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#include "drv_onu_reg_octrll.h"
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#include "drv_onu_reg_octrlg.h"
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#include "drv_onu_reg_pctrl.h"
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#include "drv_onu_reg_sbs0ctrl.h"
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#include "drv_onu_reg_sys_eth.h"
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#include "drv_onu_reg_sys_gpe.h"
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#include "drv_onu_reg_pe.h"
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#include "drv_onu_reg_pctrl.h"
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#include "drv_onu_reg_coplink_cop.h"
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#include "drv_onu_reg_ictrlc.h"
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#include "drv_onu_reg_octrlc.h"
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#include "drv_onu_reg_link.h"
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#include "drv_onu_reg_tbm.h"
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#include "drv_onu_reg_tmu.h"
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#include "drv_onu_reg_merge.h"
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#include "drv_onu_reg_disp.h"
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#include "drv_onu_reg_tod.h"
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#include "drv_onu_reg_status.h"
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#include "drv_onu_reg_sys1.h"
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#define COPLINK_COP_BASE 0
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#if 1 /* defined(ONU_SIMULATION) */
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#define ONU_REGISTER_FUNC
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uint32_t onu_register_read(void *reg);
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void onu_register_write(void *reg, uint32_t val);
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#endif
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#ifdef ONU_REGISTER_FUNC
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/** Read value of register
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\param reg register address
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\return register contents
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*/
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#define reg_r32(reg) onu_register_read(reg)
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/** Write value to register
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\param val register value
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\param reg register address
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*/
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#define reg_w32(val, reg) onu_register_write(reg, val)
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#else
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#include <asm/io.h>
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/* no simulation, FPGA, ... -> direct access possible */
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/** Read value of register
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\param reg register address
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\return register contents
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*/
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#define reg_r32(reg) __raw_readl(reg)
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/** Write value to register
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\param val register value
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\param reg register address
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*/
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#define reg_w32(val, reg) __raw_writel(val,reg)
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#endif
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/** Clear / set bits within a register
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\param clear clear mask
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\param set set mask
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\param reg register address
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*/
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#define reg_w32_mask(clear, set, reg) reg_w32((reg_r32(reg) & ~(clear)) | (set), reg)
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#define reg_r32_table(reg, idx) reg_r32(&((uint32_t *)®)[idx])
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/** Write value to table entry
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\param val register value
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\param reg register address
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\param idx number of the uint32 table element
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*/
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#define reg_w32_table(val, reg, idx) reg_w32(val, &((uint32_t *)®)[idx])
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/** Write value to table entry
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\param clear clear mask
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\param set set mask
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\param reg register address
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\param idx number of the uint32 table element
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*/
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#define reg_w32_table_mask(clear, set, reg, idx) reg_w32_table((reg_r32_table(reg, idx) & ~(clear)) | (set), reg, idx)
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/** Return the address of table entry
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\param reg register address
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\param idx number of the uint32 table element
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*/
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#define adr_table(reg, idx) (uint32_t)(&((uint32_t *)®)[idx])
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extern struct onu_reg_fsqm *fsqm;
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extern struct onu_reg_gpearb *gpearb;
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extern struct onu_reg_gtc *gtc;
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extern struct onu_reg_ictrlc *ictrlc;
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extern struct onu_reg_octrlc *octrlc;
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extern struct onu_reg_ictrlg *ictrlg;
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extern struct onu_reg_ictrll *ictrll;
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extern struct onu_reg_iqm *iqm;
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extern struct onu_reg_link *link;
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extern struct onu_reg_octrlg *octrlg;
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extern struct onu_reg_octrll *octrll;
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extern struct onu_reg_sbs0ctrl *sbs0ctrl;
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extern struct onu_reg_sys_gpe *sys_gpe;
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extern struct onu_reg_sys_eth *sys_eth;
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extern struct onu_reg_tbm *tbm;
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extern struct onu_reg_tmu *tmu;
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extern struct onu_reg_merge *merge;
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extern struct onu_reg_disp *disp;
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extern union onu_reg_eim *eim;
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extern struct onu_reg_sxgmii *sxgmii;
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extern struct onu_reg_pctrl *pctrl;
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extern struct onu_reg_pe *pe;
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extern struct onu_reg_tod *tod;
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extern struct onu_reg_status *status;
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extern struct onu_reg_sys1 * sys1;
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#define set_val(reg, val, mask, offset) do {(reg) &= ~(mask); (reg) |= (((val) << (offset)) & (mask)); } while(0)
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#define get_val(val, mask, offset) (((val) & (mask)) >> (offset))
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/*! @} */
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/*! @} */
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EXTERN_C_END
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#endif /* SWIG */
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#endif
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