234 lines
7.9 KiB
C
234 lines
7.9 KiB
C
/******************************************************************************
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Copyright (c) 2011
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Lantiq Deutschland GmbH
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For licensing information, see the file 'LICENSE' in the root folder of
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this software module.
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******************************************************************************/
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#ifndef _drv_onu_reg_base_h
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#define _drv_onu_reg_base_h
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/** \addtogroup ONU_BASE
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@{
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*/
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#ifndef KSEG1
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#define KSEG1 0xA0000000
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#endif
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/** address range for gpearb
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0x1D400100--0x1D4001FF */
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#define ONU_GPEARB_BASE (KSEG1 | 0x1D400100)
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#define ONU_GPEARB_END (KSEG1 | 0x1D4001FF)
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#define ONU_GPEARB_SIZE 0x00000100
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/** address range for tmu
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0x1D404000--0x1D404FFF */
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#define ONU_TMU_BASE (KSEG1 | 0x1D404000)
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#define ONU_TMU_END (KSEG1 | 0x1D404FFF)
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#define ONU_TMU_SIZE 0x00001000
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/** address range for iqm
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0x1D410000--0x1D41FFFF */
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#define ONU_IQM_BASE (KSEG1 | 0x1D410000)
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#define ONU_IQM_END (KSEG1 | 0x1D41FFFF)
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#define ONU_IQM_SIZE 0x00010000
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/** address range for octrlg
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0x1D420000--0x1D42FFFF */
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#define ONU_OCTRLG_BASE (KSEG1 | 0x1D420000)
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#define ONU_OCTRLG_END (KSEG1 | 0x1D42FFFF)
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#define ONU_OCTRLG_SIZE 0x00010000
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/** address range for octrll0
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0x1D440000--0x1D4400FF */
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#define ONU_OCTRLL0_BASE (KSEG1 | 0x1D440000)
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#define ONU_OCTRLL0_END (KSEG1 | 0x1D4400FF)
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#define ONU_OCTRLL0_SIZE 0x00000100
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/** address range for octrll1
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0x1D440100--0x1D4401FF */
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#define ONU_OCTRLL1_BASE (KSEG1 | 0x1D440100)
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#define ONU_OCTRLL1_END (KSEG1 | 0x1D4401FF)
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#define ONU_OCTRLL1_SIZE 0x00000100
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/** address range for octrll2
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0x1D440200--0x1D4402FF */
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#define ONU_OCTRLL2_BASE (KSEG1 | 0x1D440200)
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#define ONU_OCTRLL2_END (KSEG1 | 0x1D4402FF)
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#define ONU_OCTRLL2_SIZE 0x00000100
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/** address range for octrll3
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0x1D440300--0x1D4403FF */
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#define ONU_OCTRLL3_BASE (KSEG1 | 0x1D440300)
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#define ONU_OCTRLL3_END (KSEG1 | 0x1D4403FF)
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#define ONU_OCTRLL3_SIZE 0x00000100
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/** address range for octrlc
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0x1D441000--0x1D4410FF */
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#define ONU_OCTRLC_BASE (KSEG1 | 0x1D441000)
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#define ONU_OCTRLC_END (KSEG1 | 0x1D4410FF)
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#define ONU_OCTRLC_SIZE 0x00000100
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/** address range for ictrlg
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0x1D450000--0x1D45FFFF */
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#define ONU_ICTRLG_BASE (KSEG1 | 0x1D450000)
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#define ONU_ICTRLG_END (KSEG1 | 0x1D45FFFF)
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#define ONU_ICTRLG_SIZE 0x00010000
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/** address range for ictrll0
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0x1D460000--0x1D4601FF */
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#define ONU_ICTRLL0_BASE (KSEG1 | 0x1D460000)
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#define ONU_ICTRLL0_END (KSEG1 | 0x1D4601FF)
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#define ONU_ICTRLL0_SIZE 0x00000200
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/** address range for ictrll1
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0x1D460200--0x1D4603FF */
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#define ONU_ICTRLL1_BASE (KSEG1 | 0x1D460200)
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#define ONU_ICTRLL1_END (KSEG1 | 0x1D4603FF)
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#define ONU_ICTRLL1_SIZE 0x00000200
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/** address range for ictrll2
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0x1D460400--0x1D4605FF */
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#define ONU_ICTRLL2_BASE (KSEG1 | 0x1D460400)
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#define ONU_ICTRLL2_END (KSEG1 | 0x1D4605FF)
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#define ONU_ICTRLL2_SIZE 0x00000200
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/** address range for ictrll3
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0x1D460600--0x1D4607FF */
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#define ONU_ICTRLL3_BASE (KSEG1 | 0x1D460600)
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#define ONU_ICTRLL3_END (KSEG1 | 0x1D4607FF)
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#define ONU_ICTRLL3_SIZE 0x00000200
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/** address range for ictrlc0
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0x1D461000--0x1D4610FF */
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#define ONU_ICTRLC0_BASE (KSEG1 | 0x1D461000)
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#define ONU_ICTRLC0_END (KSEG1 | 0x1D4610FF)
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#define ONU_ICTRLC0_SIZE 0x00000100
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/** address range for ictrlc1
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0x1D461100--0x1D4611FF */
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#define ONU_ICTRLC1_BASE (KSEG1 | 0x1D461100)
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#define ONU_ICTRLC1_END (KSEG1 | 0x1D4611FF)
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#define ONU_ICTRLC1_SIZE 0x00000100
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/** address range for fsqm
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0x1D500000--0x1D5FFFFF */
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#define ONU_FSQM_BASE (KSEG1 | 0x1D500000)
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#define ONU_FSQM_END (KSEG1 | 0x1D5FFFFF)
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#define ONU_FSQM_SIZE 0x00100000
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/** address range for pctrl
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0x1D600000--0x1D6001FF */
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#define ONU_PCTRL_BASE (KSEG1 | 0x1D600000)
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#define ONU_PCTRL_END (KSEG1 | 0x1D6001FF)
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#define ONU_PCTRL_SIZE 0x00000200
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/** address range for link0
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0x1D600200--0x1D6002FF */
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#define ONU_LINK0_BASE (KSEG1 | 0x1D600200)
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#define ONU_LINK0_END (KSEG1 | 0x1D6002FF)
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#define ONU_LINK0_SIZE 0x00000100
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/** address range for link1
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0x1D600300--0x1D6003FF */
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#define ONU_LINK1_BASE (KSEG1 | 0x1D600300)
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#define ONU_LINK1_END (KSEG1 | 0x1D6003FF)
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#define ONU_LINK1_SIZE 0x00000100
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/** address range for link2
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0x1D600400--0x1D6004FF */
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#define ONU_LINK2_BASE (KSEG1 | 0x1D600400)
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#define ONU_LINK2_END (KSEG1 | 0x1D6004FF)
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#define ONU_LINK2_SIZE 0x00000100
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/** address range for disp
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0x1D600500--0x1D6005FF */
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#define ONU_DISP_BASE (KSEG1 | 0x1D600500)
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#define ONU_DISP_END (KSEG1 | 0x1D6005FF)
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#define ONU_DISP_SIZE 0x00000100
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/** address range for merge
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0x1D600600--0x1D6006FF */
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#define ONU_MERGE_BASE (KSEG1 | 0x1D600600)
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#define ONU_MERGE_END (KSEG1 | 0x1D6006FF)
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#define ONU_MERGE_SIZE 0x00000100
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/** address range for tbm
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0x1D600700--0x1D6007FF */
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#define ONU_TBM_BASE (KSEG1 | 0x1D600700)
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#define ONU_TBM_END (KSEG1 | 0x1D6007FF)
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#define ONU_TBM_SIZE 0x00000100
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/** address range for pe0
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0x1D610000--0x1D61FFFF */
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#define ONU_PE0_BASE (KSEG1 | 0x1D610000)
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#define ONU_PE0_END (KSEG1 | 0x1D61FFFF)
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#define ONU_PE0_SIZE 0x00010000
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/** address range for pe1
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0x1D620000--0x1D62FFFF */
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#define ONU_PE1_BASE (KSEG1 | 0x1D620000)
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#define ONU_PE1_END (KSEG1 | 0x1D62FFFF)
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#define ONU_PE1_SIZE 0x00010000
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/** address range for pe2
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0x1D630000--0x1D63FFFF */
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#define ONU_PE2_BASE (KSEG1 | 0x1D630000)
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#define ONU_PE2_END (KSEG1 | 0x1D63FFFF)
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#define ONU_PE2_SIZE 0x00010000
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/** address range for pe3
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0x1D640000--0x1D64FFFF */
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#define ONU_PE3_BASE (KSEG1 | 0x1D640000)
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#define ONU_PE3_END (KSEG1 | 0x1D64FFFF)
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#define ONU_PE3_SIZE 0x00010000
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/** address range for pe4
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0x1D650000--0x1D65FFFF */
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#define ONU_PE4_BASE (KSEG1 | 0x1D650000)
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#define ONU_PE4_END (KSEG1 | 0x1D65FFFF)
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#define ONU_PE4_SIZE 0x00010000
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/** address range for pe5
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0x1D660000--0x1D66FFFF */
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#define ONU_PE5_BASE (KSEG1 | 0x1D660000)
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#define ONU_PE5_END (KSEG1 | 0x1D66FFFF)
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#define ONU_PE5_SIZE 0x00010000
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/** address range for sys_gpe
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0x1D700000--0x1D7000FF */
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#define ONU_SYS_GPE_BASE (KSEG1 | 0x1D700000)
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#define ONU_SYS_GPE_END (KSEG1 | 0x1D7000FF)
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#define ONU_SYS_GPE_SIZE 0x00000100
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/** address range for eim
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0x1D800000--0x1D800FFF */
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#define ONU_EIM_BASE (KSEG1 | 0x1D800000)
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#define ONU_EIM_END (KSEG1 | 0x1D800FFF)
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#define ONU_EIM_SIZE 0x00001000
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/** address range for sxgmii
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0x1D808800--0x1D8088FF */
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#define ONU_SXGMII_BASE (KSEG1 | 0x1D808800)
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#define ONU_SXGMII_END (KSEG1 | 0x1D8088FF)
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#define ONU_SXGMII_SIZE 0x00000100
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/** address range for sgmii
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0x1D808C00--0x1D808CFF */
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#define ONU_SGMII_BASE (KSEG1 | 0x1D808C00)
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#define ONU_SGMII_END (KSEG1 | 0x1D808CFF)
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#define ONU_SGMII_SIZE 0x00000100
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/** address range for sys_eth
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0x1DB00000--0x1DB000FF */
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#define ONU_SYS_ETH_BASE (KSEG1 | 0x1DB00000)
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#define ONU_SYS_ETH_END (KSEG1 | 0x1DB000FF)
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#define ONU_SYS_ETH_SIZE 0x00000100
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/** address range for gtc
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0x1DC05000--0x1DC052D4 */
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#define ONU_GTC_BASE (KSEG1 | 0x1DC00000)
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#define ONU_GTC_END (KSEG1 | 0x1DC002D4)
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#define ONU_GTC_SIZE 0x000002D5
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/** address range for tod
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0x1DEFFE00--0x1DEFFEFC */
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#define ONU_TOD_BASE (KSEG1 | 0x1DEFFE00)
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#define ONU_TOD_END (KSEG1 | 0x1DEFFEFF)
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#define ONU_TOD_SIZE 0x00000100
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/** address range for sbs0ctrl
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0x1F080000--0x1F0801FF */
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#define ONU_SBS0CTRL_BASE (KSEG1 | 0x1F080000)
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#define ONU_SBS0CTRL_END (KSEG1 | 0x1F0801FF)
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#define ONU_SBS0CTRL_SIZE 0x00000200
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/** address range for sbs0ram
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0x1F200000--0x1F32FFFF */
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#define ONU_SBS0RAM_BASE (KSEG1 | 0x1F200000)
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#define ONU_SBS0RAM_END (KSEG1 | 0x1F32FFFF)
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#define ONU_SBS0RAM_SIZE 0x00130000
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/** address range for status
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0x1E802000--0x1E80207F */
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#define ONU_STATUS_BASE (KSEG1 | 0x1E802000)
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#define ONU_STATUS_END (KSEG1 | 0x1E80207F)
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#define ONU_STATUS_SIZE 0x00000080
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/** address range for sys1
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0x1EF00000--0x1EF000FF */
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#define ONU_SYS1_BASE (KSEG1 | 0x1EF00000)
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#define ONU_SYS1_END (KSEG1 | 0x1EF000FF)
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#define ONU_SYS1_SIZE 0x00000100
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/*! @} */ /* ONU_BASE */
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#endif /* _drv_onu_reg_base_h */
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