Optimized PR sequence generator
This commit is contained in:
Xavier Arteaga
Xavier Arteaga
parent
375ac1388a
commit
d76c77c188
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@ -19,109 +19,271 @@
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*
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*/
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#include <pthread.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <strings.h>
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#include "srslte/phy/common/sequence.h"
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#include "srslte/phy/utils/bit.h"
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#include "srslte/phy/utils/debug.h"
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#include "srslte/phy/utils/vector.h"
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#define Nc 1600
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#ifdef LV_HAVE_SSE
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#include <immintrin.h>
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#include <srslte/phy/common/sequence.h>
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#endif /* LV_HAVE_SSE */
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#define MAX_SEQ_LEN (256 * 1024)
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/**
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* Length of the seed, used for the feedback delay. Do not change.
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*/
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#define SEQUENCE_SEED_LEN (31)
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#define static_memory
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/**
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* Nc parameter defined in 3GPP. Do not change.
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*/
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#define SEQUENCE_NC (1600)
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/*
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* Pseudo Random Sequence generation.
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* It follows the 3GPP Release 8 (LTE) 36.211
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* Section 7.2
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*/
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#ifdef static_memory
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static uint8_t x1[Nc + MAX_SEQ_LEN + 31];
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static uint8_t x2[Nc + MAX_SEQ_LEN + 31];
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static pthread_mutex_t mutex = PTHREAD_MUTEX_INITIALIZER;
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int srslte_sequence_set_LTE_pr(srslte_sequence_t* q, uint32_t len, uint32_t seed)
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/**
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* Parallel bit generation for x1/x2 sequences parameters. Exploits the fact that the sequence generation is 31 chips
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* ahead and the maximum register shift is 3 (for x2).
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*/
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#define SEQUENCE_PAR_BITS (28U)
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#define SEQUENCE_MASK ((1U << SEQUENCE_PAR_BITS) - 1U)
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/**
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* Computes one step of the X1 sequence for SEQUENCE_PAR_BITS simultaneously
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* @param state 32 bit current state
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* @return new 32 bit state
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*/
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static inline uint32_t sequence_gen_LTE_pr_memless_step_par_x1(uint32_t state)
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{
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int n;
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// Perform XOR
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uint32_t f = state ^ (state >> 3U);
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if (len > q->max_len) {
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ERROR("Error generating pseudo-random sequence: len %d exceeds maximum len %d\n", len, MAX_SEQ_LEN);
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return -1;
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}
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// Prepare feedback
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f = ((f & SEQUENCE_MASK) << (SEQUENCE_SEED_LEN - SEQUENCE_PAR_BITS));
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if (len > q->max_len) {
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ERROR("Error generating pseudo-random sequence: len %d is greater than allocated len %d\n", len, q->max_len);
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return -1;
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}
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pthread_mutex_lock(&mutex);
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// Insert feedback
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state = (state >> SEQUENCE_PAR_BITS) ^ f;
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for (n = 0; n < 31; n++) {
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x2[n] = (seed >> n) & 0x1;
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}
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x1[0] = 1;
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for (n = 0; n < Nc + len; n++) {
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x1[n + 31] = (x1[n + 3] + x1[n]) & 0x1;
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x2[n + 31] = (x2[n + 3] + x2[n + 2] + x2[n + 1] + x2[n]) & 0x1;
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}
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for (n = 0; n < len; n++) {
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q->c[n] = (x1[n + Nc] + x2[n + Nc]) & 0x1;
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}
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pthread_mutex_unlock(&mutex);
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return 0;
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return state;
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}
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#else
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/**
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* Computes one step of the X1 sequence for 1bit
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* @param state 32 bit current state
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* @return new 32 bit state
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*/
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static inline uint32_t sequence_gen_LTE_pr_memless_step_x1(uint32_t state)
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{
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// Perform XOR
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uint32_t f = state ^ (state >> 3U);
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// Prepare feedback
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f = ((f & 1U) << (SEQUENCE_SEED_LEN - 1U));
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// Insert feedback
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state = (state >> 1U) ^ f;
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return state;
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}
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/**
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* Computes one step of the X2 sequence for SEQUENCE_PAR_BITS simultaneously
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* @param state 32 bit current state
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* @return new 32 bit state
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*/
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static inline uint32_t sequence_gen_LTE_pr_memless_step_par_x2(uint32_t state)
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{
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// Perform XOR
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uint32_t f = state ^ (state >> 1U) ^ (state >> 2U) ^ (state >> 3U);
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// Prepare feedback
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f = ((f & SEQUENCE_MASK) << (SEQUENCE_SEED_LEN - SEQUENCE_PAR_BITS));
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// Insert feedback
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state = (state >> SEQUENCE_PAR_BITS) ^ f;
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return state;
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}
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/**
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* Computes one step of the X2 sequence for 1bit
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* @param state 32 bit current state
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* @return new 32 bit state
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*/
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static inline uint32_t sequence_gen_LTE_pr_memless_step_x2(uint32_t state)
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{
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// Perform XOR
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uint32_t f = state ^ (state >> 1U) ^ (state >> 2U) ^ (state >> 3U);
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// Prepare feedback
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f = ((f & 1U) << (SEQUENCE_SEED_LEN - 1U));
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// Insert feedback
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state = (state >> 1U) ^ f;
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return state;
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}
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/**
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* Static precomputed array x1 and x2
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* ----------------------------------
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*
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* The pre-computation of the Pseudo-Random sequences is based in their linearity properties.
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*
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* Having two seeds seed_1 and seed_2 generate x2_1 and x2_2 respectively:
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* seed_1 -> x2_1
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* seed_2 -> x2_2
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*
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* Then, the linearity property satisfies:
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* seed_1 ^ seed_2 -> x2_1 ^ x2_2
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*
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* Because of this, a different x2 can be pre-computed for each bit of the seed.
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*
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*/
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static uint32_t sequence_x1_init = 0;
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static uint32_t sequence_x2_init[SEQUENCE_SEED_LEN] = {};
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/**
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* C constructor, pre-computes X1 and X2 initial states and sequences
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*/
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__attribute__((constructor)) __attribute__((unused)) static void srslte_lte_pr_pregen()
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{
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// Compute transition step
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sequence_x1_init = 1;
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for (uint32_t n = 0; n < SEQUENCE_NC; n++) {
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sequence_x1_init = sequence_gen_LTE_pr_memless_step_x1(sequence_x1_init);
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}
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// For each bit of the seed
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for (uint32_t i = 0; i < SEQUENCE_SEED_LEN; i++) {
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// Compute transition step
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sequence_x2_init[i] = 1U << i;
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for (uint32_t n = 0; n < SEQUENCE_NC; n++) {
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sequence_x2_init[i] = sequence_gen_LTE_pr_memless_step_x2(sequence_x2_init[i]);
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}
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}
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}
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static void sequence_gen_LTE_pr_memless(uint8_t* pr, uint32_t len, uint32_t seed)
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{
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int n = 0;
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uint32_t x1 = sequence_x1_init; // X1 initial state is fix
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uint32_t x2 = 0;
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// Load X2 state
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for (uint32_t i = 0; i < SEQUENCE_SEED_LEN; i++) {
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if ((seed >> i) & 1U) {
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x2 ^= sequence_x2_init[i];
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}
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}
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// Parallel stage
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if (len > SEQUENCE_PAR_BITS) {
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for (; n < len - (SEQUENCE_PAR_BITS - 1); n += SEQUENCE_PAR_BITS) {
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// XOR x1 and x2
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uint32_t c = (uint32_t)(x1 ^ x2);
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// Save state
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for (uint32_t i = 0; i < SEQUENCE_PAR_BITS; i++) {
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pr[n + i] = (uint8_t)((c >> i) & 1U);
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}
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// Parallel step
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x1 = sequence_gen_LTE_pr_memless_step_par_x1(x1);
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x2 = sequence_gen_LTE_pr_memless_step_par_x2(x2);
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}
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}
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// Single step
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for (; n < len; n++) {
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// Save current state
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pr[n] = (uint8_t)((x1 ^ x2) & 1U);
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// Single step
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x1 = sequence_gen_LTE_pr_memless_step_x1(x1);
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x2 = sequence_gen_LTE_pr_memless_step_x2(x2);
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}
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}
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// static pthread_mutex_t mutex = PTHREAD_MUTEX_INITIALIZER;
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int srslte_sequence_set_LTE_pr(srslte_sequence_t* q, uint32_t len, uint32_t seed)
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{
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int n;
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uint32_t *x1, *x2;
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if (len > q->max_len) {
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ERROR("Error generating pseudo-random sequence: len %d is greater than allocated len %d\n", len, q->max_len);
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return -1;
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return SRSLTE_ERROR;
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}
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x1 = calloc(Nc + len + 31, sizeof(uint32_t));
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if (!x1) {
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perror("calloc");
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return -1;
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}
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x2 = calloc(Nc + len + 31, sizeof(uint32_t));
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if (!x2) {
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free(x1);
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perror("calloc");
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return -1;
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}
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sequence_gen_LTE_pr_memless(q->c, len, seed);
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for (n = 0; n < 31; n++) {
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x2[n] = (seed >> n) & 0x1;
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}
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x1[0] = 1;
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for (n = 0; n < Nc + len; n++) {
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x1[n + 31] = (x1[n + 3] + x1[n]) & 0x1;
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x2[n + 31] = (x2[n + 3] + x2[n + 2] + +x2[n + 1] + x2[n]) & 0x1;
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}
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for (n = 0; n < len; n++) {
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q->c[n] = (x1[n + Nc] + x2[n + Nc]) & 0x1;
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}
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free(x1);
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free(x2);
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return 0;
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return SRSLTE_SUCCESS;
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}
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#endif
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static inline void
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sequence_generate_signed(const uint8_t* c_unpacked, int8_t* c_char, int16_t* c_short, float* c_float, uint32_t len)
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{
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int i = 0;
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#ifdef LV_HAVE_SSE
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__m128i* sse_c = (__m128i*)c_unpacked;
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__m128i* sse_c_char = (__m128i*)c_char;
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__m128i* sse_c_short = (__m128i*)c_short;
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float* sse_c_float = c_float;
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for (; i < ((int)len) - 15; i += 16) {
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// Get bit mask
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__m128i m8 = _mm_cmpgt_epi8(_mm_load_si128(sse_c), _mm_set1_epi8(0));
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sse_c++;
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// Generate blend masks
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__m128i m16_1 = _mm_unpacklo_epi8(m8, m8);
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__m128i m16_2 = _mm_unpackhi_epi8(m8, m8);
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__m128 m32_1 = (__m128)_mm_unpacklo_epi8(m16_1, m16_1);
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__m128 m32_2 = (__m128)_mm_unpackhi_epi8(m16_1, m16_1);
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__m128 m32_3 = (__m128)_mm_unpacklo_epi8(m16_2, m16_2);
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__m128 m32_4 = (__m128)_mm_unpackhi_epi8(m16_2, m16_2);
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// Generate int8 values
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const __m128i bp = _mm_set1_epi8(+1);
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const __m128i bn = _mm_set1_epi8(-1);
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_mm_storeu_si128(sse_c_char, _mm_blendv_epi8(bp, bn, m8));
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sse_c_char++;
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// Generate int16 values
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const __m128i sp = _mm_set1_epi16(+1);
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const __m128i sn = _mm_set1_epi16(-1);
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_mm_store_si128(sse_c_short++, _mm_blendv_epi8(sp, sn, m16_1));
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_mm_store_si128(sse_c_short++, _mm_blendv_epi8(sp, sn, m16_2));
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// Generate float values
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const __m128 fp = _mm_set1_ps(+1);
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const __m128 fn = _mm_set1_ps(-1);
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_mm_store_ps(sse_c_float, _mm_blendv_ps(fp, fn, (__m128)m32_1));
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sse_c_float += 4;
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_mm_store_ps(sse_c_float, _mm_blendv_ps(fp, fn, (__m128)m32_2));
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sse_c_float += 4;
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_mm_store_ps(sse_c_float, _mm_blendv_ps(fp, fn, (__m128)m32_3));
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sse_c_float += 4;
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_mm_store_ps(sse_c_float, _mm_blendv_ps(fp, fn, (__m128)m32_4));
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sse_c_float += 4;
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}
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#endif /* LV_HAVE_SSE */
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for (; i < len; i++) {
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// Load signed
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int8_t tt = (int8_t)(c_unpacked[i] ? -1 : +1);
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// TYpecast conversion for each type
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c_char[i] = tt;
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c_short[i] = (int16_t)tt;
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c_float[i] = (float)tt;
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}
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}
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int srslte_sequence_LTE_pr(srslte_sequence_t* q, uint32_t len, uint32_t seed)
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{
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@ -129,14 +291,16 @@ int srslte_sequence_LTE_pr(srslte_sequence_t* q, uint32_t len, uint32_t seed)
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return SRSLTE_ERROR;
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}
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q->cur_len = len;
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// Generate sequence
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srslte_sequence_set_LTE_pr(q, len, seed);
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// Pack PR sequence
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srslte_bit_pack_vector(q->c, q->c_bytes, len);
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for (int i = 0; i < len; i++) {
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q->c_float[i] = (1 - 2 * q->c[i]);
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q->c_short[i] = (int16_t)q->c_float[i];
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q->c_char[i] = (int8_t)q->c_float[i];
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;
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}
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// Generate signed type values
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sequence_generate_signed(q->c, q->c_char, q->c_short, q->c_float, len);
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return SRSLTE_SUCCESS;
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}
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