Harald Welte ff2d7b03e0 clock-gen: Minor changes; final version as ordered ... * move DC jack to extend beyond PCB edge into front panel * harmonize component variants (10n only 0402, 4.7u only 0805) * add "sysmocom" as manufacturer name (WEEE requirement)		2019-01-27 18:17:36 +01:00
..
components	clock-gen: finish routing of PCB layout	2019-01-27 17:00:46 +01:00
clock-generator.brd	clock-gen: Minor changes; final version as ordered	2019-01-27 18:17:36 +01:00
clock-generator.sch	clock-gen: Minor changes; final version as ordered	2019-01-27 18:17:36 +01:00
samd11-gpio.gnumeric	clock-gen: Add SPI; UEXT header; mounting holes; do layout/routing	2019-01-26 20:57:42 +01:00