SIU Clock Breakout Board (C) 2020 by Harald Welte JP5: AUX_IN 1PPS_IN 1PPS_OUT GND 3V3 JP3: 2-3 Tx JP2: 2-3 Tx JP1: 1-2 Rx >VERSION SS-641010-NF 10P10C jack >NAME >VALUE Linear Technology Devices http://www.linear-tech.com <author>Created by librarian@cadsoft.de</author> Small Outline IC >NAME >VALUE 0603 >NAME >VALUE 0805 >NAME >VALUE >NAME >VALUE Jumpers <author>Created by librarian@cadsoft.de</author> JUMPER >NAME 1 2 3 >VALUE Pin Header Connectors <author>Created by librarian@cadsoft.de</author> PIN HEADER >NAME >VALUE PIN HEADER >NAME >VALUE PCB Matrix Packages 3 4 1 2 >NAME >VALUE PCB Matrix Packages >NAME >VALUE >NAME >VALUE MENTOR 1270.1001, PCB Mounted 2-Way Right Angle LED Light Pipe, Bi-Level Clear Round Lens Transistors <author>Created by librarian@cadsoft.de</author> TO-236 ITT Intermetall >NAME >VALUE EAGLE Design Rules Die Standard-Design-Rules sind so gewählt, dass sie für die meisten Anwendungen passen. Sollte ihre Platine besondere Anforderungen haben, treffen Sie die erforderlichen Einstellungen hier und speichern die Design Rules unter einem neuen Namen ab. EAGLE Design Rules The default Design Rules have been set to cover a wide range of applications. Your particular design may have different requirements, so please make the necessary adjustments and save your customized design rules under a new name. Seeed Studio EAGLE Design Rules Since Version 6.2.2 text objects can contain more than one line, which will not be processed correctly with this version.