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26425b8623
ngff: silk screen cosmetics
Martin Schramm
2019-09-24 18:43:49 +0200
94d293bdb0
ngff: re-introduce and re-position OSHW logo and bott silk screen
Martin Schramm
2019-09-24 18:25:08 +0200
a2e0970835
ngff: repair one critical via for ERC passing
Martin Schramm
2019-09-24 16:51:50 +0200
861afe9e60
ngff: 2/2 make room for 2x5 header and route SIM2 signals there
Martin Schramm
2019-09-24 16:42:42 +0200
b9a0f747cb
ngff: make room for 2x5 header and route SIM2 signals there
Martin Schramm
2019-09-20 22:04:52 +0200
dd62b6547e
ngff: remove bogus packages names with '@1' by re-importing std lib
Martin Schramm
2019-09-19 19:20:35 +0200
8dcf136de6
ngff: move PCIe header 3mm inwards (solves OS#4210)
Martin Schramm
2019-09-19 19:15:48 +0200
3e103422c2
ngff: set R9 to 100k (solves OS#4209)
Martin Schramm
2019-09-17 17:44:02 +0200
aaaf260b1f
ngff: route all four ANTCTLn signals on bottom layer (fixes OS#4187)
Martin Schramm
2019-09-17 15:01:11 +0200
deccb4f960
ngff: repair M.2/NGFF footprint (see SYS#4661)
Martin Schramm
2019-09-17 13:35:36 +0200
102d73a760
Merge branch 'laforge/ngff-breakout'
Harald Welte
2019-08-29 15:35:06 +0200
300180dd97
ngff: finishing work
Martin Schramm
2019-08-27 17:16:26 +0200
d4ed3daf17
ngff-breakout: almost ready
Martin Schramm
2019-08-15 21:29:43 +0200
4be5f434e9
ngff-breakout: intermediate state
Martin Schramm
2019-06-14 20:40:12 +0200
6830553c74
ngff-breakout: make 4layer PCB
Martin Schramm
2019-06-12 17:20:39 +0200
3ad642f19b
ngff-breakout: Update con-ngff.lbr to get PCIe lanes
Harald Welte
2019-05-29 13:06:10 +0200
7501689b2a
ngff-breakout: Partial migration over to NGFF
Harald Welte
2017-03-27 22:08:17 +0200
63e90df39f
ngff-breakout: Rename "mPCIe" -> "NGFF WWAN" and re-start version at v1
Harald Welte
2017-03-27 21:06:54 +0200
b824f0509c
Add ngff-breakout as copy of mpcie-breakout
Harald Welte
2017-03-27 21:04:04 +0200
2a0a6fd6cd
ngff: finishing work
laforge/ngff-breakout
Martin Schramm
2019-08-27 17:16:26 +0200
f63f995a7b
Merge branch 'laforge/ngff-breakout' of ssh://git.osmocom.org/osmo-small-hardware into laforge/ngff-breakout
Martin Schramm
2019-08-27 17:00:26 +0200
31ae1be9c6
sc14cvm-evb: Add attributes
Harald Welte
2019-08-16 17:58:49 +0200
76f7f9c6ac
ngff-breakout: almost ready
Martin Schramm
2019-08-15 21:29:43 +0200
a1874155d2
ngff-breakout: intermediate state
Martin Schramm
2019-06-14 20:40:12 +0200
8021eb2b0b
ngff-breakout: make 4layer PCB
Martin Schramm
2019-06-12 17:20:39 +0200
62b268fd49
ngff-breakout: Update con-ngff.lbr to get PCIe lanes
Harald Welte
2019-05-29 13:06:10 +0200
dca2fcdd31
ngff-breakout: Partial migration over to NGFF
Harald Welte
2017-03-27 22:08:17 +0200
6745f708c2
ngff-breakout: Rename "mPCIe" -> "NGFF WWAN" and re-start version at v1
Harald Welte
2017-03-27 21:06:54 +0200
b7b1dc991a
Add ngff-breakout as copy of mpcie-breakout
Harald Welte
2017-03-27 21:04:04 +0200
07df7129df
ngff-breakout: almost ready
Martin Schramm
2019-08-15 21:29:43 +0200
c5c776b7ce
add SC14CVMDECT module breakout board
Harald Welte
2019-08-07 20:22:28 +0200
8908096c70
v3 final with gerber output
ohm4_ocxo_v3
Harald Welte
2012-07-15 15:07:54 +0200
d9df109853
final v3 as it goes in pcb production
Harald Welte
2012-07-15 12:11:03 +0200
69f4bae1a9
update OHM4 OCXO, preliminary v3
Harald Welte
2012-07-15 00:08:30 +0200
ad725445da
remove .pro file, not needed
Harald Welte
2012-07-15 00:03:19 +0200
9ada13b2a2
update to version with PLL ic onboard
Harald Welte
2012-07-14 16:22:53 +0200
72388ffc29
initial import of OHM4 OCXO board
Harald Welte
2012-02-20 23:53:00 +0100
92713f418a
add gerber output of osm-nvs-gps v3
Harald Welte
2013-02-25 23:48:46 +0100
aaf079d3b6
avoid short-circuit of power LED
Harald Welte
2013-02-25 23:22:30 +0100
3c74775c93
update PDF schematics and placement to v2
ohm4_ocxo_v2
Harald Welte
2012-09-05 13:27:19 +0200
b4e6e08fed
add a power-indicator LED to the NVS board and tag it v2
Harald Welte
2012-05-01 20:22:45 +0200
afe1c2418e
initial import of osmo-nvs-gps project
Harald Welte
2012-02-20 23:40:42 +0100
ca1c5f166f
update gerbers...
Harald Welte
2013-11-26 11:12:00 +0100
58aedf51bc
don't put solder cream on SMA edge pads.
Harald Welte
2013-11-26 11:06:04 +0100
5bb3b21f56
component placement PDFs bottom and top
Harald Welte
2013-11-26 10:38:25 +0100
f050f336f2
re-generate geber (fiducials, labels on soldermask)
Harald Welte
2013-11-26 10:34:56 +0100
64f3000ff6
move fonts on bottom to soldermask layer (no silk screen rqd)
Harald Welte
2013-11-26 10:32:43 +0100
84d28da2d1
add fiducials for automatic mounting of components
Harald Welte
2013-11-26 10:32:18 +0100
5f08cd82e6
Specify LED series resistor as 100 Ohms
Harald Welte
2013-11-24 22:35:15 +0100
59403fe0d5
mark R1 as 'DNP' (no stub to U.FL connector)
Harald Welte
2013-11-24 22:32:02 +0100
e52cc5d731
add placement files for top and bottom
Harald Welte
2013-11-24 22:30:15 +0100
d32100e71f
import gerber output
Harald Welte
2013-11-24 22:28:11 +0100
db5e530345
add CAM file for generating gerber output
Harald Welte
2013-11-24 22:27:54 +0100
0679fbf23e
remove D45014F marking (seeedstudio)
Harald Welte
2013-11-24 22:26:31 +0100
2b68fcacb8
update the _brd.pdf to include the LED and R13 and correspond with schemstics
Harald Welte
2013-03-13 10:10:43 +0100
0cb278399a
add updated PDF schematics
Harald Welte
2012-07-12 12:07:48 +0200
cee9a8682d
approve various ERC changes
Harald Welte
2012-04-27 10:47:59 +0200
e008d9236b
re-merge my previous changes manually into the project
Harald Welte
2012-04-27 10:42:44 +0200
b8752f45e0
sylvains branch (ignores some of harald's changes)
Harald Welte
2012-04-27 10:37:47 +0200
b324e5353c
don't have two SERIAL_RXD labels but one RXD and one TXD
Harald Welte
2012-04-27 10:44:24 +0200
2c45271d5d
add ublox LEA6T evaluation board design, first version
Harald Welte
2012-04-27 10:31:00 +0200
6748fe27c1
Merge branch 'laforge/clock-gen-v2'
Harald Welte
2019-06-19 19:11:27 +0200
accdfd63c6
clock-generator: Move GND via to avoid overlap with N$15
Harald Welte
2019-06-19 19:02:43 +0200
e2cdc91a3a
<osmo-clock-gen: add more TVS for exposed signals, clean up and finish
Martin Schramm
2019-06-14 20:35:13 +0200
436048290a
osmo-clock-gen: capacitive coupling for XA input needed - added 100n
Martin Schramm
2019-06-13 16:37:33 +0200
c3f627affe
clock-generator: compacting + place MTA100 header (solves OSM#4050)
Martin Schramm
2019-06-12 19:47:09 +0200
425699d67a
clock-generator: changes adressing OSM#4050
Martin Schramm
2019-06-07 21:28:20 +0200
4cd9ee1bd7
clock-generator: insert changes discussed so far for v2
Martin Schramm
2019-05-30 00:02:11 +0200
e1714e7432
clock-generator: add tracking LDO, make PCB four layer
Martin Schramm
2019-05-16 20:02:44 +0200
cdaf319147
WIP: click-generator: Replace U3 (so far SAMD11) with SAMD21
Harald Welte
2019-04-06 19:45:55 +0200
33eb59d667
ngff-breakout: intermediate state
Martin Schramm
2019-06-14 20:40:12 +0200
e204867849
ngff-breakout: make 4layer PCB
Martin Schramm
2019-06-12 17:20:39 +0200
cf044860d4
ngff-breakout: Update con-ngff.lbr to get PCIe lanes
clock_gen-v2
Harald Welte
2019-05-29 13:06:10 +0200
d1e2dfa559
ngff-breakout: Partial migration over to NGFF
Harald Welte
2017-03-27 22:08:17 +0200
bf9d924180
ngff-breakout: Rename "mPCIe" -> "NGFF WWAN" and re-start version at v1
Harald Welte
2017-03-27 21:06:54 +0200
cd806b206c
Add ngff-breakout as copy of mpcie-breakout
Harald Welte
2017-03-27 21:04:04 +0200
a22d0b0efa
ngff-breakout: Update con-ngff.lbr to get PCIe lanes
Harald Welte
2019-05-29 13:06:10 +0200
85fc4063bb
sfp-*: add OSHW logo, fill ext'd attribs for BOM
Martin Schramm
2019-05-09 18:33:33 +0200
89cbce6ffb
sfp: update BOMs for both breakout and experimenter PCBs
Martin Schramm
2019-05-08 20:33:46 +0200
f37aa06c2a
clock-converter: Export BOM
Harald Welte
2019-02-14 22:06:36 +0100
22ad1c0a54
clock-converter: Add attributes with digikey links
Harald Welte
2019-02-14 20:55:49 +0100
6d4dd1bead
Clock converter for low phase noise sine -> square conversion
Harald Welte
2019-01-30 21:01:56 +0100
bbbd83c9dd
clock-gen: Add BOM information + PDF exports of schematics
Harald Welte
2019-01-28 12:38:59 +0100
0240e5c8c9
clock-gen: Update gpio spreadsheet with all assignments
Harald Welte
2019-01-27 19:17:06 +0100
fcc91db897
Merge branch 'laforge/clock-gen'
Harald Welte
2019-01-27 18:24:51 +0100
ff2d7b03e0
clock-gen: Minor changes; final version as ordered
Harald Welte
2019-01-27 18:17:36 +0100
51315a16ff
clock-gen: Cosmetic changes
Harald Welte
2019-01-27 18:02:10 +0100
c82c71b3c0
clock-gen: finish routing of PCB layout
Harald Welte
2019-01-27 17:00:46 +0100
73acd67b00
clock-gen: Connect EEPROM WP to GND to disable write-protect
Harald Welte
2019-01-26 21:21:47 +0100
69aea8bd5c
clock-gen: Add SPI; UEXT header; mounting holes; do layout/routing
Harald Welte
2019-01-26 20:57:42 +0100
40b61a84c9
clock-generator: Most of the layout
Harald Welte
2019-01-23 19:50:15 +0100
ef5f4655c8
clock-generator: More schematics work; initial placement/grouping
Harald Welte
2019-01-23 00:13:00 +0100
63b23976a7
clock-generator: More work on schematics (USB, UART, ESD)
Harald Welte
2019-01-21 22:43:27 +0100
bf89576eff
initial check-in of upcoming clock-generator board
Harald Welte
2019-01-16 22:11:39 +0100
680384cd6d
SFP: publish experimenter and breakout schematicss as pdf
Martin Schramm
2019-01-08 16:39:11 +0100
29cf4f0514
add SFP multi-source agreement to give context to the boards
Harald Welte
2018-10-06 21:15:17 +0200
3d507d68ef
sfp-breakout: X1 pin 5 missing connection to VCC_3V3
Harald Welte
2018-09-05 12:38:19 +0200
157dfbf79f
sfp: add part numbers for SFP conn and cage
Martin Schramm
2018-08-30 17:37:36 +0200
2c9fc33df4
mvuart: align JP2 in 0.1' grid with JP3 (solves OSM#3037)
Martin Schramm
2018-08-23 20:38:22 +0200
ad2df019cb
sfp-{breakout,experimenter}: Commit GERBER exports
sfp-v1
Harald Welte
2018-08-21 19:47:28 +0200