Commit Graph

290 Commits

Author SHA1 Message Date
Martin Schramm dd62b6547e ngff: remove bogus packages names with '@1' by re-importing std lib 2019-09-19 19:20:35 +02:00
Martin Schramm 8dcf136de6 ngff: move PCIe header 3mm inwards (solves OS#4210)
... and started OS#4211.
2019-09-19 19:15:48 +02:00
Martin Schramm 3e103422c2 ngff: set R9 to 100k (solves OS#4209) 2019-09-17 17:44:02 +02:00
Martin Schramm aaaf260b1f ngff: route all four ANTCTLn signals on bottom layer (fixes OS#4187) 2019-09-17 15:01:11 +02:00
Martin Schramm deccb4f960 ngff: repair M.2/NGFF footprint (see SYS#4661) 2019-09-17 13:35:36 +02:00
Harald Welte 102d73a760 Merge branch 'laforge/ngff-breakout' 2019-08-29 15:35:06 +02:00
Martin Schramm 300180dd97 ngff: finishing work 2019-08-29 15:33:28 +02:00
Martin Schramm d4ed3daf17 ngff-breakout: almost ready
missing: more vias, more ext. attributes (for BOM)
2019-08-29 15:33:21 +02:00
Martin Schramm 4be5f434e9 ngff-breakout: intermediate state 2019-08-29 15:33:17 +02:00
Martin Schramm 6830553c74 ngff-breakout: make 4layer PCB 2019-08-29 15:33:13 +02:00
Harald Welte 3ad642f19b ngff-breakout: Update con-ngff.lbr to get PCIe lanes 2019-08-29 15:33:09 +02:00
Harald Welte 7501689b2a ngff-breakout: Partial migration over to NGFF
The mPCIe slot has been removed and the NGFF slot added. Basic
connections have been made in the schematics, but it's far from being
complete.  No effort on the PCB routing has been made so far.
2019-08-29 15:33:04 +02:00
Harald Welte 63e90df39f ngff-breakout: Rename "mPCIe" -> "NGFF WWAN" and re-start version at v1 2019-08-29 15:33:00 +02:00
Harald Welte b824f0509c Add ngff-breakout as copy of mpcie-breakout
... ngff specific modifications will follow
2019-08-29 15:32:55 +02:00
Harald Welte 31ae1be9c6 sc14cvm-evb: Add attributes 2019-08-16 17:58:49 +02:00
Harald Welte c5c776b7ce add SC14CVMDECT module breakout board 2019-08-07 20:22:28 +02:00
Harald Welte 8908096c70 v3 final with gerber output 2019-06-22 11:59:27 +02:00
Harald Welte d9df109853 final v3 as it goes in pcb production
* smash components and move labels to where they can be read
* add indication of + / GND to X3/X4
* re-route some traces to ensure sufficient distance between them
* make all traces 0.508 mm wide, even signal traces.
2019-06-22 11:59:27 +02:00
Harald Welte 69f4bae1a9 update OHM4 OCXO, preliminary v3
* use new LDO (single LDO with range up to 12V input)
 * add U.FL clock input (instead of OCXO as source)
 * no parallel, but series resistors to trimmer
 * allow output of PLL to be fed through resistive divider
2019-06-22 11:59:27 +02:00
Harald Welte ad725445da remove .pro file, not needed 2019-06-22 11:59:27 +02:00
Harald Welte 9ada13b2a2 update to version with PLL ic onboard 2019-06-22 11:59:27 +02:00
Harald Welte 72388ffc29 initial import of OHM4 OCXO board 2019-06-22 11:59:26 +02:00
Harald Welte 92713f418a add gerber output of osm-nvs-gps v3 2019-06-22 11:55:44 +02:00
Harald Welte aaf079d3b6 avoid short-circuit of power LED 2019-06-22 11:55:44 +02:00
Harald Welte 3c74775c93 update PDF schematics and placement to v2 2019-06-22 11:55:44 +02:00
Harald Welte b4e6e08fed add a power-indicator LED to the NVS board and tag it v2 2019-06-22 11:55:43 +02:00
Harald Welte afe1c2418e initial import of osmo-nvs-gps project
This is a small eval board for the NVS GPS/GLONASS/GALILEO module,
exporting UARTs on headers.
2019-06-22 11:55:43 +02:00
Harald Welte ca1c5f166f update gerbers... 2019-06-22 11:52:46 +02:00
Harald Welte 58aedf51bc don't put solder cream on SMA edge pads.
The sma edge connectors are hand soldered after the SMT soldering
is already done.  We don't want to have solder paste on them...
2019-06-22 11:52:46 +02:00
Harald Welte 5bb3b21f56 component placement PDFs bottom and top 2019-06-22 11:52:46 +02:00
Harald Welte f050f336f2 re-generate geber (fiducials, labels on soldermask) 2019-06-22 11:52:46 +02:00
Harald Welte 64f3000ff6 move fonts on bottom to soldermask layer (no silk screen rqd) 2019-06-22 11:52:46 +02:00
Harald Welte 84d28da2d1 add fiducials for automatic mounting of components 2019-06-22 11:52:46 +02:00
Harald Welte 5f08cd82e6 Specify LED series resistor as 100 Ohms 2019-06-22 11:52:46 +02:00
Harald Welte 59403fe0d5 mark R1 as 'DNP' (no stub to U.FL connector) 2019-06-22 11:52:46 +02:00
Harald Welte e52cc5d731 add placement files for top and bottom 2019-06-22 11:52:46 +02:00
Harald Welte d32100e71f import gerber output 2019-06-22 11:52:46 +02:00
Harald Welte db5e530345 add CAM file for generating gerber output 2019-06-22 11:52:46 +02:00
Harald Welte 0679fbf23e remove D45014F marking (seeedstudio) 2019-06-22 11:52:46 +02:00
Harald Welte 2b68fcacb8 update the _brd.pdf to include the LED and R13 and correspond with schemstics 2019-06-22 11:52:46 +02:00
Harald Welte 0cb278399a add updated PDF schematics 2019-06-22 11:52:46 +02:00
Harald Welte cee9a8682d approve various ERC changes 2019-06-22 11:52:46 +02:00
Harald Welte e008d9236b re-merge my previous changes manually into the project 2019-06-22 11:52:46 +02:00
Harald Welte b8752f45e0 sylvains branch (ignores some of harald's changes) 2019-06-22 11:52:46 +02:00
Harald Welte b324e5353c don't have two SERIAL_RXD labels but one RXD and one TXD 2019-06-22 11:52:46 +02:00
Harald Welte 2c45271d5d add ublox LEA6T evaluation board design, first version 2019-06-22 11:52:46 +02:00
Harald Welte 6748fe27c1 Merge branch 'laforge/clock-gen-v2' 2019-06-19 19:11:27 +02:00
Harald Welte accdfd63c6 clock-generator: Move GND via to avoid overlap with N$15 2019-06-19 19:10:51 +02:00
Martin Schramm e2cdc91a3a <osmo-clock-gen: add more TVS for exposed signals, clean up and finish 2019-06-19 19:10:50 +02:00
Martin Schramm 436048290a osmo-clock-gen: capacitive coupling for XA input needed - added 100n
This was a remark by tnt, thanks.
2019-06-19 19:10:50 +02:00