* smash components and move labels to where they can be read
* add indication of + / GND to X3/X4
* re-route some traces to ensure sufficient distance between them
* make all traces 0.508 mm wide, even signal traces.
* use new LDO (single LDO with range up to 12V input)
* add U.FL clock input (instead of OCXO as source)
* no parallel, but series resistors to trimmer
* allow output of PLL to be fed through resistive divider