153 lines
4.0 KiB
C
153 lines
4.0 KiB
C
/* Code to control digital step attenuators of the sysmocom RFDN board
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* (C) 2017 by Harald Welte <laforge@gnumonks.org>
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*/
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#include <stdio.h>
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#include <errno.h>
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#include <libopencm3/stm32/gpio.h>
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#include <libopencm3/stm32/rcc.h>
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#include "attenuator.h"
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#include "utils.h"
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static const struct attenuator_cfg *g_att_cfg;
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static struct attenuator_state **g_att_state;
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static void delay()
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{
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volatile uint32_t i;
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for (i = 0; i < 10000; i++) { }
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}
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/* create a positive pulse on a given GPIO line */
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static void gpio_pulse(uint32_t bank, uint32_t nr)
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{
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gpio_set(bank, nr);
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/* FIXME: Some delay, 30ns for LE or CLK */
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delay();
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gpio_clear(bank, nr);
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}
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/* set the data line to high or low */
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static void gpio_set_data(int high)
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{
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if (high)
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gpio_set(g_att_cfg->gpio_data.bank, g_att_cfg->gpio_data.gpio_nr);
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else
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gpio_clear(g_att_cfg->gpio_data.bank, g_att_cfg->gpio_data.gpio_nr);
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}
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/* pulse the clock line with one positive pulse */
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static void gpio_pulse_clk(void)
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{
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gpio_pulse(g_att_cfg->gpio_clock.bank, g_att_cfg->gpio_clock.gpio_nr);
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}
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/* set a given attenuator to a given value
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* \param channel The RF channel (0..7)
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* \param stage Attenuator stage (0..1)
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* \param value in quarter-dB (0..124)
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*/
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int attenuator_set(uint8_t channel, uint8_t stage, uint8_t val_qdb)
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{
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uint8_t val = val_qdb/4; /* whole dB for this attenuator */
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const struct attenuator_def *ad;
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int i;
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if (!g_att_cfg)
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return -ENODEV;
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if (channel >= g_att_cfg->num_channels)
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return -ENODEV;
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if (stage >= g_att_cfg->channels[channel].num_stages)
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return -ENODEV;
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ad = &g_att_cfg->channels[channel].stage[stage];
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if (val > 0x1f)
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return -ERANGE;
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/* The shift register should be loaded while LE is held low to
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* prevent the attenuator value from changing as data is
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* entered */
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for (i = 5; i >= 0; i--) {
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unsigned int bit = ((val >> i) & 1);
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gpio_set_data(bit);
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gpio_pulse_clk();
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}
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/* The LE input should then be toggled HIGH and brought LOW
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* again, latching the new data. Minimum LE pulse width is 30ns */
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gpio_pulse(ad->le.bank, ad->le.gpio_nr);
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/* actual value we have set may not be exactly what was requested */
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g_att_state[channel][stage].value_qdB.current = val*4;
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return 0;
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}
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/* get current attenuator value in quarter-dB */
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int attenuator_get(uint8_t channel, uint8_t stage, enum attenuator_value av)
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{
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if (!g_att_cfg)
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return -ENODEV;
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if (channel >= g_att_cfg->num_channels)
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return -ENODEV;
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if (stage >= g_att_cfg->channels[channel].num_stages)
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return -ENODEV;
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switch (av) {
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case ATT_VAL_CURRENT:
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return g_att_state[channel][stage].value_qdB.current;
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case ATT_VAL_STARTUP:
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return g_att_state[channel][stage].value_qdB.startup;
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default:
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return -EINVAL;
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}
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}
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/* initialize the attenuator driver */
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void attenuator_init(const struct attenuator_cfg *cfg,
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struct attenuator_state **state)
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{
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uint32_t banks[6] = { GPIOA, GPIOB, GPIOC, GPIOD, GPIOE, GPIOF };
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const uint32_t periph[6] = { RCC_GPIOA, RCC_GPIOB, RCC_GPIOC,
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RCC_GPIOD, RCC_GPIOE, RCC_GPIOF };
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uint32_t pins[6] = {0, 0, 0, 0, 0, 0};
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unsigned int i, j, k;
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g_att_cfg = cfg;
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g_att_state = state;
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/* collect the bit mask of all LE pins for each bank */
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for (i = 0; i < g_att_cfg->num_channels; i++) {
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const struct attenuator_channel_def *ch = &g_att_cfg->channels[i];
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for (j = 0; j < ch->num_stages; j++) {
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const struct attenuator_def *at = &ch->stage[j];
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for (k = 0; k < ARRAY_SIZE(banks); k++) {
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if (at->le.bank != banks[k])
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continue;
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pins[k] |= at->le.gpio_nr;
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}
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}
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}
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/* add the shared DATA / CLOCK pins */
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for (k = 0; k < ARRAY_SIZE(banks); k++) {
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if (g_att_cfg->gpio_clock.bank == banks[k])
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pins[k] |= g_att_cfg->gpio_clock.gpio_nr;
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if (g_att_cfg->gpio_data.bank == banks[k])
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pins[k] |= g_att_cfg->gpio_data.gpio_nr;
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}
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/* configure the GPIO of each bank based on he collected pin-bitmasks */
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for (k = 0; k < ARRAY_SIZE(banks); k++) {
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if (!pins[k])
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continue;
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rcc_periph_clock_enable(periph[k]);
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gpio_set_mode(banks[k], GPIO_MODE_OUTPUT_2_MHZ, GPIO_CNF_OUTPUT_PUSHPULL, pins[k]);
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}
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}
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