WIP: support for STM32F051 in addition to STM32F103
Related: SYS#5410
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8074b2cdc4
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645ed3a795
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@ -8,6 +8,13 @@
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#include <librfn/ringbuf.h>
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/* STM32F0 has slightly different status register #defines */
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#ifdef USART_ISR_RXNE
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#define USART_SR_RXNE USART_ISR_RXNE
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#define USART_SR_TXE USART_ISR_TXE
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#define USART_SR(x) USART_ISR(x)
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#endif
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/* picolibc iob implementation for non-blocking I/O on USART via ring-buffer */
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static uint32_t stdio_usart;
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@ -21,13 +21,16 @@ BINARY = rfdsatt
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OBJS = attenuator.o board_rfdsatt_4ch.o
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# when building for M0
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#LDSCRIPT = ./stm32f051-openblt.ld
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#LIBNAME = opencm3_stm32f0
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#DEFS += -DSTM32F0
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#FP_FLAGS ?= -msoft-float
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#ARCH_FLAGS = -mthumb -mcpu=cortex-m3 $(FP_FLAGS)
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LDSCRIPT = ./stm32f103-openblt.ld
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# include ../../Makefile.include
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LIBNAME = opencm3_stm32f1
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DEFS += -DSTM32F1
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FP_FLAGS ?= -msoft-float
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ARCH_FLAGS = -mthumb -mcpu=cortex-m3 $(FP_FLAGS) -mfix-cortex-m3-ldrd
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@ -148,6 +148,10 @@ void attenuator_init(const struct attenuator_cfg *cfg,
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if (!pins[k])
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continue;
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rcc_periph_clock_enable(periph[k]);
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#ifdef STM32F1
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gpio_set_mode(banks[k], GPIO_MODE_OUTPUT_2_MHZ, GPIO_CNF_OUTPUT_PUSHPULL, pins[k]);
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#else
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gpio_mode_setup(banks[k], GPIO_MODE_OUTPUT, 0, pins[k]);
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#endif
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}
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}
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@ -84,18 +84,24 @@ static void i2c_setup(void)
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{
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rcc_periph_clock_enable(RCC_I2C1);
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#ifdef STM32F1
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gpio_set_mode(GPIOB, GPIO_MODE_OUTPUT_50_MHZ,
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GPIO_CNF_OUTPUT_ALTFN_OPENDRAIN,
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GPIO_I2C1_SCL | GPIO_I2C1_SDA);
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#else
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gpio_set_af(GPIOB, GPIO_AF1, GPIO8 | GPIO9);
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#endif
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/* disable before making config changes */
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i2c_peripheral_disable(I2C1);
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#ifdef STM32F1
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/* APB1 runs at 24 MHz */
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i2c_set_clock_frequency(I2C1, I2C_CR2_FREQ_24MHZ);
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#endif
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/* 400 kHz fast mode I2C */
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//i2c_set_fast_mode(I2C1);
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i2c_set_speed(I2C1, i2c_speed_fm_400k, 24);
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//...
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@ -107,8 +113,12 @@ static void usart_setup(void)
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/* USART1: connected to debug header */
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/* Setup GPIO pin GPIO_USART1_TX. */
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#ifdef STM32F1
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gpio_set_mode(GPIOA, GPIO_MODE_OUTPUT_50_MHZ,
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GPIO_CNF_OUTPUT_ALTFN_PUSHPULL, GPIO_USART1_TX);
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#else
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gpio_set_af(GPIOA, GPIO_AF1, GPIO9 | GPIO10);
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#endif
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/* Setup UART parameters. */
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usart_set_baudrate(USART1, 115200);
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usart_set_databits(USART1, 8);
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@ -122,8 +132,12 @@ static void usart_setup(void)
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/* USART2: connected to 2.5mm stereo jack */
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/* Setup GPIO pin GPIO_USART2_TX. */
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#ifdef STM32F1
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gpio_set_mode(GPIOA, GPIO_MODE_OUTPUT_50_MHZ,
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GPIO_CNF_OUTPUT_ALTFN_PUSHPULL, GPIO_USART2_TX);
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#else
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gpio_set_af(GPIOA, GPIO_AF1, GPIO2 | GPIO13);
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#endif
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/* Setup UART parameters. */
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usart_set_baudrate(USART2, 115200);
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usart_set_databits(USART2, 8);
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@ -137,9 +151,13 @@ static void usart_setup(void)
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static void gpio_setup(void)
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{
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#ifdef STM32F1
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/* Set GPIO15 (in GPIO port B) to 'output push-pull'. */
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gpio_set_mode(GPIOB, GPIO_MODE_OUTPUT_2_MHZ,
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GPIO_CNF_OUTPUT_PUSHPULL, GPIO15);
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#else
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gpio_mode_setup(GPIOB, GPIO_MODE_OUTPUT, GPIO_PUPD_NONE, GPIO15);
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#endif
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}
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/***********************************************************************
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@ -0,0 +1,32 @@
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/*
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* This file is part of the libopencm3 project.
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*
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* Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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/* Linker script for sysmcoom rfdn (STM32F051, 64K flash, 8K RAM). */
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/* Define memory regions. */
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MEMORY
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{
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/* first 0x2000 bytes reserved for bootloader */
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rom (rx) : ORIGIN = 0x08002000, LENGTH = 62K
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ram (rwx) : ORIGIN = 0x20000000, LENGTH = 8K
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}
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/* Include the common ld script. */
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INCLUDE cortex-m-generic.ld
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