CMSIS-CORE: Overview

| CMSIS-CORE Version 5.0.1 CMSIS-CORE support for Cortex-M processor-based devices

- Main Page
- Usage and Description
- Reference

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Overview

CMSIS-CORE implements the basic run-time system for a Cortex-M device and gives the user access to the processor core and the device peripherals. In detail it defines:

- Hardware Abstraction Layer (HAL) for Cortex-M processor registers with standardized definitions for the SysTick, NVIC, System Control Block registers, MPU registers, FPU registers, and core access functions.
- System exception names to interface to system exceptions without having compatibility issues.
- Methods to organize header files that makes it easy to learn new Cortex-M microcontroller products and improve software portability. This includes naming conventions for device-specific interrupts.
- Methods for system initialization to be used by each MCU vendor. For example, the standardized SystemInit() function is essential for configuring the clock system of the device.
- Intrinsic functions used to generate CPU instructions that are not supported by standard C functions.
- A variable to determine the system clock frequency which simplifies the setup the SysTick timer.

The following sections provide details about the CMSIS-CORE:

- Using CMSIS in Embedded Applications describes the project setup and shows a simple program example.
- Using TrustZone® for ARMv8-M describes how to use the security extensions available in the ARMv8-M architecture.
- CMSIS-Core Device Templates describes the files of the CMSIS-CORE in detail and explains how to adapt template files provided by ARM to silicon vendor devices.
- MISRA-C Deviations describes the violations to the MISRA standard.
- Reference describe the features and functions of the Device Header File <device.h> in detail.
- Data Structures describe the data structures of the Device Header File <device.h> in detail.

## CMSIS-CORE in ARM::CMSIS Pack

Files relevant to CMSIS-CORE are present in the following ARM::CMSIS directories:

File/Folder | Content
--- | ---
CMSIS\Documentation\Core | This documentation
CMSIS\Include | CMSIS-CORE header files (for example core_cm3.h, core_cmInstr.h, etc.)
Device | ARM reference implementations of Cortex-M devices
Device\_Template_Vendor | CMSIS-Core Device Templates for extension by silicon vendors

# Processor Support

CMSIS supports the complete range of Cortex-M processors (with exception of Cortex-M1) and the ARMv8-M architecture including security extensions.

## Cortex-M Reference Manuals

The Cortex-M Reference Manuals are generic user guides for devices that implement the various ARM Cortex-M processors. These manuals contain the programmers model and detailed information about the core peripherals.

- Cortex-M0 Devices Generic User Guide (ARMv6-M architecture)
- Cortex-M0+ Devices Generic User Guide (ARMv6-M architecture)
- Cortex-M3 Devices Generic User Guide (ARMv7-M architecture)
- Cortex-M4 Devices Generic User Guide (ARMv7-M architecture)
- Cortex-M7 Devices Generic User Guide (ARMv7-M architecture)

Reference manuals for Cortex-M23 and Cortex-M33 where not available at the time of release.

## ARMv8-M Architecture

ARMv8-M introduces two profiles Baseline (for power and area constrained applications) and Mainline (full-featured with optional SIMD, floating-point, and co-processor extensions). Both ARMv8-M profiles are supported by CMSIS.

The ARMv8-M Architecture is described in the ARMv8-M Architecture Reference Manual.

# Tested and Verified Toolchains

The CMSIS-CORE CMSIS-Core Device Templates supplied by ARM have been tested and verified with the following toolchains:

- ARM: ARM Compiler V5.6
- ARM: ARM Compiler V6.6 (for Cortex-M23, Cortex-M33, ARMv8-M)
- GNU: GNU Tools ARM Embedded 5.4 2016q3
- IAR: IAR Embedded Workbench Kickstart Edition V6.10