517 lines
14 KiB
C
517 lines
14 KiB
C
/** @addtogroup usart_file
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@author @htmlonly © @endhtmlonly 2009 Uwe Hermann <uwe@hermann-uwe.de>
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This library supports the USART/UART in the STM32F series
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of ARM Cortex Microcontrollers by ST Microelectronics.
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Devices can have up to 3 USARTs and 2 UARTs.
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*/
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/*
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* This file is part of the libopencm3 project.
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*
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* Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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/**@{*/
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#include <libopencm3/stm32/usart.h>
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#include <libopencm3/stm32/rcc.h>
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/*---------------------------------------------------------------------------*/
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/** @brief USART Set Baudrate.
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The baud rate is computed from the APB high-speed prescaler clock (for
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USART1/6) or the APB low-speed prescaler clock (for other USARTs). These values
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must be correctly set before calling this function (refer to the
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rcc_clock_setup-* functions in RCC).
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@param[in] usart unsigned 32 bit. USART block register address base @ref
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usart_reg_base
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@param[in] baud unsigned 32 bit. Baud rate specified in Hz.
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*/
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void usart_set_baudrate(uint32_t usart, uint32_t baud)
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{
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uint32_t clock = rcc_ppre1_frequency;
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#if defined STM32F2 || defined STM32F4
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if ((usart == USART1) ||
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(usart == USART6)) {
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clock = rcc_ppre2_frequency;
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}
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#else
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if (usart == USART1) {
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clock = rcc_ppre2_frequency;
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}
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#endif
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#if defined STM32F3
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if (usart == USART1) {
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/* usart1 can be clocked from appart from pclk1 also from sysclk,
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hsi and lse. Please improve! */
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clock = rcc_ppre2_frequency;
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}
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else {
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/*There are from usart1 to usart5 interfaces in the stm32f3*/
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clock = rcc_ppre1_frequency;
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}
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#endif
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/*
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* Yes it is as simple as that. The reference manual is
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* talking about fractional calculation but it seems to be only
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* marketting babble to sound awesome. It is nothing else but a
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* simple divider to generate the correct baudrate.
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*
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* Note: We round() the value rather than floor()ing it, for more
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* accurate divisor selection.
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*/
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USART_BRR(usart) = ((2 * clock) + baud) / (2 * baud);
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}
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/*---------------------------------------------------------------------------*/
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/** @brief USART Set Word Length.
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The word length is set to 8 or 9 bits. Note that the last bit will be a parity
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bit if parity is enabled, in which case the data length will be 7 or 8 bits
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respectively.
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@param[in] usart unsigned 32 bit. USART block register address base @ref
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usart_reg_base
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@param[in] bits unsigned 32 bit. Word length in bits 8 or 9.
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*/
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void usart_set_databits(uint32_t usart, uint32_t bits)
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{
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if (bits == 8) {
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USART_CR1(usart) &= ~USART_CR1_M; /* 8 data bits */
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} else {
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USART_CR1(usart) |= USART_CR1_M; /* 9 data bits */
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}
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}
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/*---------------------------------------------------------------------------*/
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/** @brief USART Set Stop Bit(s).
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The stop bits are specified as 0.5, 1, 1.5 or 2.
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@param[in] usart unsigned 32 bit. USART block register address base @ref
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usart_reg_base
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@param[in] stopbits unsigned 32 bit. Stop bits @ref usart_cr2_stopbits.
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*/
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void usart_set_stopbits(uint32_t usart, uint32_t stopbits)
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{
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uint32_t reg32;
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reg32 = USART_CR2(usart);
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reg32 = (reg32 & ~USART_CR2_STOPBITS_MASK) | stopbits;
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USART_CR2(usart) = reg32;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief USART Set Parity.
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The parity bit can be selected as none, even or odd.
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@param[in] usart unsigned 32 bit. USART block register address base @ref
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usart_reg_base
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@param[in] parity unsigned 32 bit. Parity @ref usart_cr1_parity.
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*/
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void usart_set_parity(uint32_t usart, uint32_t parity)
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{
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uint32_t reg32;
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reg32 = USART_CR1(usart);
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reg32 = (reg32 & ~USART_PARITY_MASK) | parity;
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USART_CR1(usart) = reg32;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief USART Set Rx/Tx Mode.
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The mode can be selected as Rx only, Tx only or Rx+Tx.
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@param[in] usart unsigned 32 bit. USART block register address base @ref
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usart_reg_base
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@param[in] mode unsigned 32 bit. Mode @ref usart_cr1_mode.
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*/
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void usart_set_mode(uint32_t usart, uint32_t mode)
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{
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uint32_t reg32;
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reg32 = USART_CR1(usart);
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reg32 = (reg32 & ~USART_MODE_MASK) | mode;
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USART_CR1(usart) = reg32;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief USART Set Hardware Flow Control.
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The flow control bit can be selected as none, RTS, CTS or RTS+CTS.
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@param[in] usart unsigned 32 bit. USART block register address base @ref
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usart_reg_base
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@param[in] flowcontrol unsigned 32 bit. Flowcontrol @ref usart_cr3_flowcontrol.
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*/
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void usart_set_flow_control(uint32_t usart, uint32_t flowcontrol)
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{
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uint32_t reg32;
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reg32 = USART_CR3(usart);
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reg32 = (reg32 & ~USART_FLOWCONTROL_MASK) | flowcontrol;
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USART_CR3(usart) = reg32;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief USART Enable.
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@param[in] usart unsigned 32 bit. USART block register address base @ref
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usart_reg_base
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*/
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void usart_enable(uint32_t usart)
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{
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USART_CR1(usart) |= USART_CR1_UE;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief USART Disable.
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At the end of the current frame, the USART is disabled to reduce power.
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@param[in] usart unsigned 32 bit. USART block register address base @ref
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usart_reg_base
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*/
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void usart_disable(uint32_t usart)
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{
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USART_CR1(usart) &= ~USART_CR1_UE;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief USART Send a Data Word.
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@param[in] usart unsigned 32 bit. USART block register address base @ref
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usart_reg_base
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@param[in] data unsigned 16 bit.
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*/
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void usart_send(uint32_t usart, uint16_t data)
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{
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/* Send data. */
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#if !defined(STM32F3)
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USART_DR(usart) = (data & USART_DR_MASK);
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#else
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USART_TDR(usart) = (data & USART_TDR_MASK);
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#endif
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}
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/*---------------------------------------------------------------------------*/
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/** @brief USART Read a Received Data Word.
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If parity is enabled the MSB (bit 7 or 8 depending on the word length) is the
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parity bit.
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@param[in] usart unsigned 32 bit. USART block register address base @ref
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usart_reg_base
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@returns unsigned 16 bit data word.
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*/
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uint16_t usart_recv(uint32_t usart)
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{
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/* Receive data. */
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#if !defined(STM32F3)
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return USART_DR(usart) & USART_DR_MASK;
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#else
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return USART_RDR(usart) & USART_RDR_MASK;
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#endif
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}
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/*---------------------------------------------------------------------------*/
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/** @brief USART Wait for Transmit Data Buffer Empty
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Blocks until the transmit data buffer becomes empty and is ready to accept the
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next data word.
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@param[in] usart unsigned 32 bit. USART block register address base @ref
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usart_reg_base
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*/
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void usart_wait_send_ready(uint32_t usart)
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{
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/* Wait until the data has been transferred into the shift register. */
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#if !defined(STM32F3)
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while ((USART_SR(usart) & USART_SR_TXE) == 0);
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#else
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while ((USART_ISR(usart) & USART_ISR_TXE) == 0);
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#endif
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}
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/*---------------------------------------------------------------------------*/
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/** @brief USART Wait for Received Data Available
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Blocks until the receive data buffer holds a valid received data word.
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@param[in] usart unsigned 32 bit. USART block register address base @ref
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usart_reg_base
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*/
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void usart_wait_recv_ready(uint32_t usart)
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{
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/* Wait until the data is ready to be received. */
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#if !defined(STM32F3)
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while ((USART_SR(usart) & USART_SR_RXNE) == 0);
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#else
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while ((USART_ISR(usart) & USART_ISR_RXNE) == 0);
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#endif
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}
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/*---------------------------------------------------------------------------*/
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/** @brief USART Send Data Word with Blocking
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Blocks until the transmit data buffer becomes empty then writes the next data
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word for transmission.
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@param[in] usart unsigned 32 bit. USART block register address base @ref
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usart_reg_base
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@param[in] data unsigned 16 bit.
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*/
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void usart_send_blocking(uint32_t usart, uint16_t data)
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{
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usart_wait_send_ready(usart);
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usart_send(usart, data);
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}
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/*---------------------------------------------------------------------------*/
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/** @brief USART Read a Received Data Word with Blocking.
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Wait until a data word has been received then return the word.
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@param[in] usart unsigned 32 bit. USART block register address base @ref
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usart_reg_base
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@returns unsigned 16 bit data word.
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*/
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uint16_t usart_recv_blocking(uint32_t usart)
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{
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usart_wait_recv_ready(usart);
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return usart_recv(usart);
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}
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/*---------------------------------------------------------------------------*/
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/** @brief USART Receiver DMA Enable.
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DMA is available on:
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@li USART1 Rx DMA1 channel 5.
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@li USART2 Rx DMA1 channel 6.
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@li USART3 Rx DMA1 channel 3.
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@li UART4 Rx DMA2 channel 3.
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@param[in] usart unsigned 32 bit. USART block register address base @ref
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usart_reg_base
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*/
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void usart_enable_rx_dma(uint32_t usart)
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{
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USART_CR3(usart) |= USART_CR3_DMAR;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief USART Receiver DMA Disable.
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@param[in] usart unsigned 32 bit. USART block register address base @ref
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usart_reg_base
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*/
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void usart_disable_rx_dma(uint32_t usart)
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{
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USART_CR3(usart) &= ~USART_CR3_DMAR;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief USART Transmitter DMA Enable.
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DMA is available on:
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@li USART1 Tx DMA1 channel 4.
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@li USART2 Tx DMA1 channel 7.
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@li USART3 Tx DMA1 channel 2.
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@li UART4 Tx DMA2 channel 5.
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@param[in] usart unsigned 32 bit. USART block register address base @ref
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usart_reg_base
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*/
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void usart_enable_tx_dma(uint32_t usart)
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{
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USART_CR3(usart) |= USART_CR3_DMAT;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief USART Transmitter DMA Disable.
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@param[in] usart unsigned 32 bit. USART block register address base @ref
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usart_reg_base
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*/
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void usart_disable_tx_dma(uint32_t usart)
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{
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USART_CR3(usart) &= ~USART_CR3_DMAT;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief USART Receiver Interrupt Enable.
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@param[in] usart unsigned 32 bit. USART block register address base @ref
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usart_reg_base
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*/
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void usart_enable_rx_interrupt(uint32_t usart)
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{
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USART_CR1(usart) |= USART_CR1_RXNEIE;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief USART Receiver Interrupt Disable.
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@param[in] usart unsigned 32 bit. USART block register address base @ref
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usart_reg_base
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*/
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void usart_disable_rx_interrupt(uint32_t usart)
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{
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USART_CR1(usart) &= ~USART_CR1_RXNEIE;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief USART Transmitter Interrupt Enable.
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@param[in] usart unsigned 32 bit. USART block register address base @ref
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usart_reg_base
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*/
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void usart_enable_tx_interrupt(uint32_t usart)
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{
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USART_CR1(usart) |= USART_CR1_TXEIE;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief USART Transmitter Interrupt Disable.
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@param[in] usart unsigned 32 bit. USART block register address base @ref
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usart_reg_base
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*/
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void usart_disable_tx_interrupt(uint32_t usart)
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{
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USART_CR1(usart) &= ~USART_CR1_TXEIE;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief USART Error Interrupt Enable.
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@param[in] usart unsigned 32 bit. USART block register address base @ref
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usart_reg_base
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*/
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void usart_enable_error_interrupt(uint32_t usart)
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{
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USART_CR3(usart) |= USART_CR3_EIE;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief USART Error Interrupt Disable.
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@param[in] usart unsigned 32 bit. USART block register address base @ref
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usart_reg_base
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*/
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void usart_disable_error_interrupt(uint32_t usart)
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{
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USART_CR3(usart) &= ~USART_CR3_EIE;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief USART Read a Status Flag.
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@param[in] usart unsigned 32 bit. USART block register address base @ref
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usart_reg_base
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@param[in] flag Unsigned int32. Status register flag @ref usart_sr_flags.
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@returns boolean: flag set.
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*/
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bool usart_get_flag(uint32_t usart, uint32_t flag)
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{
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#if !defined(STM32F3)
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return ((USART_SR(usart) & flag) != 0);
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#else
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return ((USART_ISR(usart) & flag) != 0);
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#endif
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}
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/*---------------------------------------------------------------------------*/
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/** @brief USART Return Interrupt Source.
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Returns true if the specified interrupt flag (IDLE, RXNE, TC, TXE or OE) was
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set and the interrupt was enabled. If the specified flag is not an interrupt
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flag, the function returns false.
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@todo These are the most important interrupts likely to be used. Others
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relating to LIN break, and error conditions in multibuffer communication, need
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to be added for completeness.
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@param[in] usart unsigned 32 bit. USART block register address base @ref
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usart_reg_base
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@param[in] flag Unsigned int32. Status register flag @ref usart_sr_flags.
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@returns boolean: flag and interrupt enable both set.
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*/
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bool usart_get_interrupt_source(uint32_t usart, uint32_t flag)
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{
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#if !defined(STM32F3)
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uint32_t flag_set = (USART_SR(usart) & flag);
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/* IDLE, RXNE, TC, TXE interrupts */
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if ((flag >= USART_SR_IDLE) && (flag <= USART_SR_TXE)) {
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#else
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uint32_t flag_set = (USART_ISR(usart) & flag);
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/* IDLE, RXNE, TC, TXE interrupts */
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if ((flag >= USART_ISR_IDLE) && (flag <= USART_ISR_TXE)) {
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#endif
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return ((flag_set & USART_CR1(usart)) != 0);
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/* Overrun error */
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#if !defined(STM32F3)
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} else if (flag == USART_SR_ORE) {
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#else
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} else if (flag == USART_ISR_ORE) {
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#endif
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return flag_set && (USART_CR3(usart) & USART_CR3_CTSIE);
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}
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return false;
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}
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/**@}*/
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