79 lines
2.0 KiB
C
79 lines
2.0 KiB
C
/*
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* This file is part of the libopenstm32 project.
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*
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* Copyright (C) 2010 Uwe Hermann <uwe@hermann-uwe.de>
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <libopenstm32/rcc.h>
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#include <libopenstm32/rtc.h>
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void rtc_init(void)
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{
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/* Enable power and backup interface clocks. */
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RCC_APB1ENR |= (PWREN | BKPEN);
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/* Enable access to the backup registers and the RTC. */
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/* TODO: PWR component not yet implemented in libopenstm32. */
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/* PWR_CR |= PWR_CR_DBP; */
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/* TODO: Wait for the RSF bit in RTC_CRL to be set by hardware? */
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}
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void rtc_enter_config_mode(void)
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{
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u32 reg32;
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/* Wait until the RTOFF bit is 1 (no RTC register writes ongoing). */
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while ((reg32 = (RTC_CRL & RTC_CRL_RTOFF)) == 0);
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/* Enter configuration mode. */
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RTC_CRL |= RTC_CRL_CNF;
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}
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void rtc_exit_config_mode(void)
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{
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u32 reg32;
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/* Exit configuration mode. */
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RTC_CRL &= ~RTC_CRL_CNF;
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/* Wait until the RTOFF bit is 1 (our RTC register write finished). */
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while ((reg32 = (RTC_CRL & RTC_CRL_RTOFF)) == 0);
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}
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void rtc_set_alarm_time(u32 alarm_time)
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{
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rtc_enter_config_mode();
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RTC_ALRL = (alarm_time & 0x0000ffff);
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RTC_ALRH = (alarm_time & 0xffff0000) >> 16;
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rtc_exit_config_mode();
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}
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void rtc_enable_alarm(void)
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{
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rtc_enter_config_mode();
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RTC_CRH |= RTC_CRH_ALRIE;
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rtc_exit_config_mode();
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}
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void rtc_disable_alarm(void)
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{
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rtc_enter_config_mode();
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RTC_CRH &= ~RTC_CRH_ALRIE;
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rtc_exit_config_mode();
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}
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