114 lines
3.5 KiB
C
114 lines
3.5 KiB
C
/** @defgroup flash_defines FLASH Defines
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*
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* @brief <b>Defined Constants and Types for the STM32F3xx Flash
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* controller </b>
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*
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* @ingroup STM32F3xx_defines
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*
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* @version 1.0.0
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*
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* @date 11 July 2013
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*
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* LGPL License Terms @ref lgpl_license
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*/
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/*
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* This file is part of the libopencm3 project.
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef LIBOPENCM3_FLASH_H
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#define LIBOPENCM3_FLASH_H
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/**@{*/
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#include <libopencm3/stm32/common/flash_common_all.h>
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#include <libopencm3/stm32/common/flash_common_f.h>
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/** @defgroup flash_registers Flash Registers
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* @ingroup flash_defines
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@{*/
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/** Flash Access Control register */
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#define FLASH_ACR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x00)
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/** Flash Key register */
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#define FLASH_KEYR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x04)
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/** Flash Option bytes key register */
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#define FLASH_OPTKEYR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x08)
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/** Flash Status register*/
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#define FLASH_SR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x0C)
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/** Flash Control register */
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#define FLASH_CR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x10)
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/** Flash Address register */
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#define FLASH_AR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x14)
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/** Flash Option Byte register */
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#define FLASH_OBR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x1C)
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/** Flash Write Protection register */
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#define FLASH_WRPR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x20)
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/*@}*/
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/* --- FLASH_ACR values ---------------------------------------------------- */
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#define FLASH_ACR_PRFTBS (1 << 5)
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#define FLASH_ACR_PRFTBE (1 << 4)
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/** Compatibility alias */
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#define FLASH_ACR_PRFTEN FLASH_ACR_PRFTBE
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#define FLASH_ACR_HLFCYA (1 << 3)
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#define FLASH_ACR_LATENCY_SHIFT 0
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#define FLASH_ACR_LATENCY_MASK 0x0f
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/** @defgroup flash_latency FLASH Wait States @{*/
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#define FLASH_ACR_LATENCY(w) ((w) & FLASH_ACR_LATENCY_MASK)
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/**@}*/
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/* --- FLASH_SR values ----------------------------------------------------- */
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#define FLASH_SR_BSY (1 << 0)
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#define FLASH_SR_ERLYBSY (1 << 1)
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#define FLASH_SR_PGERR (1 << 2)
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#define FLASH_SR_WRPRTERR (1 << 4)
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#define FLASH_SR_EOP (1 << 5)
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/* --- FLASH_CR values ----------------------------------------------------- */
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#define FLASH_CR_OBL_LAUNCH (1 << 13)
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#define FLASH_CR_EOPIE (1 << 12)
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#define FLASH_CR_ERRIE (1 << 10)
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#define FLASH_CR_OPTWRE (1 << 9)
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#define FLASH_CR_LOCK (1 << 7)
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#define FLASH_CR_STRT (1 << 6)
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#define FLASH_CR_OPTER (1 << 5)
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#define FLASH_CR_OPTPG (1 << 4)
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#define FLASH_CR_MER (1 << 2)
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#define FLASH_CR_PER (1 << 1)
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#define FLASH_CR_PG (1 << 0)
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/* F3 uses the same keys for option bytes */
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#define FLASH_KEYR_KEY1 ((uint32_t)0x45670123)
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#define FLASH_KEYR_KEY2 ((uint32_t)0xcdef89ab)
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#define FLASH_OPTKEYR_KEY1 FLASH_KEYR_KEY1
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#define FLASH_OPTKEYR_KEY2 FLASH_KEYR_KEY2
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BEGIN_DECLS
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void flash_clear_pgerr_flag(void);
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void flash_clear_wrprterr_flag(void);
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void flash_program_half_word(uint32_t address, uint16_t data);
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void flash_erase_page(uint32_t page_address);
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void flash_erase_all_pages(void);
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END_DECLS
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/**@}*/
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#endif
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