147 lines
3.5 KiB
C
147 lines
3.5 KiB
C
/*
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* This file is part of the libopencm3 project.
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*
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* Copyright (C) 2011 Fergus Noble <fergusnoble@gmail.com>
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* Copyright (C) 2012 Karl Palsson <karlp@tweak.net.au>
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*
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* This is virtually a carbon copy of the F4 code...
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* TODO: make this code shared by f2, f4, l1
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*/
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#include <libopencm3/stm32/l1/gpio.h>
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void gpio_mode_setup(u32 gpioport, u8 mode, u8 pull_up_down, u16 gpios)
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{
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u16 i;
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u32 moder, pupd;
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/*
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* We want to set the config only for the pins mentioned in gpios,
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* but keeping the others, so read out the actual config first.
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*/
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moder = GPIO_MODER(gpioport);
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pupd = GPIO_PUPDR(gpioport);
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for (i = 0; i < 16; i++) {
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if (!((1 << i) & gpios))
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continue;
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moder &= ~GPIO_MODE_MASK(i);
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moder |= GPIO_MODE(i, mode);
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pupd &= ~GPIO_PUPD_MASK(i);
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pupd |= GPIO_PUPD(i, pull_up_down);
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}
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/* Set mode and pull up/down control registers. */
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GPIO_MODER(gpioport) = moder;
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GPIO_PUPDR(gpioport) = pupd;
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}
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void gpio_set_output_options(u32 gpioport, u8 otype, u8 speed, u16 gpios)
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{
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u16 i;
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u32 ospeedr;
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if (otype == GPIO_OTYPE_OD)
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GPIO_OTYPER(gpioport) |= gpios;
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else
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GPIO_OTYPER(gpioport) &= ~gpios;
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ospeedr = GPIO_OSPEEDR(gpioport);
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for (i = 0; i < 16; i++) {
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if (!((1 << i) & gpios))
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continue;
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ospeedr &= ~GPIO_OSPEED_MASK(i);
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ospeedr |= GPIO_OSPEED(i, speed);
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}
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GPIO_OSPEEDR(gpioport) = ospeedr;
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}
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void gpio_set_af(u32 gpioport, u8 alt_func_num, u16 gpios)
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{
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u16 i;
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u32 afrl, afrh;
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afrl = GPIO_AFRL(gpioport);
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afrh = GPIO_AFRH(gpioport);
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for (i = 0; i < 8; i++) {
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if (!((1 << i) & gpios))
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continue;
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afrl &= ~GPIO_AFR_MASK(i);
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afrl |= GPIO_AFR(i, alt_func_num);
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}
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for (i = 8; i < 16; i++) {
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if (!((1 << i) & gpios))
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continue;
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afrl &= ~GPIO_AFR_MASK(i - 8);
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afrh |= GPIO_AFR(i - 8, alt_func_num);
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}
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GPIO_AFRL(gpioport) = afrl;
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GPIO_AFRH(gpioport) = afrh;
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}
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void gpio_set(u32 gpioport, u16 gpios)
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{
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GPIO_BSRR(gpioport) = gpios;
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}
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void gpio_clear(u32 gpioport, u16 gpios)
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{
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GPIO_BSRR(gpioport) = gpios << 16;
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}
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u16 gpio_get(u32 gpioport, u16 gpios)
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{
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return gpio_port_read(gpioport) & gpios;
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}
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void gpio_toggle(u32 gpioport, u16 gpios)
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{
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GPIO_ODR(gpioport) ^= gpios;
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}
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u16 gpio_port_read(u32 gpioport)
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{
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return (u16)GPIO_IDR(gpioport);
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}
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void gpio_port_write(u32 gpioport, u16 data)
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{
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GPIO_ODR(gpioport) = data;
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}
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void gpio_port_config_lock(u32 gpioport, u16 gpios)
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{
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u32 reg32;
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/* Special "Lock Key Writing Sequence", see datasheet. */
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GPIO_LCKR(gpioport) = GPIO_LCKK | gpios; /* Set LCKK. */
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GPIO_LCKR(gpioport) = ~GPIO_LCKK & gpios; /* Clear LCKK. */
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GPIO_LCKR(gpioport) = GPIO_LCKK | gpios; /* Set LCKK. */
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reg32 = GPIO_LCKR(gpioport); /* Read LCKK. */
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reg32 = GPIO_LCKR(gpioport); /* Read LCKK again. */
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/* Tell the compiler the variable is actually used. It will get optimized out anyways. */
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reg32 = reg32;
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/* If (reg32 & GPIO_LCKK) is true, the lock is now active. */
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}
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