184 lines
3.6 KiB
C
184 lines
3.6 KiB
C
/*
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* This file is part of the libopencm3 project.
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*
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* Copyright (C) 2011 Piotr Esden-Tempski <piotr@esden.net>
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <libopencm3/stm32/f1/rcc.h>
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#include <libopencm3/stm32/f1/gpio.h>
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#include <libopencm3/stm32/timer.h>
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#include <libopencm3/stm32/nvic.h>
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#include <libopencm3/stm32/exti.h>
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u16 frequency_sequence[18] = {
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1000,
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500,
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1000,
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500,
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1000,
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500,
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2000,
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500,
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2000,
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500,
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2000,
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500,
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1000,
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500,
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1000,
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500,
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1000,
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5000
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};
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int frequency_sel = 0;
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u16 compare_time;
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u16 new_time;
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u16 frequency;
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int debug = 0;
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void clock_setup(void)
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{
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rcc_clock_setup_in_hse_8mhz_out_72mhz();
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}
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void gpio_setup(void)
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{
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/* Enable GPIOC clock. */
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rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPCEN);
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/*
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* Set GPIO12 (PORTC) (led) to
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* 'output alternate function push-pull'.
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*/
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gpio_set_mode(GPIOC, GPIO_MODE_OUTPUT_50_MHZ,
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GPIO_CNF_OUTPUT_PUSHPULL, GPIO12);
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gpio_set(GPIOC, GPIO12);
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}
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void tim_setup(void)
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{
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/* Enable TIM2 clock. */
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rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_TIM2EN);
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/* Enable TIM2 interrupt. */
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nvic_enable_irq(NVIC_TIM2_IRQ);
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/* Reset TIM2 peripheral */
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timer_reset(TIM2);
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/* Timer global mode:
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* - No divider
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* - alignment edge
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* - direction up
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*/
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timer_set_mode(TIM2, TIM_CR1_CKD_CK_INT,
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TIM_CR1_CMS_EDGE,
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TIM_CR1_DIR_UP);
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/* Reset prescaler value. */
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timer_set_prescaler(TIM2, 36000);
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/* Enable preload. */
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timer_disable_preload(TIM2);
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/* Continous mode. */
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timer_continuous_mode(TIM2);
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/* Period (36kHz) */
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timer_set_period(TIM2, 65535);
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/* Disable outputs. */
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timer_disable_oc_output(TIM2, TIM_OC1);
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timer_disable_oc_output(TIM2, TIM_OC2);
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timer_disable_oc_output(TIM2, TIM_OC3);
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timer_disable_oc_output(TIM2, TIM_OC4);
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/* -- OC1 configuration -- */
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/* Configure global mode of line 1. */
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timer_disable_oc_clear(TIM2, TIM_OC1);
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timer_disable_oc_preload(TIM2, TIM_OC1);
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timer_set_oc_slow_mode(TIM2, TIM_OC1);
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timer_set_oc_mode(TIM2, TIM_OC1, TIM_OCM_FROZEN);
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/* Set the capture compare value for OC1. */
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timer_set_oc_value(TIM2, TIM_OC1, 1000);
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/* ---- */
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/* ARR reload enable */
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timer_disable_preload(TIM2);
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/* Counter enable */
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timer_enable_counter(TIM2);
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/* Enable commutation interrupt */
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timer_enable_irq(TIM2, TIM_DIER_CC1IE);
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}
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void tim2_isr(void)
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{
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if (timer_get_flag(TIM2, TIM_SR_CC1IF)) {
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/* Clear compare interrupt flag. */
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timer_clear_flag(TIM2, TIM_SR_CC1IF);
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/*
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* Get current timer value to calculate next
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* compare register value
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*/
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compare_time = timer_get_counter(TIM2);
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/*
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* Calculate and set the next compare value.
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*/
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frequency = frequency_sequence[frequency_sel++];
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new_time = compare_time + frequency;
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timer_set_oc_value(TIM2, TIM_OC1,
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new_time);
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if (frequency_sel == 18) {
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frequency_sel = 0;
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}
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/* Toggle led to indicate compare event */
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gpio_toggle(GPIOC, GPIO12);
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}
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}
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int main(void)
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{
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clock_setup();
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gpio_setup();
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tim_setup();
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while (1) {
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__asm("nop");
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}
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return 0;
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}
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