133 lines
3.5 KiB
C
133 lines
3.5 KiB
C
/** @defgroup gpio_defines GPIO Defines
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*
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* @brief <b>Defined Constants and Types for the SWM050 General Purpose I/O</b>
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*
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* @ingroup SWM050_defines
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*
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* LGPL License Terms @ref lgpl_license
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*/
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/*
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* This file is part of the libopencm3 project.
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*
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* Copyright (C) 2019 Icenowy Zheng <icenowy@aosc.io>
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* Copyright (C) 2019 Caleb Szalacinski <contact@skiboy.net>
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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/**@{*/
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#ifndef LIBOPENCM3_GPIO_H
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#define LIBOPENCM3_GPIO_H
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#include <libopencm3/cm3/common.h>
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#include <libopencm3/swm050/memorymap.h>
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/* GPIO number definitions (for convenience) */
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/** @defgroup gpio_pin_id GPIO Pin Identifiers
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@{*/
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#define GPIO0 (1 << 0)
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#define GPIO1 (1 << 1)
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#define GPIO2 (1 << 2)
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#define GPIO3 (1 << 3)
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#define GPIO4 (1 << 4)
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#define GPIO5 (1 << 5)
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#define GPIO6 (1 << 6)
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#define GPIO7 (1 << 7)
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#define GPIO8 (1 << 8)
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#define GPIO9 (1 << 9)
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#define GPIO_ALL 0x3ff
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/**@}*/
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/* GPIO direction definitions */
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/** @defgroup gpio_dir GPIO Pin Direction
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@{*/
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enum gpio_dir {
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GPIO_INPUT,
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GPIO_OUTPUT
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};
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/**@}*/
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/* GPIO polarity definitions */
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/** @defgroup gpio_pol GPIO Polarity
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@{*/
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enum gpio_pol {
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GPIO_POL_LOW,
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GPIO_POL_HIGH
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};
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/*@}*/
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/* GPIO interrupt trigger definitions */
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/** @defgroup gpio_trig_type GPIO Interrupt Trigger Type
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@{*/
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enum gpio_trig_type {
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GPIO_TRIG_LEVEL,
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GPIO_TRIG_EDGE
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};
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/*@}*/
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/* GPIO interrupt mask definitions */
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/** @defgroup gpio_int_masked GPIO Interrupt Mask
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@{*/
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enum gpio_int_masked {
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GPIO_UNMASKED,
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GPIO_MASKED
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};
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/*@}*/
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/* GPIO Registers */
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/** @defgroup gpio_registers GPIO Registers
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@{*/
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/** Data register */
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#define GPIO_ADATA MMIO32(GPIO_BASE + 0x0)
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/** Direction register */
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#define GPIO_ADIR MMIO32(GPIO_BASE + 0x4)
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/** Interrupt enable register */
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#define GPIO_INTEN_A MMIO32(GPIO_BASE + 0x30)
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/** Interrupt mask register */
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#define GPIO_INTMASK_A MMIO32(GPIO_BASE + 0x34)
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/** Interrupt trigger mode register */
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#define GPIO_INTLEVEL_A MMIO32(GPIO_BASE + 0x38)
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/** Interrupt polarity register */
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#define GPIO_INTPOLARITY_A MMIO32(GPIO_BASE + 0x3c)
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/** Interrupt status after masking */
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#define GPIO_INTSTAT_A MMIO32(GPIO_BASE + 0x40)
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/** Interrupt status before masking */
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#define GPIO_RAWINTSTAT_A MMIO32(GPIO_BASE + 0x44)
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/** Interrupt clear register */
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#define GPIO_INTEOI_A MMIO32(GPIO_BASE + 0x48)
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/** External register (wat) */
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#define GPIO_AEXT MMIO32(GPIO_BASE + 0x4c)
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/*@}*/
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BEGIN_DECLS
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void gpio_set(uint16_t gpios);
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void gpio_clear(uint16_t gpios);
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uint16_t gpio_get(uint16_t gpios);
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void gpio_toggle(uint16_t gpios);
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void gpio_input(uint16_t gpios);
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void gpio_output(uint16_t gpios);
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void gpio_int_enable(uint16_t gpios, bool en);
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void gpio_int_mask(uint16_t gpios, enum gpio_int_masked masked);
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void gpio_int_type(uint16_t gpios, enum gpio_trig_type type);
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void gpio_int_pol(uint16_t gpios, enum gpio_pol pol);
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uint16_t gpio_int_status(void);
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uint16_t gpio_int_raw_status(void);
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void gpio_int_clear(uint16_t gpios);
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END_DECLS
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#endif
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/**@}*/
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