123 lines
3.9 KiB
C
123 lines
3.9 KiB
C
/** @defgroup syscfg_defines SYSCFG Defines
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*
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* @ingroup STM32L4xx_defines
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*
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* @brief Defined Constants and Types for the STM32L4xx Sysconfig
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*
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* @version 1.0.0
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*
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* @date 28 December 2017
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*
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* LGPL License Terms @ref lgpl_license
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*/
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/*
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* This file is part of the libopencm3 project.
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*
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* Copyright (C) Bruno Randolf <br1@einfach.org>
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef LIBOPENCM3_SYSCFG_H
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#define LIBOPENCM3_SYSCFG_H
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/**@{*/
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/* --- SYSCFG registers ---------------------------------------------------- */
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#define SYSCFG_MEMRMP MMIO32(SYSCFG_BASE + 0x00)
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#define SYSCFG_CFGR1 MMIO32(SYSCFG_BASE + 0x04)
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#define SYSCFG_EXTICR(i) MMIO32(SYSCFG_BASE + 0x08 + (i)*4)
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#define SYSCFG_EXTICR1 SYSCFG_EXTICR(0)
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#define SYSCFG_EXTICR2 SYSCFG_EXTICR(1)
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#define SYSCFG_EXTICR3 SYSCFG_EXTICR(2)
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#define SYSCFG_EXTICR4 SYSCFG_EXTICR(3)
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#define SYSCFG_SCSR MMIO32(SYSCFG_BASE + 0x18)
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#define SYSCFG_CFGR2 MMIO32(SYSCFG_BASE + 0x1C)
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#define SYSCFG_SWPR MMIO32(SYSCFG_BASE + 0x20)
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#define SYSCFG_SKR MMIO32(SYSCFG_BASE + 0x24)
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#define SYSCFG_SWPR2 MMIO32(SYSCFG_BASE + 0x29)
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/* --- SYSCFG_MEMRMP Values ------------------------------------------------ */
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#define SYSCFG_MEMRMP_MEM_MODE_MASK 7
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#define SYSCFG_MEMRMP_MEM_MODE_FLASH 0
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#define SYSCFG_MEMRMP_MEM_MODE_SYSTEM 1
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#define SYSCFG_MEMRMP_MEM_MODE_FMC 2
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#define SYSCFG_MEMRMP_MEM_MODE_SRAM 3
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#define SYSCFG_MEMRMP_MEM_MODE_QSPI 6
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/* --- SYSCFG_CFGR1 Values ------------------------------------------------- */
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#define SYSCFG_CFGR1_FPU_IE_INEXACT (1 << 31)
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#define SYSCFG_CFGR1_FPU_IE_DENORMAL (1 << 30)
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#define SYSCFG_CFGR1_FPU_IE_OVERFLOW (1 << 29)
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#define SYSCFG_CFGR1_FPU_IE_UNDERFLOW (1 << 28)
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#define SYSCFG_CFGR1_FPU_IE_DIVZERO (1 << 27)
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#define SYSCFG_CFGR1_FPU_IE_INVALID (1 << 26)
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#define SYSCFG_CFGR1_I2C3_FMP (1 << 22)
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#define SYSCFG_CFGR1_I2C2_FMP (1 << 21)
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#define SYSCFG_CFGR1_I2C1_FMP (1 << 20)
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#define SYSCFG_CFGR1_I2C_PB9_FMP (1 << 19)
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#define SYSCFG_CFGR1_I2C_PB8_FMP (1 << 18)
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#define SYSCFG_CFGR1_I2C_PB7_FMP (1 << 17)
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#define SYSCFG_CFGR1_I2C_PB6_FMP (1 << 16)
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#define SYSCFG_CFGR1_BOOSTEN (1 << 8)
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#define SYSCFG_CFGR1_FWDIS (1 << 0)
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/* --- SYSCFG_EXTICR Values -------------------------------------------------*/
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#define SYSCFG_EXTICR_FIELDSIZE 4
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#define SYSCFG_EXTICR_GPIOA 0
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#define SYSCFG_EXTICR_GPIOB 1
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#define SYSCFG_EXTICR_GPIOC 2
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#define SYSCFG_EXTICR_GPIOD 3
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#define SYSCFG_EXTICR_GPIOE 4
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#define SYSCFG_EXTICR_GPIOH 7
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/* --- SYSCFG_SCSR Values -------------------------------------------------- */
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#define SYSCFG_SCSR_SRAM2BSY (1 << 1)
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#define SYSCFG_SCSR_SRAM2ER (1 << 0)
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/* --- SYSCFG_CFGR2 Values ------------------------------------------------- */
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#define SYSCFG_CFGR2_SPF (1 << 8)
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#define SYSCFG_CFGR2_ECCL (1 << 3)
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#define SYSCFG_CFGR2_PVDL (1 << 2)
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#define SYSCFG_CFGR2_SPL (1 << 1)
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#define SYSCFG_CFGR2_CCL (1 << 0)
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/* --- SYSCFG_SWPR Values -------------------------------------------------- */
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/* 0 - 15 or 0 - 32 depending on L4 version */
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#define SYSCFG_SWPR_PxWP(x) (1 << x)
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/* --- SYSCFG_SKR Values --------------------------------------------------- */
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#define SYSCFG_SKR_KEY1 0xCA
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#define SYSCFG_SKR_KEY2 0x53
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/* --- SYSCFG_SWPR2 Values -------------------------------------------------- */
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/* 32 - 63 or not available depending on L4 version */
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#define SYSCFG_SWPR2_PxWP(x) (1 << (x - 32))
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/**@}*/
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#endif
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