215 lines
7.7 KiB
C
215 lines
7.7 KiB
C
/** @addtogroup dmamux_defines
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*
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* @author @htmlonly © @endhtmlonly 2019
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* Guillaume Revaillot <g.revaillot@gmail.com>
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*
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* @version 1.0.0
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*
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* LGPL License Terms @ref lgpl_license
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*/
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/*
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* This file is part of the libopencm3 project.
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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/** @cond */
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#if defined(LIBOPENCM3_DMAMUX_H)
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/** @endcond */
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#ifndef LIBOPENCM3_DMAMUX_COMMON_ALL_H
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#define LIBOPENCM3_DMAMUX_COMMON_ALL_H
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/**@{*/
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#define DMAMUX_CxCR(dmamux_base, dma_channel) MMIO32((dmamux_base) + 0x04 * ((dma_channel) - 1))
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#define DMAMUX1_CxCR(dma_channel) DMAMUX_CxCR(DMAMUX1, (dma_channel))
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#define DMAMUX2_CxCR(dma_channel) DMAMUX_CxCR(DMAMUX2, (dma_channel))
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#define DMAMUX_CSR(dmamux_base) MMIO32((dmamux_base) + 0x80)
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#define DMAMUX1_CSR(dmamux_base) DMAMUX_CSR(DMAMUX1)
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#define DMAMUX2_CSR(dmamux_base) DMAMUX_CSR(DMAMUX2)
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#define DMAMUX_CFR(dmamux_base) MMIO32((dmamux_base) + 0x84)
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#define DMAMUX1_CFR(dmamux_base) DMAMUX_CFR(DMAMUX1)
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#define DMAMUX2_CFR(dmamux_base) DMAMUX_CFR(DMAMUX2)
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#define DMAMUX_RGxCR(dmamux_base, rg_channel) MMIO32((dmamux_base) + 0x100 + 0x04 * ((rg_channel) - 1))
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#define DMAMUX1_RGxCR(dmamux_base, rg_channel) DMAMUX_RGxCR(DMAMUX1, (rg_channel))
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#define DMAMUX2_RGxCR(dmamux_base, rg_channel) DMAMUX_RGxCR(DMAMUX2, (rg_channel))
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#define DMAMUX_RGSR(dmamux_base) MMIO32((dmamux_base) + 0x140)
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#define DMAMUX1_RGSR(dmamux_base) DMAMUX_RSGR(DMAMUX1)
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#define DMAMUX2_RGSR(dmamux_base) DMAMUX_RSGR(DMAMUX2)
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#define DMAMUX_RGCFR(dmamux_base) MMIO32((dmamux_base) + 0x144)
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#define DMAMUX1_RGCFR(dmamux_base) DMAMUX_RGCFR(DMAMUX1)
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#define DMAMUX2_RGCFR(dmamux_base) DMAMUX_RGCFR(DMAMUX2)
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/** @defgroup dmamux_cxcr CxCR DMA request line multiplexer channel x control register
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@{*/
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/** DMAMUX_CxCR_SYNC_ID Synchronization input selected */
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#define DMAMUX_CxCR_SYNC_ID_SHIFT 24
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#define DMAMUX_CxCR_SYNC_ID_MASK 0x1f
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/** DMAMUX_CxCR_NBREQ Number (minus 1) of DMA requests to forward */
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#define DMAMUX_CxCR_NBREQ_SHIFT 19
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#define DMAMUX_CxCR_NBREQ_MASK 0x1f
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#define DMAMUX_CxCR_SPOL_SHIFT 17
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#define DMAMUX_CxCR_SPOL_MASK 0x03
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/** @defgroup dmamux_cxcr_spol SPOL Event Polarity
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* @brief Synchronization event type selector
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@{*/
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#define DMAMUX_CxCR_SPOL_NO_EVENT 0
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#define DMAMUX_CxCR_SPOL_RISING_EDGE 1
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#define DMAMUX_CxCR_SPOL_FALLING_EDEG 2
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#define DMAMUX_CxCR_SPOL_BOTH_EDGES 3
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/**@}*/
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/** DMAMUX_CxCR_SE Synchronous operating mode enable/disable */
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#define DMAMUX_CxCR_SE (1 << 16)
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/** DMAMUX_CxCR_EGE Event generation enable/disable */
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#define DMAMUX_CxCR_EGE (1 << 9)
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/** DMAMUX_CxCR_SOIE Interrupt enable at synchronization event overrun */
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#define DMAMUX_CxCR_SOIE (1 << 8)
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/** DMAMUX_CxCR_DMAREQ_ID Input DMA request line selected */
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#define DMAMUX_CxCR_DMAREQ_ID_SHIFT 0
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#define DMAMUX_CxCR_DMAREQ_ID_MASK 0xff
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/**@}*/
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/** @defgroup dmamux_csr CSR request line multiplexer interrupt channel status register
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@{*/
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/** DMAMUX_CSR_SOF Synchronization overrun event flag */
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#define DMAMUX_CSR_SOF(dma_channel) (1 << ((dma_channel) - 1))
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/**@}*/
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/** @defgroup dmamux_cfr CFR request line multiplexer interrupt clear flag register
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@{*/
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/** DMAMUX_CFR_CSOF Clear synchronization overrun event flag */
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#define DMAMUX_CFR_CSOF(dma_channel) (1 << ((dma_channel) - 1))
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/**@}*/
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/** @defgroup dmamux_rgxcr RGxCR DMA request generator channel x control register
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@{*/
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/** DMAMUX_RGxCR_GNBREQ GNBREQ Number (minus 1) of DMA requests to generate */
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#define DMAMUX_RGxCR_GNBREQ_SHIFT 19
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#define DMAMUX_RGxCR_GNBREQ_MASK 0x1f
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#define DMAMUX_RGxCR_GPOL_SHIFT 17
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#define DMAMUX_RGxCR_GPOL_MASK 0x03
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/** @defgroup dmamux_rgxcr_gpol GPOL Event Polarity
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* @brief DMA request generator trigger event type selection
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@{*/
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#define DMAMUX_RGxCR_GPOL_NO_EVENT 0
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#define DMAMUX_RGxCR_GPOL_RISING_EDGE 1
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#define DMAMUX_RGxCR_GPOL_FALLING_EDEG 2
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#define DMAMUX_RGxCR_GPOL_BOTH_EDGES 3
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/**@}*/
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/** DMAMUX_RGxCR_GE GE DMA request generator channel enable/disable */
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#define DMAMUX_RGxCR_GE (1 << 16)
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/** DMAMUX_RGxCR_OIE OIE Interrupt enable at trigger event overrun */
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#define DMAMUX_RGxCR_OIE (1 << 8)
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/** DMAMUX_RGxCR_SIG_ID SIG_ID DMA request trigger input selected */
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#define DMAMUX_RGxCR_SIG_ID_SHIFT 0
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#define DMAMUX_RGxCR_SIG_ID_MASK 0x1f
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/**@}*/
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/** @defgroup dmamux_rgsr RGSR DMA request generator interrupt status register
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@{*/
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/** DMAMUX_RGSR_OF Trigger OF event overrun flag */
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#define DMAMUX_RGSR_OF(rg_channel) (1 << ((rg_channel) - 1))
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/**@}*/
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/** @defgroup dmamux_rgcfr RGCFR DMA request generator clear flag register
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@{*/
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/** DMAMUX_RGCFR_COF COF Clear trigger event overrun flag */
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#define DMAMUX_RGCFR_COF(rg_channel) (1 << ((rg_channel) - 1))
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/**@}*/
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/* --- Generic values ---------------------------------------- */
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/** @defgroup dmamux_rg_channel DMAMUX Request Generator Channel Number
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@{*/
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#define DMAMUX_RG_CHANNEL1 1
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#define DMAMUX_RG_CHANNEL2 2
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#define DMAMUX_RG_CHANNEL3 3
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#define DMAMUX_RG_CHANNEL4 4
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/**@}*/
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/* --- function prototypes ------------------------------------------------- */
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BEGIN_DECLS
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void dmamux_reset_dma_channel(uint32_t dmamux, uint8_t channel);
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void dmamux_enable_dma_request_event_generation(uint32_t dmamux, uint8_t channel);
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void dmamux_disable_dma_request_event_generation(uint32_t dmamux, uint8_t channel);
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void dmamux_set_dma_channel_request(uint32_t dmamux, uint8_t channel, uint8_t request_id);
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uint8_t dmamux_get_dma_channel_request(uint32_t dmamux, uint8_t channel);
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void dmamux_enable_dma_request_sync(uint32_t dmamux, uint8_t channel);
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void dmamux_disable_dma_request_sync(uint32_t dmamux, uint8_t channel);
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void dmamux_set_dma_request_sync_input(uint32_t dmamux, uint8_t channel, uint8_t sync_id);
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void dmamux_set_dma_request_sync_pol(uint32_t dmamux, uint8_t channel, uint8_t polarity);
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void dmamux_set_dma_request_sync_nbreq(uint32_t dmamux, uint8_t channel, uint8_t nbreq);
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void dmamux_enable_dma_request_sync_overrun_interrupt(uint32_t dmamux, uint8_t channel);
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void dmamux_disable_dma_request_sync_overrun_interrupt(uint32_t dmamux, uint8_t channel);
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uint32_t dmamux_get_dma_request_sync_overrun(uint32_t dmamux, uint8_t channel);
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void dmamux_clear_dma_request_sync_overrun(uint32_t dmamux, uint8_t channel);
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void dmamux_reset_request_generator_channel(uint32_t dmamux, uint8_t rg_channel);
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void dmamux_enable_request_generator(uint32_t dmamux, uint8_t rg_channel);
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void dmamux_disable_request_generator(uint32_t dmamux, uint8_t rg_channel);
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void dmamux_set_request_generator_trigger(uint32_t dmamux, uint8_t rg_channel, uint8_t sig_id);
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void dmamux_set_request_generator_trigger_pol(uint32_t dmamux, uint8_t rg_channel, uint8_t polarity);
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void dmamux_set_request_generator_trigger_gnbreq(uint32_t dmamux, uint8_t rg_channel, uint8_t gnbreq);
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void dmamux_enable_request_generator_trigger_overrun_interrupt(uint32_t dmamux, uint8_t rg_channel);
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void dmamux_disable_request_generator_trigger_overrun_interrupt(uint32_t dmamux, uint8_t rg_channel);
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uint32_t dmamux_get_request_generator_trigger_overrun_interrupt(uint32_t dmamux, uint8_t rg_channel);
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void dmamux_clear_request_generator_trigger_overrun_interrupt(uint32_t dmamux, uint8_t rg_channel);
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END_DECLS
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/**@}*/
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#endif
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/** @cond */
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#else
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#warning "dmamux_common_all.h should not be included explicitly, only via dmamux.h"
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#endif
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/** @endcond */
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