Commit Graph

13 Commits

Author SHA1 Message Date
Karl Palsson b556a72fdb stm32l0: use current RCC bit names
Early revisions of the reference manuals used different names for the
touch sense controller and firewall bits.  These have now been changed
to be more in line with other families, and as these parts and bits were
new in this library, simply move forward to the current naming
convention.
2017-03-30 21:48:07 +00:00
Karl Palsson 7c3d39fda4 stm32l0: rcc: fix definition of RCC_CSR_RTCEN bit
Fixes https://github.com/libopencm3/libopencm3/issues/720
2016-12-08 10:44:32 +00:00
Karl Palsson da91794f52 stm32: rcc: Rationalize MCO definitions
Some parts used HSICLK, some used HSI.  Most used NOCLK, f3 used
DISABLED.  Try and move all to the shorter, simpler forms, instead of
having mixed defines for different targets for the same thing.  Just
because the bits themselves are different doesn't mean we should make it
more difficult for users to port code.
2016-11-29 15:06:19 +00:00
Karl Palsson 4eb51ecaea stm32: rcc: rcc_wait_for_osc_ready is always available
Move the prototype to the common_all header and include documentation.
2016-08-18 23:41:04 +00:00
Eric Kerman 9b642dea2a stm32l0: Add timer support
Signed-off-by: Karl Palsson <karlp@tweak.net.au>
2016-08-15 21:10:07 +00:00
Karl Palsson 3a7cbec776 stm32l/stm32f: name space standardization [BREAKING]
As done by esden for the F4, remove typedefs and add prefixes to clock enums
This extends this to all stm32 families.

    Let's not hide the fact that these variables are structs/enums.

    We are filling up the namespace badly enough, we should be prefixing as
    much as we can with the module names at least. As users we already run
    often enough in namespace colisions we don't have to make it worse.

    * CLOCK_3V3_xxx enums renamed to RCC_CLOCK_3V3_xxx
    * clock enums (PLL, HSI, HSE ...) prefixed with RCC_
    * scale enum of pwr module prefixed with PWR_
2015-12-14 23:26:42 +01:00
Karl Palsson 29ede503f3 stm32l0: rcc: add more helper routines. 2015-10-06 00:53:51 +00:00
Karl Palsson cebc335846 stm32l0: Simplify rcc defines.
More could probably be found, but this makes some of the basic RCC defines for
the L0 much more inline with other platforms, and much less verbose.  This
helps us have more identical code for library users across different targets.
2015-10-06 00:53:02 +00:00
Karl Palsson 5746fd4d25 stm32: common: Extract MCO source setting
This adds MCO source selection to some targets, and removes and standardizes
the mask/shift usage for all targets.  For devices that support MCO2, this
supports only MCO1.  No attempt has been made to extract MCO prescaler, which
is not available on all F1 and F3.
2015-04-29 01:22:27 +00:00
Chuck McManis 14ad92015e Audit RTCPRE Shift and Mask Values
L0 - RTC Prescaler appears in RCC_CR, bit 20, 2 bits wide (RM0367 Rev 2)
L1 - RTC Prescaler appears in RCC_CR, bit 29, 2 bits wide (RM0038 Rev 10)
F0 - no prescaler setting (RM0091 Rev 7)
F1 - no prescaler setting (RM0041 Rev 4)
F2 - RTC Prescaler appears at RCC_CFGR, bit 16, 4 bits wide (RM0033 Rev 6)
F3 - no prescaler setting (RM0316 Rev 3)
F4 - RTC Prescaler appears at RCC_CFGR, bit 16, 4 bits wide (RM0090 Rev 8)
2014-12-14 16:29:03 -08:00
Chuck McManis 9ddfcb0e53 Rename rcc_ppre1_frequency and rcc_ppre2_frequency
Rename rcc_ppre1_frequency and rcc_ppre2_frequency to rcc_apb1_frequency and rcc_apb2_frequency
Also add rcc_ahb_frequency (although it is not set correctly in all cases) which will be fixed by
the rcc commits later. Also fixup the only use in the library of these variables, the USART code.

And fix the typos that resulted
Make l1 generic too
2014-12-13 19:49:04 -08:00
Karl Palsson f51698fff4 stm32:l0: RCC: add osc_on/osc_off helpers
These are the routines that have custom switch cases, and aren't easy targets
for pulling out.
2014-12-03 11:13:39 +00:00
Karl Palsson 378069091a stm32:l0: Add RCC register definitions
Tested with a miniblink example on the l053 discovery board.

Only register definitions at this stage, no helpers.
Register definitions from RM0367r2, hopefully the biggest
superset of L0 parts.

Signed-off-by: Karl Palsson <karlp@tweak.net.au>
2014-12-03 11:13:39 +00:00