Commit Graph

2367 Commits

Author SHA1 Message Date
Karl Palsson dc64929b78 tests: gadget0: add stm32f3-disco
Another readily available board with a user USB port, and this one lets
you test the st usbfs peripheral on a device with trace facilities.
2018-05-01 22:23:47 +00:00
Karl Palsson b25a1ae0eb gadget0: work around "ValueError: The device has no langid"
pyusb quirk.
2018-05-01 22:23:47 +00:00
Karl Palsson 2204f447bb BREAKING: stm32f3:rcc: add more generic pll setup routines
Deprecate the old routine and make a new one that actually handles HSI
and HSE properly, and includes the predivider and the usb divider
settings as well.
2018-05-01 22:23:44 +00:00
Karl Palsson 622475f543 BREAKING: stm32f3:rcc: use more common MUL names
Make the defines as they are on other families, try and make more
defines the same, not arbitrarily different.
2018-05-01 22:19:28 +00:00
Karl Palsson ef44bdd09e BREAKING: stm32f0/f1: standardize flash_prefetch_xx
use the same API on all families, flash_prefetch_{enable,disable}()
2018-05-01 22:19:28 +00:00
Karl Palsson 389ec82538 stm32f3: flash: add prefetch helpers
Should be added to f2/f4 as well, but the bit definitions are different.
2018-05-01 22:19:28 +00:00
Martin Sivak f0e128673d Add DMA support to STM32L0
STM32L0 uses the same DMA peripheral as STM32F0, F1, L1 and others
with some differences. Those are mostly in the number of supported
controllers and channels.

This patch enables the basic support with no attempt to only expose
the available controllers / channels.

For more information see the ST Application Note AN2548.

Signed-off-by: Martin Sivak <mars@montik.net>
2018-04-29 19:22:13 +00:00
Guillaume Revaillot 54c6c833fe stm32: stm32f09x has two independent dma controlers, add RCC bits. 2018-04-29 13:16:36 +00:00
Karl Palsson 255a594300 stm32: spi-v2: enable SSOE by default for the common case
See also f80bff2133

This makes the v2 peripheral behave consistently with the v1 peripheral
code, and more in line with users expectations.

Fixes: https://github.com/libopencm3/libopencm3/issues/391
Fixes: https://github.com/libopencm3/libopencm3/issues/232
2018-04-28 21:12:27 +00:00
Guillaume Revaillot bf125e91f9 stm32: rework spi, based on PR #740 and #742.
split spi stuff in three part:
 - v1 : basic spi peripheral
 - v1_frf : v1 spi with frf mode additional bit in spi_cr2 / spi_sr
 - v2 : spi with variable datasize, fifo and other fancy stuff.

v1 maps to f1 chips
v1_frf to f2, f4 and l0,l1
v2 to f0, f3 and l4

This breaks spi_master_init API for v2 devices : function prototype from
common spi header used to be abused, with DFF bit reused for CRCL bit.
New v2 spi_master_init does not handle anymore CRCL bits, as it does not
usually mess with other crc configuration.
2018-04-28 21:12:27 +00:00
Guillaume Revaillot 0deb58c73c stm32: fix spi_init_master documentation.
Doc mentions SPI_CR_BR_FPCLK_*, but spi_init_master needs offseted register value (SPI_CR_BAUDRATE_FPCLK_*).
Align documentation with code.
2018-04-28 21:12:27 +00:00
Karl Palsson 34462ac54a stm32: adc v2: add some minor doxygen 2018-04-28 21:12:27 +00:00
Vegard Lillevoll 41cad7c065 stm32: adc-v2: Add ADC_CFGR1_AUTOFF 2018-04-28 21:12:27 +00:00
Vegard Lillevoll bbe71b4c4f STM32F0: Added ADC1_CCR definition 2018-04-28 21:12:27 +00:00
Karl Palsson 64c5535693 stm32l0: adc: add sample time definitions 2018-04-28 21:12:27 +00:00
Karl Palsson 9a05dcb6c0 ld scripts: drop duplication of standard sections
Instead of every "simple" target having their own duplicate file with
all the section mappings, just provide a single, simple,
"cortex-m-generic.ld" that works with our startup code and any simple
rom/ram system.  This also drops the pointless copying of files all over
the place.  Using -L flags properly is sufficient, and the standard file
is now in the root of the library already.
2018-04-28 21:12:27 +00:00
kbob dd87b5bed2 EFM32WG and EZR32WG: use hard-fp as it's available 2018-04-27 21:37:03 +00:00
kbob e8154aa44a efm32: Add EZR32WG "EZRadio Wonder Gecko" family. 2018-04-27 21:37:03 +00:00
kbob c3889b91df efm32: Add EFM32WG "Wonder Gecko" family. 2018-04-27 21:37:03 +00:00
kbob 5160d7996c efm32: Split efm32/lg into /lg and /common.
Somewhat replaces some earlier work done by hg/lg, but much more
complete, so we kept it as is, because it's bringing in even more parts
after this.

Reviewed-by: Karl Palsson <karlp@tweak.net.au>
2018-04-27 21:36:42 +00:00
Karl Palsson 6675be5326 efm32: cmu: lh/hg fix AUXHFRCOCTRL values
Applies to both, and clearly shows that cmu.h needs to be extracted as
common code.

Originally from: e31d312331
and checked in the HG/LG reference manuals.
2018-04-14 18:40:54 +00:00
kbob 0d815061d9 efm32lg: adc: Misspelling in ADC_CTRL_LPFMODE definition. 2018-04-14 18:40:54 +00:00
kbob 90ea97c3e5 efm32lg: Fixed BURTC_CTRL_LPCOMPC_IGNxLSB definition. 2018-04-14 18:40:54 +00:00
kbob 74316e6901 efm32lg: acmp: Fixed ACMP_CTRL_HYSTSEL_HYSTx definition. 2018-04-14 18:40:54 +00:00
Maxim Sloyko 2b1ddc8490 sam/4l: monster commit
The original submitter of this squished everything into one series, and
has not returned. The code mostly appears good, and review comments were
followed for the most part.  The project doesn't really maintain any
testing or board farm for sam3/sam4 parts, so we're going to just trust
our users.

Reviewed-by: Karl Palsson <karlp@tweak.net.au>

sam/4l: IRQ Configuration file (irq.json)

sam/4l: Basic Memory Map.

sam/4l: GPIO Defines.

sam/4l: GPIO Functions

Added everything that needed to compile the library: Makefile, Linker
Script and common includes.

sam/4l: SCIF function to start OSC.

sam/4l: GPIO Enable/Disable and Multiplexing configuration functions.

sam/4l: PLL Clock configuration.

sam/4l: Peripheral clock configuration and basic USART support.

sam: USART Character length configuration.

sam/4l: Generic Clock configuration functions.

sam/4l: Analog to Digital Converter Interface (ADCIFE) basic support.
2018-04-14 18:40:54 +00:00
George Jiglau b4f195b488 genlink: Remove old genlink makefiles 2018-04-14 18:40:54 +00:00
George Jiglau 974ca8a652 genlink: Update genlink tests 2018-04-14 18:40:54 +00:00
George Jiglau 396701808d genlink: Rewrite genlink script from awk to python
This removes the dependency on awk and should fix #732
python was already a dependency, for the irq generation
2018-04-14 18:40:54 +00:00
Jordi Pakey-Rodriguez c7d46c4fbb stm32f4: adc: Correct ADC documentation 2018-04-14 18:40:54 +00:00
Julian Friedrich 74dd24a062 make: allow building target subsets
Usage:  make TARGETS="stm32/l1" or even make TARGETS="stm32/l1 stm32/f7"
2018-04-14 18:40:54 +00:00
Karl Palsson 0a07355520 gadget0: stm32l1: target the "hw1" test board explicitly
There's still no commonly available l1 with usb from ST, so target our
own developed test host board instead of one developer's private board.
2018-04-14 18:40:54 +00:00
Karl Palsson 5609749411 doc: drop unused tex files
Remove tex header templates only used in latex document generation.
Clarify the HACKING document to reflect no pdf/latex

Fixes: 9443856b doc: drop latex support
2018-04-14 18:40:54 +00:00
Karl Palsson 23fc65d44c ethernet: ksz80x1: fix build/compile
Originally sourced from: https://github.com/libopencm3/libopencm3/pull/382

fixed some typos from the manual and poor merging/rebaseing,
and one judgment call on using a specific name for a conflicting
bit definition.
2018-04-14 18:40:54 +00:00
Frantisek Burian 20b7956d82 [ETH/PHY] Add support for Micrel KSZ80X1 family of PHYs 2018-04-14 18:40:54 +00:00
Karl Palsson 6e65170390 cmsis: add new families to dispatch handlers.
Some people use the opencmsis headers.  Update them to include all the
recently added targets.

Fixes: https://github.com/libopencm3/libopencm3/pull/907
2018-04-13 11:15:32 +00:00
Karl Palsson 297a51a27e stm32: iwdg (v2) Update doxygen
Turn the existing comments into doxygen comments to get more value
2018-03-28 13:23:22 +00:00
Karl Palsson cab07c0703 stm32: iwdg: fix Window Register name
The f0 copy of this file originally had a copy/paste error in the
documentation.  F3 and L4 had the "right" name.
2018-03-28 13:17:39 +00:00
Guillaume Revaillot c670bdca1a stm32l0: enable iwdg 2018-03-28 13:06:57 +00:00
Guillaume Revaillot 207eb07d4c stm32: centralize additionnal iwdg window register definition into iwdg-v2.
stm32f0, l3, l4 are currently sharing the same duplicated header, and
stm32l0 uses the same peripheral. Stop copy-pasting stuff and centralize
definitions into a iwdg_common_v2.h header.
2018-03-28 13:06:57 +00:00
Guillaume Revaillot f63090d9b6 devices.data: add stm32f071?8 2018-03-28 11:53:10 +02:00
Guillaume Revaillot 613ecc9046 devices.data: add stm32f091?[bc] 2018-03-28 11:53:05 +02:00
Guillaume Revaillot 0c578fe11b devices.data: add stm32f070?[6b] 2018-03-28 11:52:59 +02:00
Guillaume Revaillot ca35b89c32 devices.data: add stm32f030?c 2018-03-28 11:36:58 +02:00
Guillaume Revaillot b79de32e9e stm32: iwdg: fix typo in (unused) register name 2018-03-27 18:35:23 +02:00
Karl Palsson c93c8676e6 ld: devices.data: simply l4 a little
Join some of the paired devices that differ only by encryption periphs
2018-03-24 21:11:23 +00:00
Tom Verbeure dba2430c89 Add full STM32L4 family memory sizes 2018-03-24 18:06:41 +00:00
Karl Palsson fb28b4cb7c stm32f1: bkp: include in doxygen output
The original author had included nice descriptions, so only a tiny bit
of massaging to get it all in doxygen nicely too.
2018-03-08 10:57:50 +00:00
Karl Palsson 6b40e9777e stm32f1: bkp: fix typo in CR_TPAL register
Even original documentation had the full TPAL matching the ref man bit
descriptions.

Reported-by: _ami_ on irc.
2018-03-08 10:56:45 +00:00
Karl Palsson 7bd7d48408 stm32l0: add all new IRQs from later families 2018-03-08 09:52:21 +00:00
Guillaume Revaillot 1ab0d2445f stm32l0: NVIC: channel 16 is tim3 on stm32l0x0, stm32l0x1 and stm32l0x2.
tim3 interrupt is wired to nvic channel 16 if present.
2018-03-08 10:25:34 +01:00